src-test2/sys/arm/include/intr.h, branch release/6.2.0_cvs FreeBSD source tree https://cgit-dev.freebsd.org/src-test2/atom?h=release%2F6.2.0_cvs 2007-01-11T22:54:46Z This commit was manufactured by cvs2svn to create tag 2007-01-11T22:54:46Z cvs2svn cvs2svn@FreeBSD.org 2007-01-11T22:54:46Z urn:sha1:201f78d6b90635d961fa373ecd706e3786333b7e 'RELENG_6_2_0_RELEASE'. This commit was manufactured to restore the state of the 6.2-RELEASE image. - MFp4: modify slightly the arm intr API, there's arm CPUs with more than 32 2005-06-09T12:26:20Z Olivier Houchard cognet@FreeBSD.org 2005-06-09T12:26:20Z urn:sha1:f60e923b2396c0524f5fcc4e48f7fa64be396736 interrupts. - Implement teardown methods where appropriate. Define NIRQ to 64 for CPU_ARM9, because Cirrus Logic EP93XX cores provides 2005-02-13T18:26:31Z Olivier Houchard cognet@FreeBSD.org 2005-02-13T18:26:31Z urn:sha1:31d0686d2d88c746d923773a3f827680dbd3c292 64 irqs. This should be re-thought later. Start all license statements with /*- 2005-01-05T21:58:49Z Warner Losh imp@FreeBSD.org 2005-01-05T21:58:49Z urn:sha1:d8315c79d932951f2db396014e28ffa03a31b850 Add new functions to know which irqs are pending, and to mask and unmask 2004-09-23T22:09:57Z Olivier Houchard cognet@FreeBSD.org 2004-09-23T22:09:57Z urn:sha1:7c320e5bfb52914156bca1dc3c18a26144af0ea6 interrupts, as these are CPU specific. If the interrupt handler is not marked as INTR_FAST, don't unmask the interrupt until it as been serviced. Import FreeBSD/arm kernel bits. 2004-05-14T11:46:45Z Olivier Houchard cognet@FreeBSD.org 2004-05-14T11:46:45Z urn:sha1:6fc729af6302dafea6d55379b7175fb40c81ac4d It only supports sa1110 (on simics) right now, but xscale support should come soon. Some of the initial work has been provided by : Stephane Potvin <sepotvin at videotron.ca> Most of this comes from NetBSD.