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<title>src-test2/sys/dev/ata/chipsets, branch release/8.2.0</title>
<subtitle>FreeBSD source tree</subtitle>
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<updated>2010-11-23T21:29:40Z</updated>
<entry>
<title>MFC r215428, r215431, r215462:</title>
<updated>2010-11-23T21:29:40Z</updated>
<author>
<name>Alexander Motin</name>
<email>mav@FreeBSD.org</email>
</author>
<published>2010-11-23T21:29:40Z</published>
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<id>urn:sha1:3976eb04cbf7978e24de6c19d7e140adb7fe8b12</id>
<content type='text'>
Add support for VIA VX900 chipset SATA controller.
</content>
</entry>
<entry>
<title>MFC r214672:</title>
<updated>2010-11-19T09:26:39Z</updated>
<author>
<name>Alexander Motin</name>
<email>mav@FreeBSD.org</email>
</author>
<published>2010-11-19T09:26:39Z</published>
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<id>urn:sha1:3a554c88894cb3f94f0ee5782e1ba6b141b34cb0</id>
<content type='text'>
Remove stale line, accidentally slipped into r214016.
</content>
</entry>
<entry>
<title>MFC r214016:</title>
<updated>2010-11-02T09:26:12Z</updated>
<author>
<name>Alexander Motin</name>
<email>mav@FreeBSD.org</email>
</author>
<published>2010-11-02T09:26:12Z</published>
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<id>urn:sha1:5ed7281b6c1a65911867dfb3774f0288d3174042</id>
<content type='text'>
Set of legacy mode SATA enchancements:
- Implement proper combined mode decoding for Intel controllers to properly
identify SATA and PATA channels and associate ATA channels with SATA ports.
This fixes wrong reporting and in some cases hard resets to wrong SATA ports.
- Improve SATA registers support to handle hot-plug events and potentially
interface errors. For ICH5/6300ESB chipsets these registers accessible via
PCI config space. For later ones they may be accessible via PCI BAR(5).
- For controllers not generating interrupts on hot-plug events, implement
periodic status polling. Use it to detect hot-plug on Intel and VIA
controllers. Same probably could also be used for Serverworks and SIS.
</content>
</entry>
<entry>
<title>MFC r213301:</title>
<updated>2010-11-02T09:15:27Z</updated>
<author>
<name>Alexander Motin</name>
<email>mav@FreeBSD.org</email>
</author>
<published>2010-11-02T09:15:27Z</published>
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<id>urn:sha1:231bbdf084373273d88222d12e0a3654a5da609d</id>
<content type='text'>
Revert r132291.
Restore setting PIO/WDMA timings for VIA UDMA133 controllers.
Linux disables only AST register writing there, but no all timings.
</content>
</entry>
<entry>
<title>MFC r213092:</title>
<updated>2010-11-02T09:14:04Z</updated>
<author>
<name>Alexander Motin</name>
<email>mav@FreeBSD.org</email>
</author>
<published>2010-11-02T09:14:04Z</published>
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<id>urn:sha1:802ad49e2cbf0815f6381b5d60d927db3b225f49</id>
<content type='text'>
Add missing le32toh(), same as recently done in ata-siliconimage.c.
</content>
</entry>
<entry>
<title>MFC r213047 by jchandra:</title>
<updated>2010-11-02T09:13:13Z</updated>
<author>
<name>Alexander Motin</name>
<email>mav@FreeBSD.org</email>
</author>
<published>2010-11-02T09:13:13Z</published>
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<id>urn:sha1:2d50ce53ae450203ad5b8291856738cdb4ed276d</id>
<content type='text'>
Add missing byteswap, works on big endian systems now (tested on Netlogic
XLS MIPS processor).
</content>
</entry>
<entry>
<title>MFC r212359:</title>
<updated>2010-09-30T04:03:14Z</updated>
<author>
<name>Nathan Whitehorn</name>
<email>nwhitehorn@FreeBSD.org</email>
</author>
<published>2010-09-30T04:03:14Z</published>
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<id>urn:sha1:37d498616ff08841c90ec3ad2d56f89ee83a9755</id>
<content type='text'>
Fix a problem where device detection would work unreliably on Serverworks
K2 SATA controllers. The chip's status register must be read first, and
as a long, for other registers to be correctly updated after a command, and
this includes the command sequence in device detection as well as the
previously handled case after interrupts. While here, clean up some
previous hacks related to this controller.
</content>
</entry>
<entry>
<title>MFC r212146:</title>
<updated>2010-09-16T02:47:09Z</updated>
<author>
<name>Alexander Motin</name>
<email>mav@FreeBSD.org</email>
</author>
<published>2010-09-16T02:47:09Z</published>
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<id>urn:sha1:645892c84c05c96c0c638d9728a5e9fe0eab87a9</id>
<content type='text'>
Add workaround for SiI3114 and SiI3512 chips bug, which caused sending
R_ERR in response to DMA activate FIS under certain circumstances. This is
recommended fix from chip datasheet. If triggered, this bug most likely
caused write command timeout.
</content>
</entry>
<entry>
<title>MFC r212145:</title>
<updated>2010-09-16T02:44:23Z</updated>
<author>
<name>Alexander Motin</name>
<email>mav@FreeBSD.org</email>
</author>
<published>2010-09-16T02:44:23Z</published>
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<id>urn:sha1:a848350888c744a1976ee7c4a5a4b631bc01b235</id>
<content type='text'>
SATA1.x SiliconImage controllers on power-on reset TFD Status register into
value 0xff. On hot-plug this value confuses ata_generic_reset() device
presence detection logic. As soon as we already know drive presence from
SATA hard reset, hint ata_generic_reset() to wait for device signature
until success or full timeout.
</content>
</entry>
<entry>
<title>MFC r212081:</title>
<updated>2010-09-16T02:42:52Z</updated>
<author>
<name>Alexander Motin</name>
<email>mav@FreeBSD.org</email>
</author>
<published>2010-09-16T02:42:52Z</published>
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<id>urn:sha1:75cc8b6422b2c382d3170d8f544a3a8ef002a74f</id>
<content type='text'>
Increase device reset timeout from 10 to 15 seconds, same as in ahci(4).
Some devices found need about 10-12 seconds to spinup.
</content>
</entry>
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