FreeBSD source tree https://cgit-dev.freebsd.org/src-test2/atom?h=stable%2F7 2012-10-28T13:21:35Z 2012-10-28T13:21:35Z Gavin Atkinson gavin@FreeBSD.org 2012-10-28T13:21:35Z urn:sha1:8a605e84584bb76fcd9578434bedc36c155f6761 Align the PCI Express #defines with the style used for the PCI-X #defines. This has the advantage that it makes the names more compact, and also allows us to correct the non-uniform naming of the PCIM_LINK_* defines, making them all consistent amongst themselves. This is a mostly mechanical rename: s/PCIR_EXPRESS_/PCIER_/g s/PCIM_EXP_/PCIEM_/g s/PCIM_LINK_/PCIEM_LINK_/g In this MFC, #defines have been added for the old names to assist merges and out-of-tree drivers. 2012-02-15T03:35:39Z Pyun YongHyeon yongari@FreeBSD.org 2012-02-15T03:35:39Z urn:sha1:76757a04fcfcf6c7176c1c373bc2ab03fa19f82e style. No functional changes. 2012-01-06T21:46:35Z Pyun YongHyeon yongari@FreeBSD.org 2012-01-06T21:46:35Z urn:sha1:d7819f7cb64b5d48d3c1d27086883ac5d9605080 r228333: Protect SIOCSIFMTU ioctl handler with driver lock. Don't blindly re-initialize controller whenever MTU is changed. Now, reinitializing is done only when driver is running. While here, remove unnecessary assignment of error value since it was already initialized to 0. r228335: Consistently use a tab character instead of using either a space or tab after #define. While I'm here consistently use capital letters when it uses hexadecimal notation. No functional changes. r228336: Disable all clocks and put PHY into COMA before entering into suspend state. This will save more power. On resume, make sure to enable all clocks. While I'm here, if controller is not fast ethernet, enable gigabit PHY. r228362: Do not disable interrupt without knowing whether the raised interrupt is ours. Note, interrupts are automatically ACKed when the status register is read. Add RX/TX DMA error to interrupt handler and do full controller reset if driver happen to encounter these errors. There is no way to recover from these DMA errors without controller reset. Rename local variable name intrs with status to enhance readability. While I'm here, rename ET_INTR_TXEOF and ET_INTR_RXEOF to ET_INTR_TXDMA and ET_INTR_RXDMA respectively. These interrupts indicate that a frame is successfully DMAed to controller's internal FIFO and they have nothing to do with EOF(end of frame). Driver does not need to wait actual end of TX/RX of a frame(e.g. no need to wait the end signal of TX which is generated when a frame in TX FIFO is emptied by MAC). Previous names were somewhat confusing. r228368: Remove unnecessary definition of ET_PCIR_BAR. Controller support I/O memory only. While here, use pci_set_max_read_req(9) rather than directly manipulating PCIe device control register. r228369: Announce flow control ability to PHY driver and enable RX flow control. Controller does not automatically generate pause frames based on number of available RX buffers so it's very hard to know when driver should generate XON frame in time. The only mechanism driver can detect low number of RX buffer condition is ET_INTR_RXRING0_LOW or ET_INTR_RXRING1_LOW interrupt. This interrupt is generated whenever controller notices the number of available RX buffers are lower than pre-programmed value( ET_RX_RING0_MINCNT and ET_RX_RING1_MINCNT register). This scheme does not provide a way to detect when controller sees enough number of RX buffers again such that efficient generation of XON/XOFF frame is not easy. While here, add more flow control related register definition. r228381: FreeBSD driver does not require arpcom structure in softc. 2012-01-06T19:27:51Z Pyun YongHyeon yongari@FreeBSD.org 2012-01-06T19:27:51Z urn:sha1:69a2f96b0e07a3c716cc605d3c8dcc6d3be34780 r228326: Controller does not require TX start command for every frame. So send a single TX command after setting up all TX frames. This removes unnecessary register accesses and bus_dmamap_sync(9) calls. et(4) uses TX interrupt moderation so it's possible to have TX buffers that were already transmitted but waiting for TX completion interrupt. If the number of available TX descriptor is less then 1/3 of total TX descriptor, try reclaiming first to get enough free TX descriptors before setting up TX descriptors. After r228325, et_txeof() no longer tries to send frames after reclaiming TX buffers. That change was made to give more chance to transmit frames in main interrupt handler since we can still send frames in interrupt handler with RX interrupt. So right before exiting interrupt hander, after enabling interrupt, try to send more frames. This gives slightly better performance numbers. While I'm here reduce number of spare TX descriptors from 8 to 4. Controller does not require reserved TX descriptors, it was just to reduce TX overhead. After r228325, driver has much lower TX overhead so it does not make sense to reserve 8 TX descriptors. r228327: Remove et_enable_intrs(), et_disable_intrs() functions and manipulation of interrupt register access is done through CSR_WRITE_4 macro. Also add disabling interrupt into et_reset() because we want interrupt disabled state after controller reset. While I'm here slightly change interrupt handler to be more readable one. r228331: Rework link state tracking and TX/RX MAC configuration. o Do not report link status if driver is not running. o TX/RX MAC configuration should be done with resolved speed, duplex and flow control after establishing a link so it can't be done in driver initialization routine. Move the configuration to miibus_statchg callback which will be called whenever any link state change is detected. At this moment, flow-control is not enabled yet mainly because I was not able to set correct flow control parameters to generate TX pause frames. o Now TX/RX MAC is enabled only when a valid link is detected. Rearragnge hardware initialization routine a bit to leave enabling MAC to miibus_statchg callback. In order to that, TX/RX DMA engine is enabled in et_init_locked(). o Introduce ET_FLAG_LINK flag to track current link state. o Introduce ET_FLAG_FASTETHER flag to mark whether controller is fast ethernet. This flag is checked in miibus_statchg callback to know whether PHY established a valid link. o In et_stop(), TX/RX MAC is explicitly disabled instead of relying on et_reset(). And move et_reset() from et_stop() to controller initialization. Controler reset is not required here and it would also clear critial registers(i.e station address, RX filter configuration, WOL etc) that are required to make WOL work. o Switching to current media is done in et_init_locked() after setting IFF_DRV_RUNNING flag. This should ensure reliable auto-negotiation/manual link establishment. o In et_start_locked(), check whether driver got a valid link before trying to send frames. o Remove checking a link in et_tick() as this is done by miibus_statchg callback. r228332: Implement hardware MAC statistics counter. Counters could be queried with dev.et.%d.stats sysctl node where %d is an instance of device. 2012-01-06T19:12:47Z Pyun YongHyeon yongari@FreeBSD.org 2012-01-06T19:12:47Z urn:sha1:3ad9090b81d55ae145fe916344af5dbf577c09e7 Overhaul bus_dma(9) usage in et(4) and clean up TX/RX path. This change should make et(4) work on any architectures. o Remove m_getl inline function and replace it with stanard mbuf interfaces. Previous code tried to minimize code duplication but this came from incorrect use of common DMA tag. Driver may be still use a common RX allocation handler with additional structure changes but I don't see much point to do that it would make it hard to understand the code. o Remove DragonflyBSD specific constant EVL_ENCAPLEN, use ETHER_VLAN_ENCAP_LEN instead. o Add bunch of new RX status definition. It seems controller supports RX checksum offloading but I was not able to make the feature work yet. Currently driver checks whether recevied frame is good one or not. o Avoid a typedef ending in '_t' as style(9) says. o Controller has no restriction on DMA address space, so there is no reason to limit the DMA address to 32bit. Descriptor rings, status blocks and TX/RX buffers now use full 64bit DMA addressing. o Allocate DMA memory shared between host and controller as coherent. o Create 3 separate DMA tags to be used as TX, mini RX ring and stanard RX ring. Previously it created a single DMA tag and it was used to all three rings. o et(4) does not support jumbo frame at this moment and I still don't quite understand how jumbo frame works on this controller so use two RX rings to handle small sized frame and normal sized frame respectively. The mini RX ring will be used to receive frames that are less than or equal to 127 bytes. The second RX ring is used to receive frames that are not handled by the first RX ring. If jumbo frame support is implemented, driver may have to choose better RX scheme by letting the second RX ring handle jumbo frames. This scheme will mimic Broadcom's efficient jumbo frame handling feature. However RAM buffer size(16KB) of the controller is too small to hold 2 jumbo frames, if 9KB jumbo frame is used, I'm not sure how good performance would it have. o In et_rxeof(), make sure to check whether controller received good frame or not. Passing corrupted frame to upper layer is bad idea. o If driver receives a bad frame or driver fails to allocate RX buffer due to resource shortage condition, reuse previously loaded DMA map for RX buffer instead of unloading/loading RX buffer again. o et_init_tx_ring() never fails so change return type to void. o In watchdog handler, show TX DMA write back status of errored frame which could be used as a clue to debug watchdog timeout. o Add missing bus_dmamap_sync() in various places such that et(4) should work with bounce buffers(e.g. PAE). o TX side bus_dmamap_load_mbuf_sg(9) support. o RX side bus_dmamap_load_mbuf_sg(9) support. o Controller has no DMA alignment limit in RX buffer so use m_adj(9) in RX buffer allocation to make IP header align on 2 bytes boundary. Otherwise it would trigger unaligned access error in upper layer on strict alignment architectures. One of down side of controller is it provides limited set of RX buffer length like most Intel controllers. This is not problem at this moment because driver does not support jumbo frame yet but it may require alignment fixup code to support jumbo frame on strict alignment architectures. o In et_txeof(), don't zero TX descriptors for transmitted frames. TX descriptors don't need write access after transmission. Driver sets IFF_DRV_OACTIVE when the number of available TX descriptors are less than or equal to ET_NSEG_SPARE. Make sure to clear IFF_DRV_OACTIVE only when the number of available TX descriptor is greater than ET_NSEG_SPARE. 2012-01-06T18:18:25Z Pyun YongHyeon yongari@FreeBSD.org 2012-01-06T18:18:25Z urn:sha1:570a58be9f013f66c95c17779bf8ab990aeda04e r228291: Remove NetBSD license. r199548 removed all bit macros that were derived from NetBSD. r228292: Implement suspend/resume methods. Driver has no issue with suspend/resume. r228293: Fix alt(4) support. Also add check for number of available TX descriptors before trying to send frames. If we're not able to send a frame, make sure to prepend it to if_snd queue such that alt(4) should work. While I'm here prefer ETHER_BPF_MTAP to BPF_MTAP. ETHER_BPF_MTAP should be used for controllers that support VLAN hardware tag insertion. The controller supports VLAN tag insertion but lacks VLAN tag stripping in RX path though. r228297: et(4) supports VLAN oversized frame so correctly set header length. While I'm here remove initializing if_mtu, it is set by ether_ifattach(9). Also move callout_init_mtx(9) to the right below driver lock initialization. r228298: Make et_probe() return BUS_PROBE_DEFAULT such that allow other driver that has high precedence for the controller override et(4). Add missing callout_drain(9) in device detach and rework detach routine. While I'm here use rman_get_rid(9) instead of using cached resource id because bus methods are free to change the id. 2011-12-31T01:33:25Z Pyun YongHyeon yongari@FreeBSD.org 2011-12-31T01:33:25Z urn:sha1:6b687baf106d236908cf85d4d7c38bafc68b63a7 r226480: Add missing driver lock in media status handler. r226481: Make sure to report media change status to caller. Previously it always reported success. 2011-09-11T20:25:57Z Marius Strobl marius@FreeBSD.org 2011-09-11T20:25:57Z urn:sha1:99e4ce3e7b07bcdeca71fdffa04401cb54e795aa - Let mii_phy_add_media() also announce the support of IFM_NONE. - Add a PHY-specific reset routine is for lxtphy(4) which disables MII interrupts. - Remove redundant checks in NIC drivers for mii->mii_instance not being zero before calling the reset routines because as soon as one PHY driver attaches mii->mii_instance is incremented and we hardly can end up in their media change callbacks etc if no PHY driver has attached as mii_attach() would have failed in that case and not attach a miibus(4) instance. - Convert the mebers of the MII data structure to unsigned where appropriate. This is partly inspired by NetBSD/OpenBSD. - Add MIIF_NOMANPAUSE and mii_phy_flowstatus() calls to drivers that weren't explicitly converted to support flow control before. It's unclear whether flow control actually works with these but typically it should and their net behavior should be more correct with these changes in place than without if the MAC driver sets MIIF_DOPAUSE. Obtained from: NetBSD (partially) 2010-11-07T17:38:54Z Marius Strobl marius@FreeBSD.org 2010-11-07T17:38:54Z urn:sha1:5ef253ad3271b78ee1e9eb8cad20afaf6e613671 Converted the remainder of the NIC drivers to use the mii_attach() introduced in r213878 (MFC'ed to stable/7 in r214685) instead of mii_phy_probe(). Unlike r213893 (MFC'ed to stable/7 in r214910) these are mostly straight forward conversions though. 2010-10-08T19:25:46Z Pyun YongHyeon yongari@FreeBSD.org 2010-10-08T19:25:46Z urn:sha1:38d1bcec10ceadcd58b5823f053d930f9a49a1c0 Make sure to clear IFF_DRV_RUNNING to reinitialize controller. While I'm here update if_oerrors counter when driver encounters watchdog timeout.