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<title>src-test2/sys/dev/etherswitch/arswitch, branch release/11.3.0</title>
<subtitle>FreeBSD source tree</subtitle>
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<updated>2018-03-29T02:50:57Z</updated>
<entry>
<title>Revert r330897:</title>
<updated>2018-03-29T02:50:57Z</updated>
<author>
<name>Eitan Adler</name>
<email>eadler@FreeBSD.org</email>
</author>
<published>2018-03-29T02:50:57Z</published>
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<id>urn:sha1:4ab2e064d7950be84256d671a7ae93f87cc6aa36</id>
<content type='text'>
This was intended to be a non-functional change. It wasn't. The commit
message was thus wrong. In addition it broke arm, and merged crypto
related code.

Revert with prejudice.

This revert skips files touched in r316370 since that commit was since
MFCed. This revert also skips files that require $FreeBSD$ property
changes.

Thank you to those who helped me get out of this mess including but not
limited to gonzo, kevans, rgrimes.

Requested by: gjb (re)
</content>
</entry>
<entry>
<title>Partial merge of the SPDX changes</title>
<updated>2018-03-14T03:19:51Z</updated>
<author>
<name>Eitan Adler</name>
<email>eadler@FreeBSD.org</email>
</author>
<published>2018-03-14T03:19:51Z</published>
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<id>urn:sha1:be5d0b9566b13fdf8cabebb63334cbec12bfc409</id>
<content type='text'>
These changes are incomplete but are making it difficult
to determine what other changes can/should be merged.

No objections from:	pfg
</content>
</entry>
<entry>
<title>MFC r303339:</title>
<updated>2018-03-05T08:14:11Z</updated>
<author>
<name>Eitan Adler</name>
<email>eadler@FreeBSD.org</email>
</author>
<published>2018-03-05T08:14:11Z</published>
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<id>urn:sha1:452a2c2576bedcf62687dfddc7c8c5d81ead2431</id>
<content type='text'>
Update my TODO items.
</content>
</entry>
<entry>
<title>Cleanup unnecessary semicolons from the kernel.</title>
<updated>2016-04-10T23:07:00Z</updated>
<author>
<name>Pedro F. Giffuni</name>
<email>pfg@FreeBSD.org</email>
</author>
<published>2016-04-10T23:07:00Z</published>
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<id>urn:sha1:74b8d63dcc17c07d8cb21e13f6db517698efd49f</id>
<content type='text'>
Found with devel/coccinelle.
</content>
</entry>
<entry>
<title>[mdio] migrate mdiobus out of etherswitch and into a top-level device of its own.</title>
<updated>2015-12-26T02:31:39Z</updated>
<author>
<name>Adrian Chadd</name>
<email>adrian@FreeBSD.org</email>
</author>
<published>2015-12-26T02:31:39Z</published>
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<id>urn:sha1:71e8eac4fd89dedbcb4130379add151d3ed942fa</id>
<content type='text'>
The mdio driver interface is generally useful for devices that require
MDIO without the full MII bus interface. This lifts the driver/interface
out of etherswitch(4), and adds a mdio(4) man page.

Submitted by:	Landon Fuller &lt;landon@landonf.org&gt;
Differential Revision:	https://reviews.freebsd.org/D4606
</content>
</entry>
<entry>
<title>[arswitch] bump the number of ports on the ar934x internal switch.</title>
<updated>2015-12-15T04:46:48Z</updated>
<author>
<name>Adrian Chadd</name>
<email>adrian@FreeBSD.org</email>
</author>
<published>2015-12-15T04:46:48Z</published>
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<id>urn:sha1:fd81a3291acc0a0397dc6bf21005029ba68fffad</id>
<content type='text'>
It indeed has more ports by default.
</content>
</entry>
<entry>
<title>AR8327: Fix up the ability to configure the vlangroup configuration for the CPU port</title>
<updated>2015-10-20T21:18:02Z</updated>
<author>
<name>Adrian Chadd</name>
<email>adrian@FreeBSD.org</email>
</author>
<published>2015-10-20T21:18:02Z</published>
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<id>urn:sha1:8f1cf028d33ab9792277b4a30c1b1450da766839</id>
<content type='text'>
I messed up when doing the reset_vlans method - setting vid[0] = 1 here
was making it 'hidden' from configuration (as it needed ETHERSWITCH_VID_VALID
as well) and so there was no way to configure vlangroup0.

In per-port VLAN mode, vlangroup0 is for the CPU port (port0).
Now, it normally wouldn't really matter - the CPU port thus sees
all other ports. However there are two CPU ports on the AR8327 and
so port0 (arge0) was seeing all traffic on port6 (arge1).
If you thus tried to use arge1/port6 for anything (eg a WAN port)
in a bridge group then things would very upset very quickly.

Whilst here, add a comment to remind myself that yes, it'd be nice
if we could specify a boot-time switch config.

Tested:

* AP135 reference platform w/ AR8327N switch
</content>
</entry>
<entry>
<title>Turns out the AR933x looks like the AR7240/AR7241 switch as far as VLAN</title>
<updated>2015-03-28T23:20:46Z</updated>
<author>
<name>Adrian Chadd</name>
<email>adrian@FreeBSD.org</email>
</author>
<published>2015-03-28T23:20:46Z</published>
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<id>urn:sha1:012bc22a86853c76bfd40c35df07ef1dd40147b3</id>
<content type='text'>
configuration is concerned.

So, remove the now-erroneous comment.

Tested:

* AR9331 - Carambola2, with transmitting dot1q tagged packets around.
</content>
</entry>
<entry>
<title>Commit 802.1q configuration support for the AR8327.</title>
<updated>2015-03-13T02:16:39Z</updated>
<author>
<name>Adrian Chadd</name>
<email>adrian@FreeBSD.org</email>
</author>
<published>2015-03-13T02:16:39Z</published>
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<id>urn:sha1:036e1c7646155d1faaeeced9399f7b37e686d1f4</id>
<content type='text'>
This is slightly different to the other switches - the VLAN table
(VTU) programs in the vlan port mapping /and/ the port config
(tagged, untagged, passthrough, any.)

So:

* Add VTU operations to program the VTU (vlan table)
* abstract out the mirror-disable function so it's .. well, a function.
* setup the port to have a dot1q configuration for dot1q - the
  port security is VLAN (not per-port VLAN) and requires an entry
  in the VLAN table;
* add set_dot1q / get_dot1q to program the VLAN table;
* since the tagged/untagged ports are now programmed into the VTU,
  rather than global - plumb the ports /and/ untagged ports bitmaps
  through the arswitch API.

Tested:

* AP135 - QCA9558 SoC + AR8327N switch
</content>
</entry>
<entry>
<title>Methodise a couple more of the VLAN methods.</title>
<updated>2015-03-08T23:02:15Z</updated>
<author>
<name>Adrian Chadd</name>
<email>adrian@FreeBSD.org</email>
</author>
<published>2015-03-08T23:02:15Z</published>
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<id>urn:sha1:f35f94f4fdbc7eea6688d49ceeeb28417e2177c4</id>
<content type='text'>
</content>
</entry>
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