src-test2/sys/dev/ic, branch release/11.3.0

Revert r330897:

2018-03-29T02:50:57Z

This was intended to be a non-functional change. It wasn't. The commit message was thus wrong. In addition it broke arm, and merged crypto related code. Revert with prejudice. This revert skips files touched in r316370 since that commit was since MFCed. This revert also skips files that require $FreeBSD$ property changes. Thank you to those who helped me get out of this mess including but not limited to gonzo, kevans, rgrimes. Requested by: gjb (re)

Partial merge of the SPDX changes

2018-03-14T03:19:51Z

These changes are incomplete but are making it difficult to determine what other changes can/should be merged. No objections from: pfg

sys/dev: minor spelling fixes.

2016-05-03T03:41:25Z

Most affect comments, very few have user-visible effects.

- Add support for Advantech PCI-1602 Rev. B1 and PCI-1603 cards. [1]

2016-01-10T18:11:23Z

- Add a description of Advantech PCI-1602 Rev. A boards. [1] - Properly set up REG_ACR also for PCI-1602 Rev. A based on what the Advantech-supplied Linux driver does. - Additionally use the macros of to replace existing magic values and get rid of trivial comments. - Fix the style of some comments. PR: 205359 [1] Submitted by: Jan Mikkelsen (original patch) [1]

This should have been GC'd 6 years ago when ar(4) was removed.

2015-02-17T05:07:38Z

Wait for DesignWare UART transfers completion before accessing line control

2013-10-26T17:24:59Z

When using DW UART with BUSY detection it is necessary to wait until all serial transfers are finished before manipulating the line control. LCR will not be affected when UART is busy. In addition, if Divisor Latch Access Bit is being set in order to modify UART divisors: 1. We will get BUSY interrupt if interrupts are enabled. 2. Because LCR will not be affected the THR and (even worse) IER contents will be corrupted. This will lead to console hang. Approved by: cognet (mentor)

Add support for A10 uart.

2013-03-01T01:42:31Z

A10 uart is derived from Synopsys DesignWare uart and requires to read Uart Status Register when IIR_BUSY has detected. Also this change includes FDT check, where it checks device specific properties defined in dts and sets the busy_detect variable. broken_txfifo is also needed to be set in order to make it work for A10 uart case. Reviewed by: marcel@ Approved by: gonzo@

Merge from projects/mips to head by hand:

2010-01-11T04:13:06Z

Defintions for cavium uart (do they belong here?)

add %b formats for various registers

2009-06-21T19:17:22Z

- Cleanup i8251 related defines.

2008-09-07T04:35:04Z

- Move i8255 related defines into a separate file.