<feed xmlns='http://www.w3.org/2005/Atom'>
<title>src-test2/sys/dev/ic, branch release/7.2.0_cvs</title>
<subtitle>FreeBSD source tree</subtitle>
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<updated>2009-05-01T02:51:58Z</updated>
<entry>
<title>Copy releng/7.2 to release/7.2.0 for FreeBSD 7.2-RELEASE.</title>
<updated>2009-05-01T02:51:58Z</updated>
<author>
<name>Ken Smith</name>
<email>kensmith@FreeBSD.org</email>
</author>
<published>2009-05-01T02:51:58Z</published>
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<id>urn:sha1:b205d83df7763ca1f099bce5ac12a05862a626c4</id>
<content type='text'>
Approved by:	re (implicit)

This commit was manufactured to restore the state of the 7.2-RELEASE image.
</content>
</entry>
<entry>
<title>Fix style nits.  No md5 changes in .o's. ;-)</title>
<updated>2006-09-08T21:46:01Z</updated>
<author>
<name>Jung-uk Kim</name>
<email>jkim@FreeBSD.org</email>
</author>
<published>2006-09-08T21:46:01Z</published>
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<id>urn:sha1:0da90eb878fdcd8c766c609afbf5f53cc56858e7</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Enhanced floppy controllers have Data Rate Select Register (DSR) at 0x3f4.</title>
<updated>2006-07-06T21:12:18Z</updated>
<author>
<name>Jung-uk Kim</name>
<email>jkim@FreeBSD.org</email>
</author>
<published>2006-07-06T21:12:18Z</published>
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<id>urn:sha1:50d99d1a52d3bc87a4897cc87db950960060e35e</id>
<content type='text'>
Use it to reset controller and to select data rate.  According to Intel
80277AA datasheet, software reset behaves the same as DOR reset except
that it is self clearing.  National Semiconductor PC8477B datasheet says
the same.  As a side effect, we no longer use Configuration Control
Register (CCR) at 0x3f7 for these controllers, which is often missing
in modern hardware.
</content>
</entry>
<entry>
<title>Allow uart(4)'s ns8250 driver to work with devices whose regshift is &gt; 0.</title>
<updated>2006-05-23T00:41:12Z</updated>
<author>
<name>Benno Rice</name>
<email>benno@FreeBSD.org</email>
</author>
<published>2006-05-23T00:41:12Z</published>
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<id>urn:sha1:58957d87173648541b214726c95eb4614ba31848</id>
<content type='text'>
- Rename REG_DL to REG_DLL and REG_DLH.
- Always treat DLL and DLH as two separate 8-bit registers instead of one
  16-bit register.

Additionally, remove the probe for the high 4 bits of IER being 0 and don't
assume we can always read/write 0 to/from those bits.

These changes allow uart(4) to drive the UARTs on the Intel XScale PXA255.

Reviewed by:	marcel
</content>
</entry>
<entry>
<title>MFp4:</title>
<updated>2006-02-24T02:03:35Z</updated>
<author>
<name>Marcel Moolenaar</name>
<email>marcel@FreeBSD.org</email>
</author>
<published>2006-02-24T02:03:35Z</published>
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<id>urn:sha1:1ba1685b25c0189a4a2f2118b7151b96ccfec929</id>
<content type='text'>
Add CHAN_A &amp; CHAN_B for channel register offsets.
While here, fix a comment.
</content>
</entry>
<entry>
<title>Register definitions for the ancient via6522. This 20+ year-old chip</title>
<updated>2005-12-02T22:36:14Z</updated>
<author>
<name>Peter Grehan</name>
<email>grehan@FreeBSD.org</email>
</author>
<published>2005-12-02T22:36:14Z</published>
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<id>urn:sha1:e2b03d4d48a74dda22342289a7b5ba6be59b192b</id>
<content type='text'>
still exists as a cell in the Macio asic on Apples, and is used to communicate
through the shift register with the external PMU microcontroller.
</content>
</entry>
<entry>
<title>Typo.</title>
<updated>2005-10-23T09:05:51Z</updated>
<author>
<name>Gleb Smirnoff</name>
<email>glebius@FreeBSD.org</email>
</author>
<published>2005-10-23T09:05:51Z</published>
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<id>urn:sha1:21314694fbb5c1d6b46de9f3ee7d2ef4aa0a0ba5</id>
<content type='text'>
PR:		misc/87679
Submitted by:	Alan Amesbury &lt;amesbury umn.edu&gt;
</content>
</entry>
<entry>
<title>cosmetic change.</title>
<updated>2005-05-14T10:26:31Z</updated>
<author>
<name>Yoshihiro Takahashi</name>
<email>nyan@FreeBSD.org</email>
</author>
<published>2005-05-14T10:26:31Z</published>
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<id>urn:sha1:dfe1941a9cfbe83485b626fbfae285dee2e3024f</id>
<content type='text'>
</content>
</entry>
<entry>
<title>- Move bus dependent defines to {isa,cbus}_dmareg.h.</title>
<updated>2005-05-14T10:14:56Z</updated>
<author>
<name>Yoshihiro Takahashi</name>
<email>nyan@FreeBSD.org</email>
</author>
<published>2005-05-14T10:14:56Z</published>
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<id>urn:sha1:b22bf660630ff6f6b82b9c17abd9721c3fd8bcef</id>
<content type='text'>
- Use isa/isareg.h rather than &lt;arch&gt;/isa/isa.h.

Tested on: i386, pc98
</content>
</entry>
<entry>
<title>- Move timerreg.h to &lt;arch&gt;/include and split i8253 specific defines into</title>
<updated>2005-05-14T09:10:02Z</updated>
<author>
<name>Yoshihiro Takahashi</name>
<email>nyan@FreeBSD.org</email>
</author>
<published>2005-05-14T09:10:02Z</published>
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<id>urn:sha1:24072ca35b756417b697443a11c2a96eccf05649</id>
<content type='text'>
  i8253reg.h, and add some defines to control a speaker.
- Move PPI related defines from i386/isa/spkr.c into ppireg.h and use them.
- Move IO_{PPI,TIMER} defines into ppireg.h and timerreg.h respectively.
- Use isa/isareg.h rather than &lt;arch&gt;/isa/isa.h.

Tested on: i386, pc98
</content>
</entry>
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