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<title>src-test2/sys/dev/scc, branch release/10.0.0</title>
<subtitle>FreeBSD source tree</subtitle>
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<updated>2013-08-03T21:24:52Z</updated>
<entry>
<title>Make r253899 compile.</title>
<updated>2013-08-03T21:24:52Z</updated>
<author>
<name>Marius Strobl</name>
<email>marius@FreeBSD.org</email>
</author>
<published>2013-08-03T21:24:52Z</published>
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<id>urn:sha1:eb84fc95061d8b4f540ac1befe4fdab834597378</id>
<content type='text'>
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</entry>
<entry>
<title>Const'ify scc_driver_name.</title>
<updated>2013-08-02T23:31:51Z</updated>
<author>
<name>Marius Strobl</name>
<email>marius@FreeBSD.org</email>
</author>
<published>2013-08-02T23:31:51Z</published>
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<id>urn:sha1:1e53269ac2d96ce70747e18aa1942285ffee67dd</id>
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</entry>
<entry>
<title>- Use NULL instead of 0 for pointers.</title>
<updated>2013-08-02T23:30:32Z</updated>
<author>
<name>Marius Strobl</name>
<email>marius@FreeBSD.org</email>
</author>
<published>2013-08-02T23:30:32Z</published>
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<id>urn:sha1:71bda3eb9aa62e7073ad31ff4c374a21e2fc34ef</id>
<content type='text'>
- Remove unnecessary __RMAN_RESOURCE_VISIBLE.
</content>
</entry>
<entry>
<title>- Implement iclear methods for QUICC and SAB 82532. With r253161 in place,</title>
<updated>2013-08-02T23:28:49Z</updated>
<author>
<name>Marius Strobl</name>
<email>marius@FreeBSD.org</email>
</author>
<published>2013-08-02T23:28:49Z</published>
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<id>urn:sha1:c4b1deaf0d05e7ba715124b4c752edef80222115</id>
<content type='text'>
  this is is crucial at least for the latter.
  What happens is that attaching uart(4) to scc(4) causes the SAB 82532 to
  "receive" something and trigger a SER_INT_RXREADY interrupt, given that
  at least fast/filter interrupts are already enabled. Prior to r253161,
  uart_bus_ihand() was set up at this point and handled that condition,
  i. e. read the RX FIFO and issued a Receive Message Complete.
  Now, uart_bus_ihand() and uart_intr() are setup after attaching uart(4),
  leaving the SER_INT_RXREADY interrupt triggered during the latter to
  be handled by the iclear method. However, with that method not implement,
  this in turn causes SAB 82532 to not issue any further SER_INT_RXREADY
  interrupts until the RX FIFO is full again. Thus, 15 received bytes go
  to nowhere, given that "the other half" of the RX FIFO is used for status
  information. Hence, implementing sab82532_bfe_iclear() fixes things again.
  Potentially, the same problem exists for QUICC.
- Remove unnecessary __RMAN_RESOURCE_VISIBLE.
- Remove a superfluous header.
- Use KOBJMETHOD_END.
- Mark unused arguments as such.
- Remove variables unused after initialization.

Reviewed by:	marcel (earlier version)
</content>
</entry>
<entry>
<title>- There's no need to overwrite the default device method with the default</title>
<updated>2011-11-22T21:28:20Z</updated>
<author>
<name>Marius Strobl</name>
<email>marius@FreeBSD.org</email>
</author>
<published>2011-11-22T21:28:20Z</published>
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<id>urn:sha1:4b7ec27007570e0ce4fe9dbb447e7afc131b487a</id>
<content type='text'>
  one. Interestingly, these are actually the default for quite some time
  (bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9)
  since r52045) but even recently added device drivers do this unnecessarily.
  Discussed with: jhb, marcel
- While at it, use DEVMETHOD_END.
  Discussed with: jhb
- Also while at it, use __FBSDID.
</content>
</entry>
<entry>
<title>Mark MALLOC_DEFINEs static that have no corresponding MALLOC_DECLAREs.</title>
<updated>2011-11-07T06:44:47Z</updated>
<author>
<name>Ed Schouten</name>
<email>ed@FreeBSD.org</email>
</author>
<published>2011-11-07T06:44:47Z</published>
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<id>urn:sha1:d745c852becf3792a2185003947324721209195a</id>
<content type='text'>
This means that their use is restricted to a single C file.
</content>
</entry>
<entry>
<title>Recognize the SAB 82532 found in Fujitsu PRIMEPOWER650 and 900.</title>
<updated>2011-05-15T13:27:38Z</updated>
<author>
<name>Marius Strobl</name>
<email>marius@FreeBSD.org</email>
</author>
<published>2011-05-15T13:27:38Z</published>
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<id>urn:sha1:c71dacd16819b980c0b740e5cecc5e9f6331c080</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Make iclear return int, since that matches all function definitions of it.</title>
<updated>2009-02-05T19:32:34Z</updated>
<author>
<name>Warner Losh</name>
<email>imp@FreeBSD.org</email>
</author>
<published>2009-02-05T19:32:34Z</published>
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<id>urn:sha1:005f7c33086f8ecbcc37a2915e13e69bf1c158c3</id>
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</entry>
<entry>
<title>With rev 1.24 of sys/powerpc/powermac/macio.c, we now get a</title>
<updated>2008-04-26T18:40:59Z</updated>
<author>
<name>Marcel Moolenaar</name>
<email>marcel@FreeBSD.org</email>
</author>
<published>2008-04-26T18:40:59Z</published>
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<id>urn:sha1:6239f9e5f1c3272eb7d16415bb6c24bef21b1f1d</id>
<content type='text'>
total of 6 interrupt resources for scc(4) on macio(4). This
is 3 per channel, of which the 1st of each channel is the
interrupt associated with the SCC. The other 2 are for DMA
operation.
Change scc_bfe_attach() to accept an argument that's the
number of interrupts per channel (ipc) and change each bus
front-end (bfe) to pass that argument through a wrapper
for the device_attach method.

For now, we only allocate the 1st interrupt of each channel
to perserve behaviour.
</content>
</entry>
<entry>
<title>Support for Freescale QUad Integrated Communications Controller.</title>
<updated>2008-03-03T18:20:17Z</updated>
<author>
<name>Rafal Jaworowski</name>
<email>raj@FreeBSD.org</email>
</author>
<published>2008-03-03T18:20:17Z</published>
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<id>urn:sha1:e1ef781113fba635a7fa4a979607261385971992</id>
<content type='text'>
The QUICC engine is found on various Freescale parts including MPC85xx, and
provides multiple generic time-division serial channel resources, which are in
turn muxed/demuxed by the Serial Communications Controller (SCC).

Along with core QUICC/SCC functionality a uart(4)-compliant device driver is
provided which allows for serial ports over QUICC/SCC.

Approved by:	cognet (mentor)
Obtained from:	Juniper
MFp4:		e500
</content>
</entry>
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