src-test2/sys/dev/scc, branch release/8.1.0 FreeBSD source tree https://cgit-dev.freebsd.org/src-test2/atom?h=release%2F8.1.0 2009-02-05T19:32:34Z Make iclear return int, since that matches all function definitions of it. 2009-02-05T19:32:34Z Warner Losh imp@FreeBSD.org 2009-02-05T19:32:34Z urn:sha1:005f7c33086f8ecbcc37a2915e13e69bf1c158c3 With rev 1.24 of sys/powerpc/powermac/macio.c, we now get a 2008-04-26T18:40:59Z Marcel Moolenaar marcel@FreeBSD.org 2008-04-26T18:40:59Z urn:sha1:6239f9e5f1c3272eb7d16415bb6c24bef21b1f1d total of 6 interrupt resources for scc(4) on macio(4). This is 3 per channel, of which the 1st of each channel is the interrupt associated with the SCC. The other 2 are for DMA operation. Change scc_bfe_attach() to accept an argument that's the number of interrupts per channel (ipc) and change each bus front-end (bfe) to pass that argument through a wrapper for the device_attach method. For now, we only allocate the 1st interrupt of each channel to perserve behaviour. Support for Freescale QUad Integrated Communications Controller. 2008-03-03T18:20:17Z Rafal Jaworowski raj@FreeBSD.org 2008-03-03T18:20:17Z urn:sha1:e1ef781113fba635a7fa4a979607261385971992 The QUICC engine is found on various Freescale parts including MPC85xx, and provides multiple generic time-division serial channel resources, which are in turn muxed/demuxed by the Serial Communications Controller (SCC). Along with core QUICC/SCC functionality a uart(4)-compliant device driver is provided which allows for serial ports over QUICC/SCC. Approved by: cognet (mentor) Obtained from: Juniper MFp4: e500 Add method enabled() to the SCC interface. This method can be used 2007-03-28T18:05:17Z Marcel Moolenaar marcel@FreeBSD.org 2007-03-28T18:05:17Z urn:sha1:f1aad6d9b27cce6bf4d49e4b4c1a10188b732737 by driver backends to mark individual channels as enabled or not. The default implementation of this method always mark channels as enabled. This method is currently not used, but is added with the PowerQUICC in mind where the 2nd SCC channel can be disabled. Allow the range of a SCC class to be 0. This gives all child 2007-03-28T06:45:33Z Marcel Moolenaar marcel@FreeBSD.org 2007-03-28T06:45:33Z urn:sha1:abb3d233c40ed46f1b0606388ff25af53e2f036f devices the same (overlapping) I/O range. This is useful for embedded communications controllers like the CPM of various models of the PowerQUICC. Pass the RID from the bus frontends to the core probe function. 2007-03-22T23:45:25Z Marcel Moolenaar marcel@FreeBSD.org 2007-03-22T23:45:25Z urn:sha1:cad72a80bd3b5f4c95ca49087e71bbf195ad747a Currently all RIDs are 0, but for PCI devices this typically isn't the case. This change is made with future PCI support in mind. o break newbus api: add a new argument of type driver_filter_t to 2007-02-23T12:19:07Z Paolo Pisati piso@FreeBSD.org 2007-02-23T12:19:07Z urn:sha1:ef544f631226436ef590825881e7a28369df82f6 bus_setup_intr() o add an int return code to all fast handlers o retire INTR_FAST/IH_FAST For more info: http://docs.freebsd.org/cgi/getmsg.cgi?fetch=465712+0+current/freebsd-current Reviewed by: many Approved by: re@ Fix braino: The cl_range field should not hold the shifted I/O 2006-07-26T03:10:01Z Marcel Moolenaar marcel@FreeBSD.org 2006-07-26T03:10:01Z urn:sha1:cbd038e73856d664a594ab99a4e79ed5231922ff space range per channel, but rather the unshifted range. The shifting depends on the bus. The hardcoded shift was specific to the SBus on sparc64. The shifted range is now determined at run-time. This fixes the mac-io attachment. Revert previous commit. Spinlocks hold interrupts disabled, so 2006-07-25T00:23:54Z Marcel Moolenaar marcel@FreeBSD.org 2006-07-25T00:23:54Z urn:sha1:c074ebba100cc878182497f4f9449cb7714584db preemption is not possible. Pointed out by: jhb@ If we have multiple interrupt resources, like for Z8530 clones on the 2006-07-24T22:25:16Z Marcel Moolenaar marcel@FreeBSD.org 2006-07-24T22:25:16Z urn:sha1:8f3b6a62b577e01886c7925bf5c3866652488868 mac-io bus, we cannot setup FAST interrupt handlers. This because we use spinlocks to protect the hardware and all interrupt resources are assigned the same interrupt handler. When the interrupt handler is invoked for interrupt X, it could be preempted for interrupt Y while it was holding the lock (where X and Y are the interrupt resources corresponding a single instance of this driver). This is a deadlock. By only using a MPSAFE handler in that case we prevent preemption.