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<title>src-test2/sys/dev/ste, branch release/8.2.0_cvs</title>
<subtitle>FreeBSD source tree</subtitle>
<id>https://cgit-dev.freebsd.org/src-test2/atom?h=release%2F8.2.0_cvs</id>
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<updated>2011-02-16T16:18:46Z</updated>
<entry>
<title>Copy releng/8.2 to release/8.2.0 for 8.2-RELEASE.</title>
<updated>2011-02-16T16:18:46Z</updated>
<author>
<name>Ken Smith</name>
<email>kensmith@FreeBSD.org</email>
</author>
<published>2011-02-16T16:18:46Z</published>
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<id>urn:sha1:dec99dafe5763ba1db6950342aa80a634169c083</id>
<content type='text'>
Approved by:	re (implicit)

This commit was manufactured to restore the state of the 8.2-RELEASE image.
</content>
</entry>
<entry>
<title>MFC: r213893, r213908, r214566, r214605, r214846</title>
<updated>2010-11-07T11:12:29Z</updated>
<author>
<name>Marius Strobl</name>
<email>marius@FreeBSD.org</email>
</author>
<published>2010-11-07T11:12:29Z</published>
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<id>urn:sha1:605d4f8b84e727c542eec73fceec034384cb7d5e</id>
<content type='text'>
Convert the PHY drivers to honor the mii_flags passed down and convert
the NIC drivers as well as the PHY drivers to take advantage of the
mii_attach() introduced in r213878 (MFC'ed to stable/8 in r214684) to
get rid of certain hacks. For the most part these were:
- Artificially limiting miibus_{read,write}reg methods to certain PHY
  addresses; we now let mii_attach() only probe the PHY at the desired
  address(es) instead.
- PHY drivers setting MIIF_* flags based on the NIC driver they hang
  off from, partly even based on grabbing and using the softc of the
  parent; we now pass these flags down from the NIC to the PHY drivers
  via mii_attach(). This got us rid of all such hacks except those of
  brgphy() in combination with bce(4) and bge(4), which is way beyond
  what can be expressed with simple flags.

While at it, I took the opportunity to change the NIC drivers to pass
up the error returned by mii_attach() (previously by mii_phy_probe())
and unify the error message used in this case where and as appropriate
as mii_attach() actually can fail for a number of reasons, not just
because of no PHY(s) being present at the expected address(es).

Reviewed by:	jhb, yongari
</content>
</entry>
<entry>
<title>MFC r211089:</title>
<updated>2010-08-15T21:43:51Z</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2010-08-15T21:43:51Z</published>
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<id>urn:sha1:2b3e542a8150d4cce681d9583f5a68b0f97d0db4</id>
<content type='text'>
  It seems some old Sundace(now IC Plus Corp.) controllers do not
  like memory mapped register access. Typical problem from the issue
  was MII access returned unreliable values. I'm not sure this comes
  from lack of register flushing in MII access after accessing
  STE_PHYCTL register though.
  To address the issue, read hints data that controls which type of
  memory mapping should be used in driver. ste(4) still prefers
  memory mapping to io mapping but honor hints entered by user except
  for controllers that have problems with memory mapping.
  The hint to use iomapping could be given by adding the following
  line to /boot/device.hints file.

  hint.ste.0.prefer_iomap="1"

  PR:	kern/149285
</content>
</entry>
<entry>
<title>MFC a number of changes from head for ISP (203478,203463,203444,202418,201758,</title>
<updated>2010-02-11T18:34:06Z</updated>
<author>
<name>Matt Jacob</name>
<email>mjacob@FreeBSD.org</email>
</author>
<published>2010-02-11T18:34:06Z</published>
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<id>urn:sha1:7733cf8fffadd4b286f7ed03e7748ee70e36433d</id>
<content type='text'>
201408,201325,200089,198822,197373,197372,197214,196162). Since one of those
changes was a semicolon cleanup from somebody else, this touches a lot more.
</content>
</entry>
<entry>
<title>MFC r200950,200955,200965-200966,201767-201768</title>
<updated>2010-01-14T22:26:52Z</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2010-01-14T22:26:52Z</published>
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<id>urn:sha1:6b15d2af78987c6e8f4371ae294c4a56ae85aa13</id>
<content type='text'>
r200950:
  Implement RX interrupt moderation using one-shot timer interrupt.
  Unlike TX interrupt, ST201 does not provide any mechanism to
  suppress RX interrupts. ste(4) can generate more than 70k RX
  interrupts under heavy RX traffics such that these excessive
  interrupts make system useless to process other useful things.
  Maybe this was the major reason why polling support code was
  introduced to ste(4).
  The STE_COUNTDOWN register provides a programmable counter that
  will generate an interrupt upon its expiration. We program
  STE_DMACTL register to use 3.2us clock rate to drive the counter
  register. Whenever ste(4) serves RX interrupt, the driver rearm
  the timer to expire after STE_IM_RX_TIMER_DEFAULT time and disables
  further generation of RX interrupts. This trick seems to work well
  and ste(4) generates less than 8k RX interrupts even under 64 bytes
  UDP torture test. Combined with TX interrupts, the total number of
  interrupts are less than 10k which looks reasonable on heavily
  loaded controller.

  The default RX interrupt moderation time is 150us. Users can change
  the value at any time with dev.ste.%d.int_rx_mod sysctl node.
  Setting it 0 effectively disables the RX interrupt moderation
  feature. Now we have both TX/RX interrupt moderation code so remove
  loop of interrupt handler which resulted in sub-optimal performance
  as well as more register accesses.

r200955:
  Add suspend/resume support as well as basic WOL.
  While I'm here simplify SIOCSIFCAP handler.

r200965:
  Update if_iqdrops in case of RX buffer allocation failure.

r200966:
  ether_ifattach sets if_mtu, remove unnecessary code.

r201767:
  Fix EEPROM access code to return data in host byte order.
  EEPROM on ST201 always returns 16bits data with little endian
  format so conversion to host order is required.
  This change fixes inversed ethernet address on sparc64.

r201768:
  Make sure to store dma address of RX buffer in little endian form.
  This fixes the last bug which keeps ste(4) from working on sparc64.
</content>
</entry>
<entry>
<title>MFC r200904-200908,200910-200913</title>
<updated>2010-01-14T22:15:51Z</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2010-01-14T22:15:51Z</published>
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<id>urn:sha1:812b4b875dd5135500c12ebf7e579a4994e3fdb5</id>
<content type='text'>
r200904:
  Don't reinitialize controller if driver is already running. This
  reduces number of link state UP/DOWN changes.

r200905:
  Reimplement controller reset. Datasheet says full reset takes about
  1ms. Since we switched to memory register mapping make sure to
  flush PCI posted write by reading the register again.
  While I'm here add additional delays in loop while driver waits the
  completion of the reset.

r200906:
  Overhaul RX filter programming.
   o Let RX filter handler program promiscuous/multicast filter as
     well as broadcasting.
   o Remove unnecessary register access.
   o Simplify ioctl handler and have set_rxfilter to handle
     IFF_PROMISC and IFF_ALLMULTI change instead of directly
     programming the controller.
   o Removed unnecessary error variable reinitialization in ioctl
     handler.
   o Add IFF_DRV_RUNNING check before programming multicast filter.
   o Configure maximum allowed frame length before enabling MAC.
     Datasheet didn't say the exact ordering of programming sequence
     but it looks more natural to set maximum allowed frame length
     first prior to enabling controller.

r200907:
  Don't report link status if driver is not running.

r200908:
  Report the correct result of mii_mediachg(). Previously it always
  used to return success without respect to the result.
  While I'm here use mii_mediachg() in ste_init_locked which allows
  driver to use currently configured media. ste_ifmedia_upd() is
  supposed to be called whenever user changes current media settings.

r200910:
  Implement hardware MAC statistics counter support. The counters
  could be accessed with dev.ste.0.stats sysctl node.

r200911:
  Remove unused duplicated register definition. It seems the
  definition was made to access STE_ASICCTL register as 16bits but
  ste(4) always access the register as 32bits so it was never used
  before.

r200912:
  Correct STE_COUNTDOWN register offset. The datasheet was wrong.

r200913:
  We don't need to generate DMA complete interrupt for every
  transmitted frames. So request interrupt for every 16th frames. Due
  to the limitation of hardware we can't suppress the interrupt as
  driver should have to check TX status register. The TX status
  register can store up to 31 TX status so driver can't send more
  than 31 frames without reading TX status register.
  With this change controller would not generate TX completion
  interrupt for every frame, so reclaim transmitted frames in
  ste_tick().
</content>
</entry>
<entry>
<title>MFC r200854,200856,200865,200873,200875,200877,200884</title>
<updated>2010-01-14T22:00:33Z</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2010-01-14T22:00:33Z</published>
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<id>urn:sha1:0d9ae5891e7b706bf81dd6393dfe3c26cfabca55</id>
<content type='text'>
r200854:
  Add minimal dealy while ste(4) is waiting for the end of active DMA
  cycle.

r200856:
  Introduce sc_flags member variable and use it to keep track of
  link state and PHY related information.
  Remove ste_link and ste_one_phy variable of softc as it's not used
  anymore.
  While I'm here add IFF_DRV_RUNNING check in ste_start_locked().

r200865:
  Reimplement miibus_statchg method. Don't rely on link state change
  interrupt. If we want to use link state change interrupt ste(4)
  should also implement auto-negotiation complete handler as well as
  various PHY access handling. Now link state change is handled by
  mii(4) polling so it will automatically update link state UP/DOWN
  events which in turn make ste(4) usable with lagg(4).

  r199559 added a private timer to drive watchdog and the timer also
  used to drive MAC statistics update. Because the MAC statistics
  update is called whenever statistics counter reaches near-full, it
  drove watchdog timer too fast such that it caused false watchdog
  timeouts under heavy TX traffic conditions.
  Fix the regression by separating ste_stats_update() from driving
  watchdog timer and introduce a new function ste_tick() that handles
  periodic job such as driving watchdog, MAC statistics update and
  link state check etc.
  While I'm here clear armed watchdog timer in ste_stop().

r200873:
  Instead of relying on hard resetting of controller to stop
  receiving incoming traffics, try harder to gracefully stop active
  DMA cycles and then stop MACs. This is the way what datasheet
  recommends and seems to work reliably. Resetting controller while
  active DMAs are in progress is bad thing as we can't predict how
  DMAs touche allocated TX/RX buffers. This change ensures controller
  stop state before attempting to release allocated TX/RX buffers.
  Also update MAC statistics which could have been updated during the
  wait time of MAC stop.

  While I'm here remove unnecessary controller resets in various
  location. ste(4) no longer relies on hard controller reset to stop
  controller and resetting controller also clears all configured
  settings which makes it hard to implement WOL in near future.
  Now resetting a controller is performed in ste_init_locked().

r200875:
  Prefer memory space register mapping over io space. If memory space
  mapping fails fall back to old io space mapping.
  While I'm here use PCIR_BAR macro.

r200877:
  Prefer bus_write_{1,2,4}/bus_read_{1,2,4} to
  bus_space_write_{1,2,4}/bus_space_read_{1,2,4}.
  Remove unused ste_bhandle and ste_btag in softc.

r200884:
  Reimplement Tx status error handler as recommended by datasheet.
  If ste(4) encounter TX underrun or excessive collisions the TX MAC
  of controller is stalled so driver should wake it up again. TX
  underrun requires increasing TX threshold value to minimize
  further TX underruns. Previously ste(4) used to reset controller
  to recover from TX underrun, excessive collision and reclaiming
  error. However datasheet says only TX underrun requires resetting
  entire controller. So implement ste_restart_tx() that restarts TX
  MAC and do not perform full reset except TX underrun case.
  Now ste(4) uses CSR_READ_2 instead of CSR_READ_1 to read
  STE_TX_STATUS register. This way ste(4) will also read frame id
  value and we can write the same value back to STE_TX_FRAMEID
  register instead of overwriting it to 0. The datasheet was wrong
  in write back of STE_TX_STATUS so add some comments why we do so.
  Also always invoke ste_txeoc() after ste_txeof() in ste_poll as
  without reading TX status register can stall TX MAC.
</content>
</entry>
<entry>
<title>MFC r200853:</title>
<updated>2010-01-14T21:45:39Z</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2010-01-14T21:45:39Z</published>
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<id>urn:sha1:0f9ecfd9ccc45c6822b54c3708e0aa1864444c37</id>
<content type='text'>
  Add bus_dma(9) and endianness support to ste(4).
   o Sorted includes and added missing header files.
   o Added basic endianness support. In theory ste(4) should work on
     any architectures.
   o Remove the use of contigmalloc(9), contigfree(9) and vtophys(9).
   o Added 8 byte alignment limitation of TX/RX descriptor.
   o Added 1 byte alignment requirement for TX/RX buffers.
   o ste(4) controllers does not support DAC. Limit DMA address space
     to be within 32bit address.
   o Added spare DMA map to gracefully recover from DMA map failure.
   o Removed dead code for checking STE_RXSTAT_DMADONE bit. The bit
     was already checked in each iteration of loop so it can't be true.
   o Added second argument count to ste_rxeof(). It is used to limit
     number of iterations done in RX handler. ATM polling is the only
     consumer.
   o Removed ste_rxeoc() which was added to address RX stuck issue
     (cvs rev 1.66). Unlike TX descriptors, ST201 supports chaining
     descriptors to form a ring for RX descriptors. If RX descriptor
     chaining is not supported it's possible for controller to stop
     receiving incoming frames once controller pass the end of RX
     descriptor which in turn requires driver post new RX
     descriptors to receive more frames. For TX descriptors which
     does not support chaning, we exactly do manual chaining in
     driver by concatenating new descriptors to the end of previous
     TX chain.
     Maybe the workaround was borrowed from other drivers that does
     not support RX descriptor chaining, which is not valid for ST201
     controllers. I still have no idea how this address RX stuck
     issue and I can't reproduce the RX stuck issue on DFE-550TX
     controller.
   o Removed hw.ste_rxsyncs sysctl as the workaround was removed.
   o TX/RX side bus_dmamap_load_mbuf_sg(9) support.
   o Reimplemented optimized ste_encap().
   o Simplified TX logic of ste_start_locked().
   o Added comments for TFD/RFD requirements.
   o Increased number of RX descriptors to 128 from 64. 128 gave much
     better performance than 64 under high network loads.
</content>
</entry>
<entry>
<title>MFC r200798,200801,200803-200804,200808,200810</title>
<updated>2010-01-14T20:47:49Z</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2010-01-14T20:47:49Z</published>
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<id>urn:sha1:41c95608a0dd535b8d96bfc4a0ce435a1e6c71df</id>
<content type='text'>
r200798:
  Use ANSI function definations.

r200801:
   o Remove unnecessary return statement.
   o Remove register keyword.

r200803:
  s/u_intXX_t/uintXX_t/g

r200804:
  Remove trailing white spaces.

r200808:
  style(9)

r200810:
  Sort function prototyes.
</content>
</entry>
<entry>
<title>Partial merge r199559:</title>
<updated>2010-01-14T20:38:40Z</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2010-01-14T20:38:40Z</published>
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<id>urn:sha1:699df0c4facbef5a763de24be4e3738e9394d55f</id>
<content type='text'>
  - Add a private timer to drive the transmit watchdog instead of using
    if_watchdog and if_timer.
  - Fix some issues in detach for sn(4), ste(4), and ti(4).  Primarily this
    means calling ether_ifdetach() before anything else.
</content>
</entry>
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