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<title>src-test2/sys/dev/uart, branch release/10.0.0</title>
<subtitle>FreeBSD source tree</subtitle>
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<updated>2013-08-30T15:26:45Z</updated>
<entry>
<title>A final test with unmodified code has shown that a delay of 150ms</title>
<updated>2013-08-30T15:26:45Z</updated>
<author>
<name>Marcel Moolenaar</name>
<email>marcel@FreeBSD.org</email>
</author>
<published>2013-08-30T15:26:45Z</published>
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<id>urn:sha1:40a827b6f086f65332063f7142bd9f6ac1d87dce</id>
<content type='text'>
is not giving us a 100% success rate. Bump the delay to 200ms as
that seems to do the trick.

Note that during testing the delay was added to uart_bus_attach()
in uart_core.c. While having the delay in a different place can
change the behaviour, it was not expected. Having to bump the
delay with another 50ms could therefore be an indication that
the problem can not be solved with delays.

Reported by: kevlo@
Tested by: kevlo@
</content>
</entry>
<entry>
<title>Work-around a timing problem with the ITE IT8513E now that the core</title>
<updated>2013-08-29T16:26:04Z</updated>
<author>
<name>Marcel Moolenaar</name>
<email>marcel@FreeBSD.org</email>
</author>
<published>2013-08-29T16:26:04Z</published>
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<id>urn:sha1:4fc499753563c782036f76e5a2293ffa12477444</id>
<content type='text'>
calls ns8250_bus_ipend() almost immediately after ns8250_bus_attach().
As it appears, a line break condition is being signalled for almost
all received characters due to this. A delay of 150ms seems enough
to allow the H/W to settle and to avoid the problem.
More analysis is needed, but for now a regression has been addressed.

Reported by: kevlo@
Tested by: kevlo@
</content>
</entry>
<entry>
<title>Add support for uarts other than the serial console in TI OMAP SoCs.</title>
<updated>2013-08-21T14:33:02Z</updated>
<author>
<name>Ian Lepore</name>
<email>ian@FreeBSD.org</email>
</author>
<published>2013-08-21T14:33:02Z</published>
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<id>urn:sha1:aef60d8c4a5b5a4d31e56dd0288ec523f64f47bd</id>
<content type='text'>
The TI uart hardware is ns16550-compatible, except that before it can
be used the clocks and power have to be enabled and a non-standard
mode control register has to be set to put the device in uart mode
(as opposed to irDa or other serial protocols).  This adds the extra
code in an extension to the standard ns8250 probe routine, and the
rest of the driver is just the standard ns8250 code.
</content>
</entry>
<entry>
<title>Make the uart ns8250 high-level interface public rather than static.</title>
<updated>2013-08-21T14:26:15Z</updated>
<author>
<name>Ian Lepore</name>
<email>ian@FreeBSD.org</email>
</author>
<published>2013-08-21T14:26:15Z</published>
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<id>urn:sha1:167cb33f85968ce572debbeade439aa8738713ea</id>
<content type='text'>
This makes it easier to implement new drivers which are "mostly ns8250"
but with some small difference such as needing to enable clocks or poke
a non-standard register at probe or attach time.
</content>
</entry>
<entry>
<title>Use an if/else sequence rather than unrelated if statements, so that a</title>
<updated>2013-08-21T04:08:58Z</updated>
<author>
<name>Ian Lepore</name>
<email>ian@FreeBSD.org</email>
</author>
<published>2013-08-21T04:08:58Z</published>
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<id>urn:sha1:6fd28cd9ff1052b3b7d94cc187ff0b1af55e6dbf</id>
<content type='text'>
device compatible with multiple drivers matches the more specific driver
first and doesn't overwrite it later with the more generic.  Move the
generic ns16550 to the end of the list.
</content>
</entry>
<entry>
<title>Check for generic ns16550 after all other types.  A device may be compatible</title>
<updated>2013-08-21T04:05:06Z</updated>
<author>
<name>Ian Lepore</name>
<email>ian@FreeBSD.org</email>
</author>
<published>2013-08-21T04:05:06Z</published>
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<id>urn:sha1:d081029a4fe050df272c238d5b225d48ec28fe81</id>
<content type='text'>
with 16550 but also have a more specific/capable driver earlier in the list.
</content>
</entry>
<entry>
<title>Allow UART_POLL_FREQ to be set as a kernel option as well as via tunable</title>
<updated>2013-08-19T15:51:30Z</updated>
<author>
<name>Ian Lepore</name>
<email>ian@FreeBSD.org</email>
</author>
<published>2013-08-19T15:51:30Z</published>
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<id>urn:sha1:1662b008712d70e61a945752778bb2e2f5bcb390</id>
<content type='text'>
(the code was already set up for this, just needs to be in conf/options).

Also, if reporting that polling is being used, report the frequency too.
</content>
</entry>
<entry>
<title>Set the device description after we call uart_probe(). In uart_probe()</title>
<updated>2013-07-25T16:57:27Z</updated>
<author>
<name>Marcel Moolenaar</name>
<email>marcel@FreeBSD.org</email>
</author>
<published>2013-07-25T16:57:27Z</published>
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<id>urn:sha1:a177309ff983687ffc24b42c090f8043cc13a23a</id>
<content type='text'>
we call device-specific probe functions, which can (and typically will)
set the device description based on low-level device probe information.
In the end we never actually used the device description that we so
carefully maintained in the PCI match table. By setting the device
description after we call uart_probe(), we'll print the more user-
friendly description by default.
</content>
</entry>
<entry>
<title>Protect against broken hardware. In this particular case, protect against</title>
<updated>2013-07-10T17:42:20Z</updated>
<author>
<name>Marcel Moolenaar</name>
<email>marcel@FreeBSD.org</email>
</author>
<published>2013-07-10T17:42:20Z</published>
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<id>urn:sha1:eead2d551ccad0854867b304ca4e40ef5e401cfa</id>
<content type='text'>
H/W not de-asserting the interrupt at all. On x86, and because of the
following conditions, this results in a hard hang with interrupts disabled:
1.  The uart(4) driver uses a spin lock to protect against concurrent
    access to the H/W. Spin locks disable and restore interrupts.
2.  Restoring the interrupt on x86 always writes the flags register. Even
    if we're restoring the interrupt from disabled to disabled.
3.  The x86 CPU has a short window in which interrupts are enabled when the
    flags register is written.
4.  The uart(4) driver registers a fast interrupt by default.

To catch this case, we first try to clear any pending H/W interrupts and in
particular, before setting up the interrupt. This makes sure the interrupt
is masked on the PIC. The interrupt handler now has a limit set on the
number of iterations it'll go through to clear interrupt conditions. If the
limit is hit, the handler will return FILTER_SCHEDULE_THREAD. The attach
function will check for this return code and avoid setting up the interrupt
and foce polling in that case.

Obtained from:	Juniper Networks, Inc.
</content>
</entry>
<entry>
<title>Teach UART to attach Exynos/s3/s5 class driver.</title>
<updated>2013-06-29T23:48:08Z</updated>
<author>
<name>Aleksandr Rybalko</name>
<email>ray@FreeBSD.org</email>
</author>
<published>2013-06-29T23:48:08Z</published>
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<id>urn:sha1:5d490515c3b2fbb8b05bad3fb2d1c280c5b9c81a</id>
<content type='text'>
Submitted by:	Ruslan Bukin &lt;br@bsdpad.com&gt;
Reviewed by:	gonzo
</content>
</entry>
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