<feed xmlns='http://www.w3.org/2005/Atom'>
<title>src-test2/sys/powerpc/include, branch master</title>
<subtitle>FreeBSD source tree</subtitle>
<id>https://cgit-dev.freebsd.org/src-test2/atom?h=master</id>
<link rel='self' href='https://cgit-dev.freebsd.org/src-test2/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src-test2/'/>
<updated>2020-12-13T03:58:43Z</updated>
<entry>
<title>[PowerPC] Floating-point exception trap followup</title>
<updated>2020-12-13T03:58:43Z</updated>
<author>
<name>Brandon Bergren</name>
<email>bdragon@FreeBSD.org</email>
</author>
<published>2020-12-13T03:58:43Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src-test2/commit/?id=ab5711797d0b0beede72e87aab3cc88fc8b5f2de'/>
<id>urn:sha1:ab5711797d0b0beede72e87aab3cc88fc8b5f2de</id>
<content type='text'>
* Fix incorrect operation on 32-bit caused by incorrectly-sized storage
  for a temporary FPSCR.
* Fix several whitespace problems.
* Don't try to enable VSX during cleanup_fpscr().

Reviewed by:	alfredo, jhibbits (earlier version)
Sponsored by:	Tag1 Consulting, Inc.
Differential Revision:	https://reviews.freebsd.org/D27453
</content>
</entry>
<entry>
<title>Add CFI start/end proc directives to arm64, i386, and ppc</title>
<updated>2020-12-05T00:33:28Z</updated>
<author>
<name>Conrad Meyer</name>
<email>cem@FreeBSD.org</email>
</author>
<published>2020-12-05T00:33:28Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src-test2/commit/?id=78599c32efed3247d165302a1fbe8d9203e38974'/>
<id>urn:sha1:78599c32efed3247d165302a1fbe8d9203e38974</id>
<content type='text'>
Follow-up to r353959 and r368070: do the same for other architectures.

arm32 already seems to use its own .fnstart/.fnend directives, which
appear to be ARM-specific variants of the same thing.  Likewise, MIPS
uses .frame directives.

Reviewed by:	arichardson
Differential Revision:	https://reviews.freebsd.org/D27387
</content>
</entry>
<entry>
<title>[PowerPC64LE] Fix LE VSX/fpr interop</title>
<updated>2020-12-03T01:39:59Z</updated>
<author>
<name>Brandon Bergren</name>
<email>bdragon@FreeBSD.org</email>
</author>
<published>2020-12-03T01:39:59Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src-test2/commit/?id=3de50be851fefcfbca7a2cdecb1e86305cc2531d'/>
<id>urn:sha1:3de50be851fefcfbca7a2cdecb1e86305cc2531d</id>
<content type='text'>
In the PCB struct, we need to match the VSX register file layout
correctly, as the VSRs shadow the FPRs.

In LE, we need to have a dword of padding before the fprs so they end up
on the correct side, as the struct may be manipulated by either the FP
routines or the VSX routines.

Additionally, when saving and restoring fprs, we need to explicitly target
the fpr union member so it gets offset correctly on LE.

Fixes weirdness with FP registers in VSX-using programs (A FPR that was
saved by the FP routines but restored by the VSX routines was becoming 0
due to being loaded to the wrong side of the VSR.)

Original patch by jhibbits.

Reviewed by:	jhibbits
Differential Revision:	https://reviews.freebsd.org/D27431
</content>
</entry>
<entry>
<title>[PowerPC] Don't overwrite vm.pmap sysctl node</title>
<updated>2020-11-17T11:36:31Z</updated>
<author>
<name>Leandro Lupori</name>
<email>luporl@FreeBSD.org</email>
</author>
<published>2020-11-17T11:36:31Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src-test2/commit/?id=5b58b1aaf8c4aa39f5b9b42862e810ceeba94041'/>
<id>urn:sha1:5b58b1aaf8c4aa39f5b9b42862e810ceeba94041</id>
<content type='text'>
After r367417, both mmu_oea64 and mmu_radix were defining the vm.pmap
sysctl node, resulting in the later definition hiding the properties of
the previous one. Avoid this issue by defining vm.pmap in a common
source file and declaring it where needed.

This change also standardizes the tunable name used to enable superpages
and change its default to disabled on radix MMU, because it still has some
issues with superpages.

Reviewed by:	bdragon, jhibbits
Sponsored by:	Eldorado Research Institute (eldorado.org.br)
Differential Revision:	https://reviews.freebsd.org/D27156
</content>
</entry>
<entry>
<title>Make powerpc use MAXARGS (defined as 8) instead of hardcoding '10'.</title>
<updated>2020-11-06T19:27:27Z</updated>
<author>
<name>Edward Tomasz Napierala</name>
<email>trasz@FreeBSD.org</email>
</author>
<published>2020-11-06T19:27:27Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src-test2/commit/?id=096068b976e5ffb81111bf36c12a45c76c24306c'/>
<id>urn:sha1:096068b976e5ffb81111bf36c12a45c76c24306c</id>
<content type='text'>
This brings its 'struct syscall_args' in sync with other architectures.

Reviewed by:	bdragon, jhibbits
MFC after:	2 weeks
Sponsored by:	EPSRC
Differential Revision:	https://reviews.freebsd.org/D26605
</content>
</entry>
<entry>
<title>Implement superpages for PowerPC64 (HPT)</title>
<updated>2020-11-06T14:12:45Z</updated>
<author>
<name>Leandro Lupori</name>
<email>luporl@FreeBSD.org</email>
</author>
<published>2020-11-06T14:12:45Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src-test2/commit/?id=e2d6c417e3030c814e048ec2cda803cb7971bd75'/>
<id>urn:sha1:e2d6c417e3030c814e048ec2cda803cb7971bd75</id>
<content type='text'>
This change adds support for transparent superpages for PowerPC64
systems using Hashed Page Tables (HPT). All pmap operations are
supported.

The changes were inspired by RISC-V implementation of superpages,
by @markj (r344106), but heavily adapted to fit PPC64 HPT architecture
and existing MMU OEA64 code.

While these changes are not better tested, superpages support is disabled by
default. To enable it, use vm.pmap.superpages_enabled=1.

In this initial implementation, when superpages are disabled, system
performance stays at the same level as without these changes. When
superpages are enabled, buildworld time increases a bit (~2%). However,
for workloads that put a heavy pressure on the TLB the performance boost
is much bigger (see HPC Challenge and pgbench on D25237).

Reviewed by:	jhibbits
Sponsored by:	Eldorado Research Institute (eldorado.org.br)
Differential Revision:	https://reviews.freebsd.org/D25237
</content>
</entry>
<entry>
<title>[POWERPC] Floating-Point Exception trap support</title>
<updated>2020-11-06T13:34:30Z</updated>
<author>
<name>Alfredo Dal'Ava Junior</name>
<email>alfredo@FreeBSD.org</email>
</author>
<published>2020-11-06T13:34:30Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src-test2/commit/?id=5d0e861910978450c46d2a65385aeb3286a17fa4'/>
<id>urn:sha1:5d0e861910978450c46d2a65385aeb3286a17fa4</id>
<content type='text'>
Add support for Floating-Point Exception traps on 32 and 64 bit platforms.
Also make sure to clean FPSCR on EXEC and thread exit

Author of initial version: Renato Riolino &lt;renato.riolino@eldorad.org.br&gt;

Reviewed by:	jhibbits
Sponsored by:	Eldorado Research Institute (eldorado.org.br)
Differential Revision:	https://reviews.freebsd.org/D23623
</content>
</entry>
<entry>
<title>Fix powerpc and powerpcspe builds</title>
<updated>2020-11-05T20:18:00Z</updated>
<author>
<name>Leandro Lupori</name>
<email>luporl@FreeBSD.org</email>
</author>
<published>2020-11-05T20:18:00Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src-test2/commit/?id=6a32dae2b755792c6dbb7fa1bc7ee54fdb912dc0'/>
<id>urn:sha1:6a32dae2b755792c6dbb7fa1bc7ee54fdb912dc0</id>
<content type='text'>
This change fixes 32-bit PowerPC builds, that r367390 broke
(shift count &gt;= width of type).
</content>
</entry>
<entry>
<title>[PowerPC] hwpmc: add support for POWER8/9 PMCs</title>
<updated>2020-11-05T16:36:39Z</updated>
<author>
<name>Leandro Lupori</name>
<email>luporl@FreeBSD.org</email>
</author>
<published>2020-11-05T16:36:39Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src-test2/commit/?id=68dd71825601b91365ff0c01e5ea064fe25b51a7'/>
<id>urn:sha1:68dd71825601b91365ff0c01e5ea064fe25b51a7</id>
<content type='text'>
This change adds support for POWER8 and POWER9 PMCs (bare metal and
pseries).
All PowerISA 2.07B non-random events are supported.

Implementation was based on that of PPC970.

Reviewed by:	jhibbits
Sponsored by:	Eldorado Research Institute (eldorado.org.br)
Differential Revision:	https://reviews.freebsd.org/D26110
</content>
</entry>
<entry>
<title>[PowerPC] Make PPC 970 PMC SPRs the standard ones</title>
<updated>2020-11-05T14:15:50Z</updated>
<author>
<name>Leandro Lupori</name>
<email>luporl@FreeBSD.org</email>
</author>
<published>2020-11-05T14:15:50Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src-test2/commit/?id=9fe896ec791d38bb7f36108befcec1fe81b907b0'/>
<id>urn:sha1:9fe896ec791d38bb7f36108befcec1fe81b907b0</id>
<content type='text'>
And add a _74XX suffix to 74XX SPRs.

This is a preparation for adding support to POWER8/9 PMCs, which have most
SPRs equal to 970 ones.

Reviewed by:	jhibbits
Sponsored by:	Eldorado Research Institute (eldorado.org.br)
Differential Revision:	https://reviews.freebsd.org/D26532
</content>
</entry>
</feed>
