src-test2/sys/sparc64/include/cache.h, branch stable/5FreeBSD source treehttps://cgit-dev.freebsd.org/src-test2/atom?h=stable%2F52005-01-31T23:27:04ZMFC: /*- and related license changes2005-01-31T23:27:04ZWarner Loshimp@FreeBSD.org2005-01-31T23:27:04Zurn:sha1:c9769f3ab5327a99909391e070c143e92ddc43ecRemove advertising clause from University of California Regent's2004-04-07T05:00:01ZWarner Loshimp@FreeBSD.org2004-04-07T05:00:01Zurn:sha1:2fcbca0d8575cf5ca6924283517b3adfc7d6d113
license, per letter dated July 22, 1999 and email from Peter Wemm,
Alan Cox and Robert Watson.
Approved by: core, peter, alc, rwatson
Fix a bug in the data access error recorvery. Before re-enabling the data2003-11-11T06:41:54ZJake Burkholderjake@FreeBSD.org2003-11-11T06:41:54Zurn:sha1:00199175429f8bacd1c2223af6f2ffd6c2792ee4
cache after a data access error we must discard all cache lines. When
disabled existing cache lines are not invalidated by stores to memory, so
we risk reading stale data that was cached before the data access error if
we don't flush them. This is especially fatal when the memory involved
is the active part of the kernel or user stack. For good measure we also
flush the instruction cache.
This fixes random crashes when the X server probes the PCI bus through
/dev/pci.
Avoid exposing declarations for kernel variables to userland.2003-07-17T23:42:08ZJake Burkholderjake@FreeBSD.org2003-07-17T23:42:08Zurn:sha1:30c2333b1de418284d242c38e0d7cb63960c931c
PR: 54528
Use vm_paddr_t for physical addresses.2003-04-08T06:35:09ZJake Burkholderjake@FreeBSD.org2003-04-08T06:35:09Zurn:sha1:58d7ebfa7c4aea8f99f1eaceac4f5171fba9001f- Remove unused cache flushing routines. These will not necessary work2003-03-19T06:55:37ZJake Burkholderjake@FreeBSD.org2003-03-19T06:55:37Zurn:sha1:00aabd830da70e9235d302cdcb72c31b7dc3c43a
on future UltraSPARC cpus for which the data cache is not direct mapped.
- Move UltraSPARC I and II (spitfire, blackbird, sapphire, sabre) specific
functions to spitfire.c, and add cheetah.c for UltraSPARC III specific
functions. Initially just cache flushing, but there are a few other
functions that will need to move here.
- Add an ipi handler for data cache flushing on UltraSPARC III.
- Use function pointers to select the right cache flushing functions based
on cpu_impl.
With this it is possible to boot single user from an mfs root on UltraSPARC
III systems, including spinning up secondary processors. There is currently
no support for the host to pci bridge, and no documentation for it is
publically available.
Thanks to Oleg Derevenetz for providing access to a system with UltraSPARC
III+ cpus.
Add SMP aware cache flushing functions, which operate on a single physical2002-05-20T16:30:47ZJake Burkholderjake@FreeBSD.org2002-05-20T16:30:47Zurn:sha1:b78213fb0b6f77ec496d665d8cc0dcf870ea4e28
page. These send IPIs if necessary in order to keep the caches in sync on
all cpus.
Remove __P.2002-03-21T00:06:55ZAlfred Perlsteinalfred@FreeBSD.org2002-03-21T00:06:55Zurn:sha1:91f5bcb812669be0be06de864da44ae174bb1c27
profile.h and bus.h were excluded because there is currently WIP.
Reviewed by: tmm
Use stxa_sync() when accessing the diagnostic registers to invalidate2002-02-13T16:20:38ZThomas Moestltmm@FreeBSD.org2002-02-13T16:20:38Zurn:sha1:fd2ee897e41149cd44666f4c378d30275b2ff94b
caches; this is needed to avoid undefined behaviour.
Clean up a bit.
Prototype dcache_inval_phys.2001-12-29T08:35:49ZJake Burkholderjake@FreeBSD.org2001-12-29T08:35:49Zurn:sha1:3be7dfb8b43de74e0f43e669259f6c87eceed4be
Submitted by: tmm