diff options
author | David E. O'Brien <obrien@FreeBSD.org> | 2001-11-01 09:24:29 +0000 |
---|---|---|
committer | David E. O'Brien <obrien@FreeBSD.org> | 2001-11-01 09:24:29 +0000 |
commit | adc940bfc719044f1b025222d66bed9e62c130ba (patch) | |
tree | f6b7f87e74b800b8b30b12aa6cb092434d708ac4 | |
parent | ca8d09641f7cf603990a4f80e67cab4a120fb01f (diff) | |
download | src-test2-adc940bfc719044f1b025222d66bed9e62c130ba.tar.gz src-test2-adc940bfc719044f1b025222d66bed9e62c130ba.zip |
Notes
67 files changed, 12259 insertions, 4270 deletions
diff --git a/contrib/binutils/bfd/ChangeLog b/contrib/binutils/bfd/ChangeLog index e8bc010d3f8a..d782ee51cc05 100644 --- a/contrib/binutils/bfd/ChangeLog +++ b/contrib/binutils/bfd/ChangeLog @@ -1,3 +1,29 @@ +2001-10-24 Richard Henderson <rth@redhat.com> + + * peXXigen.c (_bfd_XX_print_private_bfd_data_common): Copy + timestamp to time_t for ctime. + +2001-10-24 Richard Henderson <rth@redhat.com> + + 2001-08-23 Jakub Jelinek <jakub@redhat.com> + * elfxx-ia64.c (elfNN_ia64_hash_table_create): Clear ia64_info. + +2001-10-06 Stephane Carrez <Stephane.Carrez@worldnet.fr> + + * dwarf2.c (comp_unit_find_nearest_line): Check for end of + compilation unit. + +2001-08-29 Joel Sherrill <joel@OARcorp.com> + + * config.bfd (i[3456]86-*-rtems*, m68*-*-rtems*): Change + default from coff to elf. + +2001-08-03 Ben Harris <bjh21@netbsd.org> + + * elf32-arm.h (elf32_arm_final_link_relocate): Include offset of + reloc from start of section when computing value for R_ARM_REL32 + reloc. + 2001-07-06 Philip Blundell <philb@gnu.org> * elf32-arm.h (elf32_arm_merge_private_bfd_data): Correct sense of diff --git a/contrib/binutils/bfd/config.bfd b/contrib/binutils/bfd/config.bfd index c2eb27415428..56025acb34ea 100755 --- a/contrib/binutils/bfd/config.bfd +++ b/contrib/binutils/bfd/config.bfd @@ -310,10 +310,6 @@ case "${targ}" in targ_defvec=bfd_elf32_i386_vec targ_selvecs=i386coff_vec ;; - i[3456]86-*-rtemself*) - targ_defvec=bfd_elf32_i386_vec - targ_selvecs="i386coff_vec i386aout_vec" - ;; i[3456]86-*-chorus*) targ_defvec=bfd_elf32_i386_vec ;; @@ -325,10 +321,14 @@ case "${targ}" in i[3456]86-*-aix*) targ_defvec=i386coff_vec ;; - i[3456]86*-*-rtems*) + i[3456]86*-*-rtemscoff*) targ_defvec=i386coff_vec targ_selvecs="bfd_elf32_i386_vec i386aout_vec" ;; + i[3456]86-*-rtemself* | i[3456]86-*-rtems*) + targ_defvec=bfd_elf32_i386_vec + targ_selvecs="i386coff_vec i386aout_vec" + ;; i[3456]86-sequent-bsd*) targ_defvec=i386dynix_vec targ_underscore=yes @@ -501,12 +501,16 @@ case "${targ}" in targ_selvecs="cisco_core_big_vec ieee_vec" targ_underscore=yes ;; + m68*-*-rtemscoff*) + targ_defvec=m68kcoff_vec + targ_selvecs="m68kcoff_vec versados_vec ieee_vec aout0_big_vec" + ;; m68*-*-elf* | m68*-*-sysv4*) targ_defvec=bfd_elf32_m68k_vec targ_selvecs="m68kcoff_vec ieee_vec" ;; m68*-*-rtems*) - targ_defvec=m68kcoff_vec + targ_defvec=bfd_elf32_m68k_vec targ_selvecs="m68kcoff_vec versados_vec ieee_vec aout0_big_vec" ;; m68*-*-coff* | m68*-*-sysv*) diff --git a/contrib/binutils/bfd/cpu-arc.c b/contrib/binutils/bfd/cpu-arc.c index bce59d4c99f3..2904ae32d52c 100644 --- a/contrib/binutils/bfd/cpu-arc.c +++ b/contrib/binutils/bfd/cpu-arc.c @@ -1,5 +1,5 @@ /* BFD support for the ARC processor - Copyright 1994, 1995, 1997 Free Software Foundation, Inc. + Copyright 1994, 1995, 1997, 2001 Free Software Foundation, Inc. Contributed by Doug Evans (dje@cygnus.com). This file is part of BFD, the Binary File Descriptor library. @@ -24,31 +24,32 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #define ARC(mach, print_name, default_p, next) \ { \ - 32, /* 32 bits in a word */ \ - 32, /* 32 bits in an address */ \ - 8, /* 8 bits in a byte */ \ + 32, /* 32 bits in a word */ \ + 32, /* 32 bits in an address */ \ + 8, /* 8 bits in a byte */ \ bfd_arch_arc, \ mach, \ "arc", \ print_name, \ - 4, /* section alignment power */ \ + 4, /* section alignment power */ \ default_p, \ - bfd_default_compatible, \ + bfd_default_compatible, \ bfd_default_scan, \ next, \ } -#if 0 /* ??? Not currently needed, but keep in for future reference. */ static const bfd_arch_info_type arch_info_struct[] = { - ARC (bfd_mach_arc_foo, "arc-foo", false, &arch_info_struct[1]), - ARC (bfd_mach_arc_bar, "arc-bar", false, 0), + ARC ( bfd_mach_arc_5, "arc5", false, &arch_info_struct[1] ), + ARC ( bfd_mach_arc_5, "base", false, &arch_info_struct[2] ), + ARC ( bfd_mach_arc_6, "arc6", false, &arch_info_struct[3] ), + ARC ( bfd_mach_arc_7, "arc7", false, &arch_info_struct[4] ), + ARC ( bfd_mach_arc_8, "arc8", false, NULL ), }; -#endif const bfd_arch_info_type bfd_arc_arch = - ARC (bfd_mach_arc_base, "arc-base", true, 0 /*&arch_info_struct[0]*/); - + ARC ( bfd_mach_arc_6, "arc", true, &arch_info_struct[0] ); + /* Utility routines. */ /* Given cpu type NAME, return its bfd_mach_arc_xxx value. @@ -61,10 +62,7 @@ arc_get_mach (name) const bfd_arch_info_type *p; for (p = &bfd_arc_arch; p != NULL; p = p->next) - { - /* +4: skip over "arc-" */ - if (strcmp (name, p->printable_name + 4) == 0) - return p->mach; - } + if (strcmp (name, p->printable_name) == 0) + return p->mach; return -1; } diff --git a/contrib/binutils/bfd/dwarf2.c b/contrib/binutils/bfd/dwarf2.c index 4a032732c980..2161846de953 100644 --- a/contrib/binutils/bfd/dwarf2.c +++ b/contrib/binutils/bfd/dwarf2.c @@ -1431,7 +1431,8 @@ comp_unit_find_nearest_line (unit, addr, return false; } - if (! scan_unit_for_functions (unit)) + if (unit->first_child_die_ptr < unit->end_ptr + && ! scan_unit_for_functions (unit)) { unit->error = 1; return false; diff --git a/contrib/binutils/bfd/efi-app-ia32.c b/contrib/binutils/bfd/efi-app-ia32.c new file mode 100644 index 000000000000..8519f99a0ba8 --- /dev/null +++ b/contrib/binutils/bfd/efi-app-ia32.c @@ -0,0 +1,34 @@ +/* BFD back-end for Intel IA-32 EFI application files. + Copyright 1999, 2000 Free Software Foundation, Inc. + Contributed by David Mosberger <davidm@hpl.hp.com> + +This file is part of BFD, the Binary File Descriptor library. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include "bfd.h" +#include "sysdep.h" + +#define TARGET_SYM bfd_efi_app_ia32_vec +#define TARGET_NAME "efi-app-ia32" +#define COFF_IMAGE_WITH_PE +#define COFF_WITH_PE +#define PCRELOFFSET true +#define TARGET_UNDERSCORE '_' +#define COFF_LONG_SECTION_NAMES +#define PEI_TARGET_SUBSYSTEM IMAGE_SUBSYSTEM_EFI_APPLICATION +#define PEI_FORCE_MINIMUM_ALIGNMENT + +#include "coff-i386.c" diff --git a/contrib/binutils/bfd/elf32-arc.c b/contrib/binutils/bfd/elf32-arc.c index 318dc704e06c..82b610435fa0 100644 --- a/contrib/binutils/bfd/elf32-arc.c +++ b/contrib/binutils/bfd/elf32-arc.c @@ -1,22 +1,22 @@ /* ARC-specific support for 32-bit ELF - Copyright (C) 1994, 1995, 1997, 1999 Free Software Foundation, Inc. + Copyright 1994, 1995, 1997, 1999, 2001 Free Software Foundation, Inc. Contributed by Doug Evans (dje@cygnus.com). -This file is part of BFD, the Binary File Descriptor library. + This file is part of BFD, the Binary File Descriptor library. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "bfd.h" #include "sysdep.h" @@ -25,77 +25,80 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "elf/arc.h" static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup - PARAMS ((bfd *abfd, bfd_reloc_code_real_type code)); + PARAMS ((bfd *abfd, bfd_reloc_code_real_type code)); static void arc_info_to_howto_rel PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *)); -static boolean arc_elf_object_p PARAMS ((bfd *)); -static void arc_elf_final_write_processing PARAMS ((bfd *, boolean)); +static boolean arc_elf_object_p + PARAMS ((bfd *)); +static void arc_elf_final_write_processing + PARAMS ((bfd *, boolean)); /* Try to minimize the amount of space occupied by relocation tables on the ROM (not that the ROM won't be swamped by other ELF overhead). */ + #define USE_REL static reloc_howto_type elf_arc_howto_table[] = { /* This reloc does nothing. */ - HOWTO (R_ARC_NONE, /* type */ - 0, /* rightshift */ - 2, /* size (0 = byte, 1 = short, 2 = long) */ - 32, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_bitfield, /* complain_on_overflow */ - bfd_elf_generic_reloc, /* special_function */ - "R_ARC_NONE", /* name */ - false, /* partial_inplace */ - 0, /* src_mask */ - 0, /* dst_mask */ - false), /* pcrel_offset */ + HOWTO (R_ARC_NONE, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_ARC_NONE", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + false), /* pcrel_offset */ /* A standard 32 bit relocation. */ - HOWTO (R_ARC_32, /* type */ - 0, /* rightshift */ - 2, /* size (0 = byte, 1 = short, 2 = long) */ - 32, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_bitfield, /* complain_on_overflow */ - bfd_elf_generic_reloc, /* special_function */ - "R_ARC_32", /* name */ - false, /* partial_inplace */ - 0xffffffff, /* src_mask */ - 0xffffffff, /* dst_mask */ - false), /* pcrel_offset */ + HOWTO (R_ARC_32, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_ARC_32", /* name */ + false, /* partial_inplace */ + 0xffffffff, /* src_mask */ + 0xffffffff, /* dst_mask */ + false), /* pcrel_offset */ /* A 26 bit absolute branch, right shifted by 2. */ - HOWTO (R_ARC_B26, /* type */ - 2, /* rightshift */ - 2, /* size (0 = byte, 1 = short, 2 = long) */ - 26, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_bitfield, /* complain_on_overflow */ - bfd_elf_generic_reloc, /* special_function */ - "R_ARC_B26", /* name */ - false, /* partial_inplace */ - 0x00ffffff, /* src_mask */ - 0x00ffffff, /* dst_mask */ - false), /* pcrel_offset */ + HOWTO (R_ARC_B26, /* type */ + 2, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 26, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_ARC_B26", /* name */ + false, /* partial_inplace */ + 0x00ffffff, /* src_mask */ + 0x00ffffff, /* dst_mask */ + false), /* pcrel_offset */ /* A relative 22 bit branch; bits 21-2 are stored in bits 26-7. */ - HOWTO (R_ARC_B22_PCREL, /* type */ - 2, /* rightshift */ - 2, /* size (0 = byte, 1 = short, 2 = long) */ - 22, /* bitsize */ - true, /* pc_relative */ - 7, /* bitpos */ - complain_overflow_signed, /* complain_on_overflow */ - bfd_elf_generic_reloc, /* special_function */ - "R_ARC_B22_PCREL", /* name */ - false, /* partial_inplace */ - 0x07ffff80, /* src_mask */ - 0x07ffff80, /* dst_mask */ - true), /* pcrel_offset */ + HOWTO (R_ARC_B22_PCREL, /* type */ + 2, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 22, /* bitsize */ + true, /* pc_relative */ + 7, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_ARC_B22_PCREL", /* name */ + false, /* partial_inplace */ + 0x07ffff80, /* src_mask */ + 0x07ffff80, /* dst_mask */ + true), /* pcrel_offset */ }; @@ -123,14 +126,11 @@ bfd_elf32_bfd_reloc_type_lookup (abfd, code) { unsigned int i; - for (i = 0; - i < sizeof (arc_reloc_map) / sizeof (struct arc_reloc_map); - i++) + for (i = 0; i < sizeof (arc_reloc_map) / sizeof (struct arc_reloc_map); i++) { if (arc_reloc_map[i].bfd_reloc_val == code) return &elf_arc_howto_table[arc_reloc_map[i].elf_reloc_val]; } - return NULL; } @@ -155,21 +155,30 @@ static boolean arc_elf_object_p (abfd) bfd *abfd; { - int mach; - unsigned long arch = elf_elfheader (abfd)->e_flags & EF_ARC_MACH; + int mach = bfd_mach_arc_6; - switch (arch) + if (elf_elfheader(abfd)->e_machine == EM_ARC) { - case E_ARC_MACH_BASE: - mach = bfd_mach_arc_base; - break; - default: - /* Unknown cpu type. ??? What to do? */ - return false; + unsigned long arch = elf_elfheader (abfd)->e_flags & EF_ARC_MACH; + + switch (arch) + { + case E_ARC_MACH_ARC5: + mach = bfd_mach_arc_5; + break; + default: + case E_ARC_MACH_ARC6: + mach = bfd_mach_arc_6; + break; + case E_ARC_MACH_ARC7: + mach = bfd_mach_arc_7; + break; + case E_ARC_MACH_ARC8: + mach = bfd_mach_arc_8; + break; + } } - - (void) bfd_default_set_arch_mach (abfd, bfd_arch_arc, mach); - return true; + return bfd_default_set_arch_mach (abfd, bfd_arch_arc, mach); } /* The final processing done just before writing out an ARC ELF object file. @@ -180,34 +189,40 @@ arc_elf_final_write_processing (abfd, linker) bfd *abfd; boolean linker ATTRIBUTE_UNUSED; { - int mach; unsigned long val; - switch (mach = bfd_get_mach (abfd)) + switch (bfd_get_mach (abfd)) { - case bfd_mach_arc_base: - val = E_ARC_MACH_BASE; + case bfd_mach_arc_5: + val = E_ARC_MACH_ARC5; break; default: - return; + case bfd_mach_arc_6: + val = E_ARC_MACH_ARC6; + break; + case bfd_mach_arc_7: + val = E_ARC_MACH_ARC7; + break; + case bfd_mach_arc_8: + val = E_ARC_MACH_ARC8; + break; } - + elf_elfheader (abfd)->e_machine = EM_ARC; elf_elfheader (abfd)->e_flags &=~ EF_ARC_MACH; elf_elfheader (abfd)->e_flags |= val; } -#define TARGET_LITTLE_SYM bfd_elf32_littlearc_vec -#define TARGET_LITTLE_NAME "elf32-littlearc" -#define TARGET_BIG_SYM bfd_elf32_bigarc_vec -#define TARGET_BIG_NAME "elf32-bigarc" -#define ELF_ARCH bfd_arch_arc -#define ELF_MACHINE_CODE EM_CYGNUS_ARC -#define ELF_MAXPAGESIZE 0x1000 - -#define elf_info_to_howto 0 -#define elf_info_to_howto_rel arc_info_to_howto_rel -#define elf_backend_object_p arc_elf_object_p -#define elf_backend_final_write_processing \ - arc_elf_final_write_processing +#define TARGET_LITTLE_SYM bfd_elf32_littlearc_vec +#define TARGET_LITTLE_NAME "elf32-littlearc" +#define TARGET_BIG_SYM bfd_elf32_bigarc_vec +#define TARGET_BIG_NAME "elf32-bigarc" +#define ELF_ARCH bfd_arch_arc +#define ELF_MACHINE_CODE EM_ARC +#define ELF_MAXPAGESIZE 0x1000 + +#define elf_info_to_howto 0 +#define elf_info_to_howto_rel arc_info_to_howto_rel +#define elf_backend_object_p arc_elf_object_p +#define elf_backend_final_write_processing arc_elf_final_write_processing #include "elf32-target.h" diff --git a/contrib/binutils/bfd/elf32-arm.h b/contrib/binutils/bfd/elf32-arm.h index b05a5cc31ec9..d628f1d5476b 100644 --- a/contrib/binutils/bfd/elf32-arm.h +++ b/contrib/binutils/bfd/elf32-arm.h @@ -1295,7 +1295,7 @@ elf32_arm_final_link_relocate (howto, input_bfd, output_bfd, case R_ARM_REL32: value -= (input_section->output_section->vma - + input_section->output_offset); + + input_section->output_offset + rel->r_offset); value += addend; break; } diff --git a/contrib/binutils/bfd/elf64-x86-64.c b/contrib/binutils/bfd/elf64-x86-64.c new file mode 100644 index 000000000000..61534681de43 --- /dev/null +++ b/contrib/binutils/bfd/elf64-x86-64.c @@ -0,0 +1,1929 @@ +/* X86-64 specific support for 64-bit ELF + Copyright 2000, 2001 Free Software Foundation, Inc. + Contributed by Jan Hubicka <jh@suse.cz>. + +This file is part of BFD, the Binary File Descriptor library. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include "bfd.h" +#include "sysdep.h" +#include "libbfd.h" +#include "elf-bfd.h" + +#include "elf/x86-64.h" + +/* We use only the RELA entries. */ +#define USE_RELA + +/* In case we're on a 32-bit machine, construct a 64-bit "-1" value. */ +#define MINUS_ONE (~ (bfd_vma) 0) + +/* The relocation "howto" table. Order of fields: + type, size, bitsize, pc_relative, complain_on_overflow, + special_function, name, partial_inplace, src_mask, dst_pack, pcrel_offset. */ +static reloc_howto_type x86_64_elf_howto_table[] = +{ + HOWTO(R_X86_64_NONE, 0, 0, 0, false, 0, complain_overflow_dont, + bfd_elf_generic_reloc, "R_X86_64_NONE", false, 0x00000000, 0x00000000, + false), + HOWTO(R_X86_64_64, 0, 4, 64, false, 0, complain_overflow_bitfield, + bfd_elf_generic_reloc, "R_X86_64_64", false, MINUS_ONE, MINUS_ONE, + false), + HOWTO(R_X86_64_PC32, 0, 4, 32, true, 0, complain_overflow_signed, + bfd_elf_generic_reloc, "R_X86_64_PC32", false, 0xffffffff, 0xffffffff, + true), + HOWTO(R_X86_64_GOT32, 0, 4, 32, false, 0, complain_overflow_signed, + bfd_elf_generic_reloc, "R_X86_64_GOT32", false, 0xffffffff, 0xffffffff, + false), + HOWTO(R_X86_64_PLT32, 0, 4, 32, true, 0, complain_overflow_signed, + bfd_elf_generic_reloc, "R_X86_64_PLT32", false, 0xffffffff, 0xffffffff, + true), + HOWTO(R_X86_64_COPY, 0, 4, 32, false, 0, complain_overflow_bitfield, + bfd_elf_generic_reloc, "R_X86_64_COPY", false, 0xffffffff, 0xffffffff, + false), + HOWTO(R_X86_64_GLOB_DAT, 0, 4, 64, false, 0, complain_overflow_bitfield, + bfd_elf_generic_reloc, "R_X86_64_GLOB_DAT", false, MINUS_ONE, + MINUS_ONE, false), + HOWTO(R_X86_64_JUMP_SLOT, 0, 4, 64, false, 0, complain_overflow_bitfield, + bfd_elf_generic_reloc, "R_X86_64_JUMP_SLOT", false, MINUS_ONE, + MINUS_ONE, false), + HOWTO(R_X86_64_RELATIVE, 0, 4, 64, false, 0, complain_overflow_bitfield, + bfd_elf_generic_reloc, "R_X86_64_RELATIVE", false, MINUS_ONE, + MINUS_ONE, false), + HOWTO(R_X86_64_GOTPCREL, 0, 4, 32, true,0 , complain_overflow_signed, + bfd_elf_generic_reloc, "R_X86_64_GOTPCREL", false, 0xffffffff, + 0xffffffff, true), + HOWTO(R_X86_64_32, 0, 4, 32, false, 0, complain_overflow_unsigned, + bfd_elf_generic_reloc, "R_X86_64_32", false, 0xffffffff, 0xffffffff, + false), + HOWTO(R_X86_64_32S, 0, 4, 32, false, 0, complain_overflow_signed, + bfd_elf_generic_reloc, "R_X86_64_32S", false, 0xffffffff, 0xffffffff, + false), + HOWTO(R_X86_64_16, 0, 1, 16, false, 0, complain_overflow_bitfield, + bfd_elf_generic_reloc, "R_X86_64_16", false, 0xffff, 0xffff, false), + HOWTO(R_X86_64_PC16,0, 1, 16, true, 0, complain_overflow_bitfield, + bfd_elf_generic_reloc, "R_X86_64_PC16", false, 0xffff, 0xffff, true), + HOWTO(R_X86_64_8, 0, 0, 8, false, 0, complain_overflow_signed, + bfd_elf_generic_reloc, "R_X86_64_8", false, 0xff, 0xff, false), + HOWTO(R_X86_64_PC8, 0, 0, 8, true, 0, complain_overflow_signed, + bfd_elf_generic_reloc, "R_X86_64_PC8", false, 0xff, 0xff, true) +}; + +/* Map BFD relocs to the x86_64 elf relocs. */ +struct elf_reloc_map +{ + bfd_reloc_code_real_type bfd_reloc_val; + unsigned char elf_reloc_val; +}; + +static CONST struct elf_reloc_map x86_64_reloc_map[] = +{ + { BFD_RELOC_NONE, R_X86_64_NONE, }, + { BFD_RELOC_64, R_X86_64_64, }, + { BFD_RELOC_32_PCREL, R_X86_64_PC32, }, + { BFD_RELOC_X86_64_GOT32, R_X86_64_GOT32,}, + { BFD_RELOC_X86_64_PLT32, R_X86_64_PLT32,}, + { BFD_RELOC_X86_64_COPY, R_X86_64_COPY, }, + { BFD_RELOC_X86_64_GLOB_DAT, R_X86_64_GLOB_DAT, }, + { BFD_RELOC_X86_64_JUMP_SLOT, R_X86_64_JUMP_SLOT, }, + { BFD_RELOC_X86_64_RELATIVE, R_X86_64_RELATIVE, }, + { BFD_RELOC_X86_64_GOTPCREL, R_X86_64_GOTPCREL, }, + { BFD_RELOC_32, R_X86_64_32, }, + { BFD_RELOC_X86_64_32S, R_X86_64_32S, }, + { BFD_RELOC_16, R_X86_64_16, }, + { BFD_RELOC_16_PCREL, R_X86_64_PC16, }, + { BFD_RELOC_8, R_X86_64_8, }, + { BFD_RELOC_8_PCREL, R_X86_64_PC8, }, +}; + +static reloc_howto_type *elf64_x86_64_reloc_type_lookup + PARAMS ((bfd *, bfd_reloc_code_real_type)); +static void elf64_x86_64_info_to_howto + PARAMS ((bfd *, arelent *, Elf64_Internal_Rela *)); +static struct bfd_link_hash_table *elf64_x86_64_link_hash_table_create + PARAMS ((bfd *)); + +static struct bfd_hash_entry *elf64_x86_64_link_hash_newfunc + PARAMS ((struct bfd_hash_entry *, struct bfd_hash_table *, const char *)); +static boolean elf64_x86_64_adjust_dynamic_symbol + PARAMS ((struct bfd_link_info *, struct elf_link_hash_entry *)); + +static boolean elf64_x86_64_size_dynamic_sections + PARAMS ((bfd *, struct bfd_link_info *)); +static boolean elf64_x86_64_relocate_section + PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, + Elf_Internal_Rela *, Elf_Internal_Sym *, asection **)); +static boolean elf64_x86_64_finish_dynamic_symbol + PARAMS ((bfd *, struct bfd_link_info *, struct elf_link_hash_entry *, + Elf_Internal_Sym *sym)); +static boolean elf64_x86_64_finish_dynamic_sections + PARAMS ((bfd *, struct bfd_link_info *)); + +/* Given a BFD reloc type, return a HOWTO structure. */ +static reloc_howto_type * +elf64_x86_64_reloc_type_lookup (abfd, code) + bfd *abfd ATTRIBUTE_UNUSED; + bfd_reloc_code_real_type code; +{ + unsigned int i; + for (i = 0; i < sizeof (x86_64_reloc_map) / sizeof (struct elf_reloc_map); + i++) + { + if (x86_64_reloc_map[i].bfd_reloc_val == code) + return &x86_64_elf_howto_table[(int) + x86_64_reloc_map[i].elf_reloc_val]; + } + return 0; +} + +/* Given an x86_64 ELF reloc type, fill in an arelent structure. */ + +static void +elf64_x86_64_info_to_howto (abfd, cache_ptr, dst) + bfd *abfd ATTRIBUTE_UNUSED; + arelent *cache_ptr; + Elf64_Internal_Rela *dst; +{ + unsigned r_type; + + r_type = ELF64_R_TYPE (dst->r_info); + BFD_ASSERT (r_type < (unsigned int) R_X86_64_max); + cache_ptr->howto = &x86_64_elf_howto_table[r_type]; + BFD_ASSERT (r_type == cache_ptr->howto->type); +} + +/* Functions for the x86-64 ELF linker. */ + +/* The name of the dynamic interpreter. This is put in the .interp + section. */ + +#define ELF_DYNAMIC_INTERPRETER "/lib/ld64.so.1" + +/* The size in bytes of an entry in the global offset table. */ + +#define GOT_ENTRY_SIZE 8 + +/* The size in bytes of an entry in the procedure linkage table. */ + +#define PLT_ENTRY_SIZE 16 + +/* The first entry in a procedure linkage table looks like this. See the + SVR4 ABI i386 supplement and the x86-64 ABI to see how this works. */ + +static const bfd_byte elf64_x86_64_plt0_entry[PLT_ENTRY_SIZE] = +{ + 0xff, 0x35, 8, 0, 0, 0, /* pushq GOT+8(%rip) */ + 0xff, 0x25, 16, 0, 0, 0, /* jmpq *GOT+16(%rip) */ + 0x90, 0x90, 0x90, 0x90 /* pad out to 16 bytes with nops. */ +}; + +/* Subsequent entries in a procedure linkage table look like this. */ + +static const bfd_byte elf64_x86_64_plt_entry[PLT_ENTRY_SIZE] = +{ + 0xff, 0x25, /* jmpq *name@GOTPC(%rip) */ + 0, 0, 0, 0, /* replaced with offset to this symbol in .got. */ + 0x68, /* pushq immediate */ + 0, 0, 0, 0, /* replaced with index into relocation table. */ + 0xe9, /* jmp relative */ + 0, 0, 0, 0 /* replaced with offset to start of .plt0. */ +}; + +/* The x86-64 linker needs to keep track of the number of relocs that + it decides to copy in check_relocs for each symbol. This is so + that it can discard PC relative relocs if it doesn't need them when + linking with -Bsymbolic. We store the information in a field + extending the regular ELF linker hash table. */ + +/* This structure keeps track of the number of PC relative relocs we + have copied for a given symbol. */ + +struct elf64_x86_64_pcrel_relocs_copied +{ + /* Next section. */ + struct elf64_x86_64_pcrel_relocs_copied *next; + /* A section in dynobj. */ + asection *section; + /* Number of relocs copied in this section. */ + bfd_size_type count; +}; + +/* x86-64 ELF linker hash entry. */ + +struct elf64_x86_64_link_hash_entry +{ + struct elf_link_hash_entry root; + + /* Number of PC relative relocs copied for this symbol. */ + struct elf64_x86_64_pcrel_relocs_copied *pcrel_relocs_copied; +}; + +/* x86-64 ELF linker hash table. */ + +struct elf64_x86_64_link_hash_table +{ + struct elf_link_hash_table root; +}; + +/* Declare this now that the above structures are defined. */ + +static boolean elf64_x86_64_discard_copies + PARAMS ((struct elf64_x86_64_link_hash_entry *, PTR)); + +/* Traverse an x86-64 ELF linker hash table. */ + +#define elf64_x86_64_link_hash_traverse(table, func, info) \ + (elf_link_hash_traverse \ + (&(table)->root, \ + (boolean (*) PARAMS ((struct elf_link_hash_entry *, PTR))) (func), \ + (info))) + +/* Get the x86-64 ELF linker hash table from a link_info structure. */ + +#define elf64_x86_64_hash_table(p) \ + ((struct elf64_x86_64_link_hash_table *) ((p)->hash)) + +/* Create an entry in an x86-64 ELF linker hash table. */ + +static struct bfd_hash_entry * +elf64_x86_64_link_hash_newfunc (entry, table, string) + struct bfd_hash_entry *entry; + struct bfd_hash_table *table; + const char *string; +{ + struct elf64_x86_64_link_hash_entry *ret = + (struct elf64_x86_64_link_hash_entry *) entry; + + /* Allocate the structure if it has not already been allocated by a + subclass. */ + if (ret == (struct elf64_x86_64_link_hash_entry *) NULL) + ret = ((struct elf64_x86_64_link_hash_entry *) + bfd_hash_allocate (table, + sizeof (struct elf64_x86_64_link_hash_entry))); + if (ret == (struct elf64_x86_64_link_hash_entry *) NULL) + return (struct bfd_hash_entry *) ret; + + /* Call the allocation method of the superclass. */ + ret = ((struct elf64_x86_64_link_hash_entry *) + _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, + table, string)); + if (ret != (struct elf64_x86_64_link_hash_entry *) NULL) + { + ret->pcrel_relocs_copied = NULL; + } + + return (struct bfd_hash_entry *) ret; +} + +/* Create an X86-64 ELF linker hash table. */ + +static struct bfd_link_hash_table * +elf64_x86_64_link_hash_table_create (abfd) + bfd *abfd; +{ + struct elf64_x86_64_link_hash_table *ret; + + ret = ((struct elf64_x86_64_link_hash_table *) + bfd_alloc (abfd, sizeof (struct elf64_x86_64_link_hash_table))); + if (ret == (struct elf64_x86_64_link_hash_table *) NULL) + return NULL; + + if (! _bfd_elf_link_hash_table_init (&ret->root, abfd, + elf64_x86_64_link_hash_newfunc)) + { + bfd_release (abfd, ret); + return NULL; + } + + return &ret->root.root; +} + +boolean +elf64_x86_64_elf_object_p (abfd) + bfd *abfd; +{ + /* Set the right machine number for an x86-64 elf64 file. */ + bfd_default_set_arch_mach (abfd, bfd_arch_i386, bfd_mach_x86_64); + return true; +} + +/* Look through the relocs for a section during the first phase, and + allocate space in the global offset table or procedure linkage + table. */ + +static boolean +elf64_x86_64_check_relocs (abfd, info, sec, relocs) + bfd *abfd; + struct bfd_link_info *info; + asection *sec; + const Elf_Internal_Rela *relocs; +{ + bfd *dynobj; + Elf_Internal_Shdr *symtab_hdr; + struct elf_link_hash_entry **sym_hashes; + bfd_signed_vma *local_got_refcounts; + const Elf_Internal_Rela *rel; + const Elf_Internal_Rela *rel_end; + asection *sgot; + asection *srelgot; + asection *sreloc; + + if (info->relocateable) + return true; + + dynobj = elf_hash_table (info)->dynobj; + symtab_hdr = &elf_tdata (abfd)->symtab_hdr; + sym_hashes = elf_sym_hashes (abfd); + local_got_refcounts = elf_local_got_refcounts (abfd); + + sgot = srelgot = sreloc = NULL; + rel_end = relocs + sec->reloc_count; + for (rel = relocs; rel < rel_end; rel++) + { + unsigned long r_symndx; + struct elf_link_hash_entry *h; + + r_symndx = ELF64_R_SYM (rel->r_info); + if (r_symndx < symtab_hdr->sh_info) + h = NULL; + else + h = sym_hashes[r_symndx - symtab_hdr->sh_info]; + + /* Some relocs require a global offset table. */ + if (dynobj == NULL) + { + switch (ELF64_R_TYPE (rel->r_info)) + { + case R_X86_64_GOT32: + case R_X86_64_GOTPCREL: + elf_hash_table (info)->dynobj = dynobj = abfd; + if (! _bfd_elf_create_got_section (dynobj, info)) + return false; + break; + } + } + + switch (ELF64_R_TYPE (rel->r_info)) + { + case R_X86_64_GOTPCREL: + case R_X86_64_GOT32: + /* This symbol requires a global offset table entry. */ + + if (sgot == NULL) + { + sgot = bfd_get_section_by_name (dynobj, ".got"); + BFD_ASSERT (sgot != NULL); + } + + if (srelgot == NULL && (h != NULL || info->shared)) + { + srelgot = bfd_get_section_by_name (dynobj, ".rela.got"); + if (srelgot == NULL) + { + srelgot = bfd_make_section (dynobj, ".rela.got"); + if (srelgot == NULL + || ! bfd_set_section_flags (dynobj, srelgot, + (SEC_ALLOC + | SEC_LOAD + | SEC_HAS_CONTENTS + | SEC_IN_MEMORY + | SEC_LINKER_CREATED + | SEC_READONLY)) + || ! bfd_set_section_alignment (dynobj, srelgot, 3)) + return false; + } + } + + if (h != NULL) + { + if (h->got.refcount == -1) + { + h->got.refcount = 1; + + /* Make sure this symbol is output as a dynamic symbol. */ + if (h->dynindx == -1) + { + if (! bfd_elf64_link_record_dynamic_symbol (info, h)) + return false; + } + + sgot->_raw_size += GOT_ENTRY_SIZE; + srelgot->_raw_size += sizeof (Elf64_External_Rela); + } + else + h->got.refcount += 1; + } + else + { + /* This is a global offset table entry for a local symbol. */ + if (local_got_refcounts == NULL) + { + size_t size; + + size = symtab_hdr->sh_info * sizeof (bfd_signed_vma); + local_got_refcounts = ((bfd_signed_vma *) + bfd_alloc (abfd, size)); + if (local_got_refcounts == NULL) + return false; + elf_local_got_refcounts (abfd) = local_got_refcounts; + memset (local_got_refcounts, -1, size); + } + if (local_got_refcounts[r_symndx] == -1) + { + local_got_refcounts[r_symndx] = 1; + + sgot->_raw_size += GOT_ENTRY_SIZE; + if (info->shared) + { + /* If we are generating a shared object, we need to + output a R_X86_64_RELATIVE reloc so that the dynamic + linker can adjust this GOT entry. */ + srelgot->_raw_size += sizeof (Elf64_External_Rela); + } + } + else + local_got_refcounts[r_symndx] += 1; + } + break; + + case R_X86_64_PLT32: + /* This symbol requires a procedure linkage table entry. We + actually build the entry in adjust_dynamic_symbol, + because this might be a case of linking PIC code which is + never referenced by a dynamic object, in which case we + don't need to generate a procedure linkage table entry + after all. */ + + /* If this is a local symbol, we resolve it directly without + creating a procedure linkage table entry. */ + if (h == NULL) + continue; + + h->elf_link_hash_flags |= ELF_LINK_HASH_NEEDS_PLT; + if (h->plt.refcount == -1) + h->plt.refcount = 1; + else + h->plt.refcount += 1; + break; + + case R_X86_64_8: + case R_X86_64_16: + case R_X86_64_32: + case R_X86_64_64: + case R_X86_64_32S: + case R_X86_64_PC32: + if (h != NULL) + h->elf_link_hash_flags |= ELF_LINK_NON_GOT_REF; + + /* If we are creating a shared library, and this is a reloc + against a global symbol, or a non PC relative reloc + against a local symbol, then we need to copy the reloc + into the shared library. However, if we are linking with + -Bsymbolic, we do not need to copy a reloc against a + global symbol which is defined in an object we are + including in the link (i.e., DEF_REGULAR is set). At + this point we have not seen all the input files, so it is + possible that DEF_REGULAR is not set now but will be set + later (it is never cleared). We account for that + possibility below by storing information in the + pcrel_relocs_copied field of the hash table entry. + A similar situation occurs when creating shared libraries + and symbol visibility changes render the symbol local. */ + if (info->shared + && (sec->flags & SEC_ALLOC) != 0 + && (((ELF64_R_TYPE (rel->r_info) != R_X86_64_PC8) + && (ELF64_R_TYPE (rel->r_info) != R_X86_64_PC16) + && (ELF64_R_TYPE (rel->r_info) != R_X86_64_PC32)) + || (h != NULL + && (! info->symbolic + || (h->elf_link_hash_flags + & ELF_LINK_HASH_DEF_REGULAR) == 0)))) + { + /* When creating a shared object, we must copy these + reloc types into the output file. We create a reloc + section in dynobj and make room for this reloc. */ + if (sreloc == NULL) + { + const char *name; + + name = (bfd_elf_string_from_elf_section + (abfd, + elf_elfheader (abfd)->e_shstrndx, + elf_section_data (sec)->rel_hdr.sh_name)); + if (name == NULL) + return false; + + BFD_ASSERT (strncmp (name, ".rela", 5) == 0 + && strcmp (bfd_get_section_name (abfd, sec), + name + 5) == 0); + + sreloc = bfd_get_section_by_name (dynobj, name); + if (sreloc == NULL) + { + flagword flags; + + sreloc = bfd_make_section (dynobj, name); + flags = (SEC_HAS_CONTENTS | SEC_READONLY + | SEC_IN_MEMORY | SEC_LINKER_CREATED); + if ((sec->flags & SEC_ALLOC) != 0) + flags |= SEC_ALLOC | SEC_LOAD; + if (sreloc == NULL + || ! bfd_set_section_flags (dynobj, sreloc, flags) + || ! bfd_set_section_alignment (dynobj, sreloc, 3)) + return false; + } + } + + sreloc->_raw_size += sizeof (Elf64_External_Rela); + + /* If this is a global symbol, we count the number of PC + relative relocations we have entered for this symbol, + so that we can discard them later as necessary. Note + that this function is only called if we are using an + elf64_x86_64 linker hash table, which means that h is + really a pointer to an elf64_x86_64_link_hash_entry. */ + if (h != NULL + && ((ELF64_R_TYPE (rel->r_info) == R_X86_64_PC8) + || (ELF64_R_TYPE (rel->r_info) == R_X86_64_PC16) + || (ELF64_R_TYPE (rel->r_info) == R_X86_64_PC32))) + { + struct elf64_x86_64_link_hash_entry *eh; + struct elf64_x86_64_pcrel_relocs_copied *p; + + eh = (struct elf64_x86_64_link_hash_entry *) h; + + for (p = eh->pcrel_relocs_copied; p != NULL; p = p->next) + if (p->section == sreloc) + break; + + if (p == NULL) + { + p = ((struct elf64_x86_64_pcrel_relocs_copied *) + bfd_alloc (dynobj, sizeof *p)); + if (p == NULL) + return false; + p->next = eh->pcrel_relocs_copied; + eh->pcrel_relocs_copied = p; + p->section = sreloc; + p->count = 0; + } + + ++p->count; + } + } + break; + } + } + + return true; +} + +/* Return the section that should be marked against GC for a given + relocation. */ + +static asection * +elf64_x86_64_gc_mark_hook (abfd, info, rel, h, sym) + bfd *abfd; + struct bfd_link_info *info ATTRIBUTE_UNUSED; + Elf_Internal_Rela *rel ATTRIBUTE_UNUSED; + struct elf_link_hash_entry *h; + Elf_Internal_Sym *sym; +{ + if (h != NULL) + { + switch (h->root.type) + { + case bfd_link_hash_defined: + case bfd_link_hash_defweak: + return h->root.u.def.section; + + case bfd_link_hash_common: + return h->root.u.c.p->section; + + default: + break; + } + } + else + { + if (!(elf_bad_symtab (abfd) + && ELF_ST_BIND (sym->st_info) != STB_LOCAL) + && ! ((sym->st_shndx <= 0 || sym->st_shndx >= SHN_LORESERVE) + && sym->st_shndx != SHN_COMMON)) + { + return bfd_section_from_elf_index (abfd, sym->st_shndx); + } + } + + return NULL; +} + +/* Update the got entry reference counts for the section being removed. */ + +static boolean +elf64_x86_64_gc_sweep_hook (abfd, info, sec, relocs) + bfd *abfd; + struct bfd_link_info *info ATTRIBUTE_UNUSED; + asection *sec; + const Elf_Internal_Rela *relocs; +{ + Elf_Internal_Shdr *symtab_hdr; + struct elf_link_hash_entry **sym_hashes; + bfd_signed_vma *local_got_refcounts; + const Elf_Internal_Rela *rel, *relend; + unsigned long r_symndx; + struct elf_link_hash_entry *h; + bfd *dynobj; + asection *sgot; + asection *srelgot; + + symtab_hdr = &elf_tdata (abfd)->symtab_hdr; + sym_hashes = elf_sym_hashes (abfd); + local_got_refcounts = elf_local_got_refcounts (abfd); + + dynobj = elf_hash_table (info)->dynobj; + if (dynobj == NULL) + return true; + + sgot = bfd_get_section_by_name (dynobj, ".got"); + srelgot = bfd_get_section_by_name (dynobj, ".rela.got"); + + relend = relocs + sec->reloc_count; + for (rel = relocs; rel < relend; rel++) + switch (ELF64_R_TYPE (rel->r_info)) + { + case R_X86_64_GOT32: + case R_X86_64_GOTPCREL: + r_symndx = ELF64_R_SYM (rel->r_info); + if (r_symndx >= symtab_hdr->sh_info) + { + h = sym_hashes[r_symndx - symtab_hdr->sh_info]; + if (h->got.refcount > 0) + { + h->got.refcount -= 1; + if (h->got.refcount == 0) + { + sgot->_raw_size -= GOT_ENTRY_SIZE; + srelgot->_raw_size -= sizeof (Elf64_External_Rela); + } + } + } + else if (local_got_refcounts != NULL) + { + if (local_got_refcounts[r_symndx] > 0) + { + local_got_refcounts[r_symndx] -= 1; + if (local_got_refcounts[r_symndx] == 0) + { + sgot->_raw_size -= GOT_ENTRY_SIZE; + if (info->shared) + srelgot->_raw_size -= sizeof (Elf64_External_Rela); + } + } + } + break; + + case R_X86_64_PLT32: + r_symndx = ELF64_R_SYM (rel->r_info); + if (r_symndx >= symtab_hdr->sh_info) + { + h = sym_hashes[r_symndx - symtab_hdr->sh_info]; + if (h->plt.refcount > 0) + h->plt.refcount -= 1; + } + break; + + default: + break; + } + + return true; +} + +/* Adjust a symbol defined by a dynamic object and referenced by a + regular object. The current definition is in some section of the + dynamic object, but we're not including those sections. We have to + change the definition to something the rest of the link can + understand. */ + +static boolean +elf64_x86_64_adjust_dynamic_symbol (info, h) + struct bfd_link_info *info; + struct elf_link_hash_entry *h; +{ + bfd *dynobj; + asection *s; + unsigned int power_of_two; + + dynobj = elf_hash_table (info)->dynobj; + + /* Make sure we know what is going on here. */ + BFD_ASSERT (dynobj != NULL + && ((h->elf_link_hash_flags & ELF_LINK_HASH_NEEDS_PLT) + || h->weakdef != NULL + || ((h->elf_link_hash_flags + & ELF_LINK_HASH_DEF_DYNAMIC) != 0 + && (h->elf_link_hash_flags + & ELF_LINK_HASH_REF_REGULAR) != 0 + && (h->elf_link_hash_flags + & ELF_LINK_HASH_DEF_REGULAR) == 0))); + + /* If this is a function, put it in the procedure linkage table. We + will fill in the contents of the procedure linkage table later, + when we know the address of the .got section. */ + if (h->type == STT_FUNC + || (h->elf_link_hash_flags & ELF_LINK_HASH_NEEDS_PLT) != 0) + { + if ((! info->shared + && (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_DYNAMIC) == 0 + && (h->elf_link_hash_flags & ELF_LINK_HASH_REF_DYNAMIC) == 0) + || (info->shared && h->plt.refcount <= 0)) + { + /* This case can occur if we saw a PLT32 reloc in an input + file, but the symbol was never referred to by a dynamic + object, or if all references were garbage collected. In + such a case, we don't actually need to build a procedure + linkage table, and we can just do a PC32 reloc instead. */ + h->plt.offset = (bfd_vma) -1; + h->elf_link_hash_flags &= ~ELF_LINK_HASH_NEEDS_PLT; + return true; + } + + /* Make sure this symbol is output as a dynamic symbol. */ + if (h->dynindx == -1) + { + if (! bfd_elf64_link_record_dynamic_symbol (info, h)) + return false; + } + + s = bfd_get_section_by_name (dynobj, ".plt"); + BFD_ASSERT (s != NULL); + + /* If this is the first .plt entry, make room for the special + first entry. */ + if (s->_raw_size == 0) + s->_raw_size = PLT_ENTRY_SIZE; + + /* If this symbol is not defined in a regular file, and we are + not generating a shared library, then set the symbol to this + location in the .plt. This is required to make function + pointers compare as equal between the normal executable and + the shared library. */ + if (! info->shared + && (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR) == 0) + { + h->root.u.def.section = s; + h->root.u.def.value = s->_raw_size; + } + + h->plt.offset = s->_raw_size; + + /* Make room for this entry. */ + s->_raw_size += PLT_ENTRY_SIZE; + + /* We also need to make an entry in the .got.plt section, which + will be placed in the .got section by the linker script. */ + s = bfd_get_section_by_name (dynobj, ".got.plt"); + BFD_ASSERT (s != NULL); + s->_raw_size += GOT_ENTRY_SIZE; + + /* We also need to make an entry in the .rela.plt section. */ + s = bfd_get_section_by_name (dynobj, ".rela.plt"); + BFD_ASSERT (s != NULL); + s->_raw_size += sizeof (Elf64_External_Rela); + + return true; + } + + /* If this is a weak symbol, and there is a real definition, the + processor independent code will have arranged for us to see the + real definition first, and we can just use the same value. */ + if (h->weakdef != NULL) + { + BFD_ASSERT (h->weakdef->root.type == bfd_link_hash_defined + || h->weakdef->root.type == bfd_link_hash_defweak); + h->root.u.def.section = h->weakdef->root.u.def.section; + h->root.u.def.value = h->weakdef->root.u.def.value; + return true; + } + + /* This is a reference to a symbol defined by a dynamic object which + is not a function. */ + + /* If we are creating a shared library, we must presume that the + only references to the symbol are via the global offset table. + For such cases we need not do anything here; the relocations will + be handled correctly by relocate_section. */ + if (info->shared) + return true; + + /* If there are no references to this symbol that do not use the + GOT, we don't need to generate a copy reloc. */ + if ((h->elf_link_hash_flags & ELF_LINK_NON_GOT_REF) == 0) + return true; + + /* We must allocate the symbol in our .dynbss section, which will + become part of the .bss section of the executable. There will be + an entry for this symbol in the .dynsym section. The dynamic + object will contain position independent code, so all references + from the dynamic object to this symbol will go through the global + offset table. The dynamic linker will use the .dynsym entry to + determine the address it must put in the global offset table, so + both the dynamic object and the regular object will refer to the + same memory location for the variable. */ + + s = bfd_get_section_by_name (dynobj, ".dynbss"); + BFD_ASSERT (s != NULL); + + /* We must generate a R_X86_64_COPY reloc to tell the dynamic linker + to copy the initial value out of the dynamic object and into the + runtime process image. We need to remember the offset into the + .rela.bss section we are going to use. */ + if ((h->root.u.def.section->flags & SEC_ALLOC) != 0) + { + asection *srel; + + srel = bfd_get_section_by_name (dynobj, ".rela.bss"); + BFD_ASSERT (srel != NULL); + srel->_raw_size += sizeof (Elf64_External_Rela); + h->elf_link_hash_flags |= ELF_LINK_HASH_NEEDS_COPY; + } + + /* We need to figure out the alignment required for this symbol. I + have no idea how ELF linkers handle this. 16-bytes is the size + of the largest type that requires hard alignment -- long double. */ + /* FIXME: This is VERY ugly. Should be fixed for all architectures using + this construct. */ + power_of_two = bfd_log2 (h->size); + if (power_of_two > 4) + power_of_two = 4; + + /* Apply the required alignment. */ + s->_raw_size = BFD_ALIGN (s->_raw_size, (bfd_size_type) (1 << power_of_two)); + if (power_of_two > bfd_get_section_alignment (dynobj, s)) + { + if (! bfd_set_section_alignment (dynobj, s, power_of_two)) + return false; + } + + /* Define the symbol as being at this point in the section. */ + h->root.u.def.section = s; + h->root.u.def.value = s->_raw_size; + + /* Increment the section size to make room for the symbol. */ + s->_raw_size += h->size; + + return true; +} + +/* Set the sizes of the dynamic sections. */ + +static boolean +elf64_x86_64_size_dynamic_sections (output_bfd, info) + bfd *output_bfd; + struct bfd_link_info *info; +{ + bfd *dynobj; + asection *s; + boolean plt; + boolean relocs; + boolean reltext; + + dynobj = elf_hash_table (info)->dynobj; + BFD_ASSERT (dynobj != NULL); + + if (elf_hash_table (info)->dynamic_sections_created) + { + /* Set the contents of the .interp section to the interpreter. */ + if (! info->shared) + { + s = bfd_get_section_by_name (dynobj, ".interp"); + BFD_ASSERT (s != NULL); + s->_raw_size = sizeof ELF_DYNAMIC_INTERPRETER; + s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER; + } + } + else + { + /* We may have created entries in the .rela.got section. + However, if we are not creating the dynamic sections, we will + not actually use these entries. Reset the size of .rela.got, + which will cause it to get stripped from the output file + below. */ + s = bfd_get_section_by_name (dynobj, ".rela.got"); + if (s != NULL) + s->_raw_size = 0; + } + + /* If this is a -Bsymbolic shared link, then we need to discard all + PC relative relocs against symbols defined in a regular object. + We allocated space for them in the check_relocs routine, but we + will not fill them in in the relocate_section routine. */ + if (info->shared) + elf64_x86_64_link_hash_traverse (elf64_x86_64_hash_table (info), + elf64_x86_64_discard_copies, + (PTR) info); + + /* The check_relocs and adjust_dynamic_symbol entry points have + determined the sizes of the various dynamic sections. Allocate + memory for them. */ + plt = relocs = reltext = false; + for (s = dynobj->sections; s != NULL; s = s->next) + { + const char *name; + boolean strip; + + if ((s->flags & SEC_LINKER_CREATED) == 0) + continue; + + /* It's OK to base decisions on the section name, because none + of the dynobj section names depend upon the input files. */ + name = bfd_get_section_name (dynobj, s); + + strip = false; + if (strcmp (name, ".plt") == 0) + { + if (s->_raw_size == 0) + { + /* Strip this section if we don't need it; see the + comment below. */ + strip = true; + } + else + { + /* Remember whether there is a PLT. */ + plt = true; + } + } + else if (strncmp (name, ".rela", 5) == 0) + { + if (s->_raw_size == 0) + { + /* If we don't need this section, strip it from the + output file. This is mostly to handle .rela.bss and + .rela.plt. We must create both sections in + create_dynamic_sections, because they must be created + before the linker maps input sections to output + sections. The linker does that before + adjust_dynamic_symbol is called, and it is that + function which decides whether anything needs to go + into these sections. */ + strip = true; + } + else + { + asection *target; + + /* Remember whether there are any reloc sections other + than .rela.plt. */ + if (strcmp (name, ".rela.plt") != 0) + { + const char *outname; + + relocs = true; + + /* If this relocation section applies to a read only + section, then we probably need a DT_TEXTREL + entry. The entries in the .rela.plt section + really apply to the .got section, which we + created ourselves and so know is not readonly. */ + outname = bfd_get_section_name (output_bfd, + s->output_section); + target = bfd_get_section_by_name (output_bfd, outname + 5); + if (target != NULL + && (target->flags & SEC_READONLY) != 0 + && (target->flags & SEC_ALLOC) != 0) + reltext = true; + } + + /* We use the reloc_count field as a counter if we need + to copy relocs into the output file. */ + s->reloc_count = 0; + } + } + else if (strncmp (name, ".got", 4) != 0) + { + /* It's not one of our sections, so don't allocate space. */ + continue; + } + + if (strip) + { + _bfd_strip_section_from_output (info, s); + continue; + } + + /* Allocate memory for the section contents. We use bfd_zalloc + here in case unused entries are not reclaimed before the + section's contents are written out. This should not happen, + but this way if it does, we get a R_X86_64_NONE reloc instead + of garbage. */ + s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->_raw_size); + if (s->contents == NULL && s->_raw_size != 0) + return false; + } + + if (elf_hash_table (info)->dynamic_sections_created) + { + /* Add some entries to the .dynamic section. We fill in the + values later, in elf64_x86_64_finish_dynamic_sections, but we + must add the entries now so that we get the correct size for + the .dynamic section. The DT_DEBUG entry is filled in by the + dynamic linker and used by the debugger. */ + if (! info->shared) + { + if (! bfd_elf64_add_dynamic_entry (info, DT_DEBUG, 0)) + return false; + } + + if (plt) + { + if (! bfd_elf64_add_dynamic_entry (info, DT_PLTGOT, 0) + || ! bfd_elf64_add_dynamic_entry (info, DT_PLTRELSZ, 0) + || ! bfd_elf64_add_dynamic_entry (info, DT_PLTREL, DT_RELA) + || ! bfd_elf64_add_dynamic_entry (info, DT_JMPREL, 0)) + return false; + } + + if (relocs) + { + if (! bfd_elf64_add_dynamic_entry (info, DT_RELA, 0) + || ! bfd_elf64_add_dynamic_entry (info, DT_RELASZ, 0) + || ! bfd_elf64_add_dynamic_entry (info, DT_RELAENT, + sizeof (Elf64_External_Rela))) + return false; + } + + if (reltext) + { + if (! bfd_elf64_add_dynamic_entry (info, DT_TEXTREL, 0)) + return false; + info->flags |= DF_TEXTREL; + } + } + + return true; +} + +/* This function is called via elf64_x86_64_link_hash_traverse if we are + creating a shared object. In the -Bsymbolic case, it discards the + space allocated to copy PC relative relocs against symbols which + are defined in regular objects. For the normal non-symbolic case, + we also discard space for relocs that have become local due to + symbol visibility changes. We allocated space for them in the + check_relocs routine, but we won't fill them in in the + relocate_section routine. */ + +static boolean +elf64_x86_64_discard_copies (h, inf) + struct elf64_x86_64_link_hash_entry *h; + PTR inf; +{ + struct elf64_x86_64_pcrel_relocs_copied *s; + struct bfd_link_info *info = (struct bfd_link_info *) inf; + + /* If a symbol has been forced local or we have found a regular + definition for the symbolic link case, then we won't be needing + any relocs. */ + if ((h->root.elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR) != 0 + && ((h->root.elf_link_hash_flags & ELF_LINK_FORCED_LOCAL) != 0 + || info->symbolic)) + { + for (s = h->pcrel_relocs_copied; s != NULL; s = s->next) + s->section->_raw_size -= s->count * sizeof (Elf64_External_Rela); + } + + return true; +} + +/* Relocate an x86_64 ELF section. */ + +static boolean +elf64_x86_64_relocate_section (output_bfd, info, input_bfd, input_section, + contents, relocs, local_syms, local_sections) + bfd *output_bfd; + struct bfd_link_info *info; + bfd *input_bfd; + asection *input_section; + bfd_byte *contents; + Elf_Internal_Rela *relocs; + Elf_Internal_Sym *local_syms; + asection **local_sections; +{ + bfd *dynobj; + Elf_Internal_Shdr *symtab_hdr; + struct elf_link_hash_entry **sym_hashes; + bfd_vma *local_got_offsets; + asection *sgot; + asection *splt; + asection *sreloc; + Elf_Internal_Rela *rela; + Elf_Internal_Rela *relend; + + dynobj = elf_hash_table (info)->dynobj; + symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; + sym_hashes = elf_sym_hashes (input_bfd); + local_got_offsets = elf_local_got_offsets (input_bfd); + + sreloc = splt = sgot = NULL; + if (dynobj != NULL) + { + splt = bfd_get_section_by_name (dynobj, ".plt"); + sgot = bfd_get_section_by_name (dynobj, ".got"); + } + + rela = relocs; + relend = relocs + input_section->reloc_count; + for (; rela < relend; rela++) + { + int r_type; + reloc_howto_type *howto; + unsigned long r_symndx; + struct elf_link_hash_entry *h; + Elf_Internal_Sym *sym; + asection *sec; + bfd_vma relocation; + bfd_reloc_status_type r; + unsigned int indx; + + r_type = ELF64_R_TYPE (rela->r_info); + + if ((indx = (unsigned) r_type) >= R_X86_64_max) + { + bfd_set_error (bfd_error_bad_value); + return false; + } + howto = x86_64_elf_howto_table + indx; + + r_symndx = ELF64_R_SYM (rela->r_info); + + if (info->relocateable) + { + /* This is a relocateable link. We don't have to change + anything, unless the reloc is against a section symbol, + in which case we have to adjust according to where the + section symbol winds up in the output section. */ + if (r_symndx < symtab_hdr->sh_info) + { + sym = local_syms + r_symndx; + if (ELF_ST_TYPE (sym->st_info) == STT_SECTION) + { + sec = local_sections[r_symndx]; + rela->r_addend += sec->output_offset + sym->st_value; + } + } + + continue; + } + + /* This is a final link. */ + h = NULL; + sym = NULL; + sec = NULL; + if (r_symndx < symtab_hdr->sh_info) + { + sym = local_syms + r_symndx; + sec = local_sections[r_symndx]; + relocation = (sec->output_section->vma + + sec->output_offset + + sym->st_value); + } + else + { + h = sym_hashes[r_symndx - symtab_hdr->sh_info]; + while (h->root.type == bfd_link_hash_indirect + || h->root.type == bfd_link_hash_warning) + h = (struct elf_link_hash_entry *) h->root.u.i.link; + if (h->root.type == bfd_link_hash_defined + || h->root.type == bfd_link_hash_defweak) + { + sec = h->root.u.def.section; + if ((r_type == R_X86_64_PLT32 + && splt != NULL + && h->plt.offset != (bfd_vma) -1) + || ((r_type == R_X86_64_GOT32 || r_type == R_X86_64_GOTPCREL) + && elf_hash_table (info)->dynamic_sections_created + && (!info->shared + || (! info->symbolic && h->dynindx != -1) + || (h->elf_link_hash_flags + & ELF_LINK_HASH_DEF_REGULAR) == 0)) + || (info->shared + && ((! info->symbolic && h->dynindx != -1) + || (h->elf_link_hash_flags + & ELF_LINK_HASH_DEF_REGULAR) == 0) + && (r_type == R_X86_64_8 + || r_type == R_X86_64_16 + || r_type == R_X86_64_32 + || r_type == R_X86_64_64 + || r_type == R_X86_64_PC8 + || r_type == R_X86_64_PC16 + || r_type == R_X86_64_PC32) + && ((input_section->flags & SEC_ALLOC) != 0 + /* DWARF will emit R_X86_64_32 relocations in its + sections against symbols defined externally + in shared libraries. We can't do anything + with them here. */ + || ((input_section->flags & SEC_DEBUGGING) != 0 + && (h->elf_link_hash_flags + & ELF_LINK_HASH_DEF_DYNAMIC) != 0)))) + { + /* In these cases, we don't need the relocation + value. We check specially because in some + obscure cases sec->output_section will be NULL. */ + relocation = 0; + } + else if (sec->output_section == NULL) + { + (*_bfd_error_handler) + (_("%s: warning: unresolvable relocation against symbol `%s' from %s section"), + bfd_get_filename (input_bfd), h->root.root.string, + bfd_get_section_name (input_bfd, input_section)); + relocation = 0; + } + else + relocation = (h->root.u.def.value + + sec->output_section->vma + + sec->output_offset); + } + else if (h->root.type == bfd_link_hash_undefweak) + relocation = 0; + else if (info->shared && !info->symbolic && !info->no_undefined + && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT) + relocation = 0; + else + { + if (! ((*info->callbacks->undefined_symbol) + (info, h->root.root.string, input_bfd, + input_section, rela->r_offset, + (!info->shared || info->no_undefined + || ELF_ST_VISIBILITY (h->other))))) + return false; + relocation = 0; + } + } + + /* When generating a shared object, the relocations handled here are + copied into the output file to be resolved at run time. */ + switch (r_type) + { + case R_X86_64_GOT32: + /* Relocation is to the entry for this symbol in the global + offset table. */ + case R_X86_64_GOTPCREL: + /* Use global offset table as symbol value. */ + BFD_ASSERT (sgot != NULL); + + if (h != NULL) + { + bfd_vma off = h->got.offset; + BFD_ASSERT (off != (bfd_vma) -1); + + if (! elf_hash_table (info)->dynamic_sections_created + || (info->shared + && (info->symbolic || h->dynindx == -1) + && (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR))) + { + /* This is actually a static link, or it is a -Bsymbolic + link and the symbol is defined locally, or the symbol + was forced to be local because of a version file. We + must initialize this entry in the global offset table. + Since the offset must always be a multiple of 8, we + use the least significant bit to record whether we + have initialized it already. + + When doing a dynamic link, we create a .rela.got + relocation entry to initialize the value. This is + done in the finish_dynamic_symbol routine. */ + if ((off & 1) != 0) + off &= ~1; + else + { + bfd_put_64 (output_bfd, relocation, + sgot->contents + off); + h->got.offset |= 1; + } + } + if (r_type == R_X86_64_GOTPCREL) + relocation = sgot->output_section->vma + sgot->output_offset + off; + else + relocation = sgot->output_offset + off; + } + else + { + bfd_vma off; + + BFD_ASSERT (local_got_offsets != NULL + && local_got_offsets[r_symndx] != (bfd_vma) -1); + + off = local_got_offsets[r_symndx]; + + /* The offset must always be a multiple of 8. We use + the least significant bit to record whether we have + already generated the necessary reloc. */ + if ((off & 1) != 0) + off &= ~1; + else + { + bfd_put_64 (output_bfd, relocation, sgot->contents + off); + + if (info->shared) + { + asection *srelgot; + Elf_Internal_Rela outrel; + + /* We need to generate a R_X86_64_RELATIVE reloc + for the dynamic linker. */ + srelgot = bfd_get_section_by_name (dynobj, ".rela.got"); + BFD_ASSERT (srelgot != NULL); + + outrel.r_offset = (sgot->output_section->vma + + sgot->output_offset + + off); + outrel.r_info = ELF64_R_INFO (0, R_X86_64_RELATIVE); + outrel.r_addend = relocation; + bfd_elf64_swap_reloca_out (output_bfd, &outrel, + (((Elf64_External_Rela *) + srelgot->contents) + + srelgot->reloc_count)); + ++srelgot->reloc_count; + } + + local_got_offsets[r_symndx] |= 1; + } + + if (r_type == R_X86_64_GOTPCREL) + relocation = sgot->output_section->vma + sgot->output_offset + off; + else + relocation = sgot->output_offset + off; + } + + break; + + case R_X86_64_PLT32: + /* Relocation is to the entry for this symbol in the + procedure linkage table. */ + + /* Resolve a PLT32 reloc against a local symbol directly, + without using the procedure linkage table. */ + if (h == NULL) + break; + + if (h->plt.offset == (bfd_vma) -1 || splt == NULL) + { + /* We didn't make a PLT entry for this symbol. This + happens when statically linking PIC code, or when + using -Bsymbolic. */ + break; + } + + relocation = (splt->output_section->vma + + splt->output_offset + + h->plt.offset); + break; + + case R_X86_64_PC8: + case R_X86_64_PC16: + case R_X86_64_PC32: + if (h == NULL || h->dynindx == -1 + || (info->symbolic + && h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR)) + break; + /* Fall through. */ + case R_X86_64_8: + case R_X86_64_16: + case R_X86_64_32: + case R_X86_64_64: + /* FIXME: The ABI says the linker should make sure the value is + the same when it's zeroextended to 64 bit. */ + if (info->shared && (input_section->flags & SEC_ALLOC) != 0) + { + Elf_Internal_Rela outrel; + boolean skip, relocate; + + /* When generating a shared object, these relocations + are copied into the output file to be resolved at run + time. */ + + if (sreloc == NULL) + { + const char *name; + + name = (bfd_elf_string_from_elf_section + (input_bfd, + elf_elfheader (input_bfd)->e_shstrndx, + elf_section_data (input_section)->rel_hdr.sh_name)); + if (name == NULL) + return false; + + BFD_ASSERT (strncmp (name, ".rela", 5) == 0 + && strcmp (bfd_get_section_name (input_bfd, + input_section), + name + 5) == 0); + + sreloc = bfd_get_section_by_name (dynobj, name); + BFD_ASSERT (sreloc != NULL); + } + + skip = false; + + if (elf_section_data (input_section)->stab_info == NULL) + outrel.r_offset = rela->r_offset; + else + { + bfd_vma off; + + off = (_bfd_stab_section_offset + (output_bfd, &elf_hash_table (info)->stab_info, + input_section, + &elf_section_data (input_section)->stab_info, + rela->r_offset)); + if (off == (bfd_vma) -1) + skip = true; + outrel.r_offset = off; + } + + outrel.r_offset += (input_section->output_section->vma + + input_section->output_offset); + + if (skip) + { + memset (&outrel, 0, sizeof outrel); + relocate = false; + } + /* h->dynindx may be -1 if this symbol was marked to + become local. */ + else if (h != NULL + && ((! info->symbolic && h->dynindx != -1) + || (h->elf_link_hash_flags + & ELF_LINK_HASH_DEF_REGULAR) == 0)) + { + BFD_ASSERT (h->dynindx != -1); + relocate = false; + outrel.r_info = ELF64_R_INFO (h->dynindx, r_type); + outrel.r_addend = relocation + rela->r_addend; + } + else + { + if (r_type == R_X86_64_64) + { + relocate = true; + outrel.r_info = ELF64_R_INFO (0, R_X86_64_RELATIVE); + outrel.r_addend = relocation + rela->r_addend; + } + else + { + long indx; + + if (h == NULL) + sec = local_sections[r_symndx]; + else + { + BFD_ASSERT (h->root.type == bfd_link_hash_defined + || (h->root.type + == bfd_link_hash_defweak)); + sec = h->root.u.def.section; + } + if (sec != NULL && bfd_is_abs_section (sec)) + indx = 0; + else if (sec == NULL || sec->owner == NULL) + { + bfd_set_error (bfd_error_bad_value); + return false; + } + else + { + asection *osec; + + osec = sec->output_section; + indx = elf_section_data (osec)->dynindx; + BFD_ASSERT (indx > 0); + } + + relocate = false; + outrel.r_info = ELF64_R_INFO (indx, r_type); + outrel.r_addend = relocation + rela->r_addend; + } + + } + + bfd_elf64_swap_reloca_out (output_bfd, &outrel, + (((Elf64_External_Rela *) + sreloc->contents) + + sreloc->reloc_count)); + ++sreloc->reloc_count; + + /* If this reloc is against an external symbol, we do + not want to fiddle with the addend. Otherwise, we + need to include the symbol value so that it becomes + an addend for the dynamic reloc. */ + if (! relocate) + continue; + } + + break; + + default: + break; + } + + r = _bfd_final_link_relocate (howto, input_bfd, input_section, + contents, rela->r_offset, + relocation, rela->r_addend); + + if (r != bfd_reloc_ok) + { + switch (r) + { + default: + case bfd_reloc_outofrange: + abort (); + case bfd_reloc_overflow: + { + const char *name; + + if (h != NULL) + name = h->root.root.string; + else + { + name = bfd_elf_string_from_elf_section (input_bfd, + symtab_hdr->sh_link, + sym->st_name); + if (name == NULL) + return false; + if (*name == '\0') + name = bfd_section_name (input_bfd, sec); + } + if (! ((*info->callbacks->reloc_overflow) + (info, name, howto->name, (bfd_vma) 0, + input_bfd, input_section, rela->r_offset))) + return false; + } + break; + } + } + } + + return true; +} + +/* Finish up dynamic symbol handling. We set the contents of various + dynamic sections here. */ + +static boolean +elf64_x86_64_finish_dynamic_symbol (output_bfd, info, h, sym) + bfd *output_bfd; + struct bfd_link_info *info; + struct elf_link_hash_entry *h; + Elf_Internal_Sym *sym; +{ + bfd *dynobj; + + dynobj = elf_hash_table (info)->dynobj; + + if (h->plt.offset != (bfd_vma) -1) + { + asection *splt; + asection *sgot; + asection *srela; + bfd_vma plt_index; + bfd_vma got_offset; + Elf_Internal_Rela rela; + + /* This symbol has an entry in the procedure linkage table. Set + it up. */ + + BFD_ASSERT (h->dynindx != -1); + + splt = bfd_get_section_by_name (dynobj, ".plt"); + sgot = bfd_get_section_by_name (dynobj, ".got.plt"); + srela = bfd_get_section_by_name (dynobj, ".rela.plt"); + BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL); + + /* Get the index in the procedure linkage table which + corresponds to this symbol. This is the index of this symbol + in all the symbols for which we are making plt entries. The + first entry in the procedure linkage table is reserved. */ + plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1; + + /* Get the offset into the .got table of the entry that + corresponds to this function. Each .got entry is GOT_ENTRY_SIZE + bytes. The first three are reserved for the dynamic linker. */ + got_offset = (plt_index + 3) * GOT_ENTRY_SIZE; + + /* Fill in the entry in the procedure linkage table. */ + memcpy (splt->contents + h->plt.offset, elf64_x86_64_plt_entry, + PLT_ENTRY_SIZE); + + /* Insert the relocation positions of the plt section. The magic + numbers at the end of the statements are the positions of the + relocations in the plt section. */ + /* Put offset for jmp *name@GOTPCREL(%rip), since the + instruction uses 6 bytes, subtract this value. */ + bfd_put_32 (output_bfd, + (sgot->output_section->vma + + sgot->output_offset + + got_offset + - splt->output_section->vma + - splt->output_offset + - h->plt.offset + - 6), + splt->contents + h->plt.offset + 2); + /* Put relocation index. */ + bfd_put_32 (output_bfd, plt_index, + splt->contents + h->plt.offset + 7); + /* Put offset for jmp .PLT0. */ + bfd_put_32 (output_bfd, - (h->plt.offset + PLT_ENTRY_SIZE), + splt->contents + h->plt.offset + 12); + + /* Fill in the entry in the global offset table, initially this + points to the pushq instruction in the PLT which is at offset 6. */ + bfd_put_64 (output_bfd, (splt->output_section->vma + splt->output_offset + + h->plt.offset + 6), + sgot->contents + got_offset); + + /* Fill in the entry in the .rela.plt section. */ + rela.r_offset = (sgot->output_section->vma + + sgot->output_offset + + got_offset); + rela.r_info = ELF64_R_INFO (h->dynindx, R_X86_64_JUMP_SLOT); + rela.r_addend = 0; + bfd_elf64_swap_reloca_out (output_bfd, &rela, + ((Elf64_External_Rela *) srela->contents + + plt_index)); + + if ((h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR) == 0) + { + /* Mark the symbol as undefined, rather than as defined in + the .plt section. Leave the value alone. */ + sym->st_shndx = SHN_UNDEF; + /* If the symbol is weak, we do need to clear the value. + Otherwise, the PLT entry would provide a definition for + the symbol even if the symbol wasn't defined anywhere, + and so the symbol would never be NULL. */ + if ((h->elf_link_hash_flags & ELF_LINK_HASH_REF_REGULAR_NONWEAK) + == 0) + sym->st_value = 0; + } + } + + if (h->got.offset != (bfd_vma) -1) + { + asection *sgot; + asection *srela; + Elf_Internal_Rela rela; + + /* This symbol has an entry in the global offset table. Set it + up. */ + + sgot = bfd_get_section_by_name (dynobj, ".got"); + srela = bfd_get_section_by_name (dynobj, ".rela.got"); + BFD_ASSERT (sgot != NULL && srela != NULL); + + rela.r_offset = (sgot->output_section->vma + + sgot->output_offset + + (h->got.offset &~ 1)); + + /* If this is a static link, or it is a -Bsymbolic link and the + symbol is defined locally or was forced to be local because + of a version file, we just want to emit a RELATIVE reloc. + The entry in the global offset table will already have been + initialized in the relocate_section function. */ + if (! elf_hash_table (info)->dynamic_sections_created + || (info->shared + && (info->symbolic || h->dynindx == -1) + && (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR))) + { + BFD_ASSERT((h->got.offset & 1) != 0); + rela.r_info = ELF64_R_INFO (0, R_X86_64_RELATIVE); + rela.r_addend = (h->root.u.def.value + + h->root.u.def.section->output_section->vma + + h->root.u.def.section->output_offset); + } + else + { + BFD_ASSERT((h->got.offset & 1) == 0); + bfd_put_64 (output_bfd, (bfd_vma) 0, sgot->contents + h->got.offset); + rela.r_info = ELF64_R_INFO (h->dynindx, R_X86_64_GLOB_DAT); + rela.r_addend = 0; + } + + bfd_elf64_swap_reloca_out (output_bfd, &rela, + ((Elf64_External_Rela *) srela->contents + + srela->reloc_count)); + ++srela->reloc_count; + } + + if ((h->elf_link_hash_flags & ELF_LINK_HASH_NEEDS_COPY) != 0) + { + asection *s; + Elf_Internal_Rela rela; + + /* This symbol needs a copy reloc. Set it up. */ + + BFD_ASSERT (h->dynindx != -1 + && (h->root.type == bfd_link_hash_defined + || h->root.type == bfd_link_hash_defweak)); + + s = bfd_get_section_by_name (h->root.u.def.section->owner, + ".rela.bss"); + BFD_ASSERT (s != NULL); + + rela.r_offset = (h->root.u.def.value + + h->root.u.def.section->output_section->vma + + h->root.u.def.section->output_offset); + rela.r_info = ELF64_R_INFO (h->dynindx, R_X86_64_COPY); + rela.r_addend = 0; + bfd_elf64_swap_reloca_out (output_bfd, &rela, + ((Elf64_External_Rela *) s->contents + + s->reloc_count)); + ++s->reloc_count; + } + + /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */ + if (strcmp (h->root.root.string, "_DYNAMIC") == 0 + || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + sym->st_shndx = SHN_ABS; + + return true; +} + +/* Finish up the dynamic sections. */ + +static boolean +elf64_x86_64_finish_dynamic_sections (output_bfd, info) + bfd *output_bfd; + struct bfd_link_info *info; +{ + bfd *dynobj; + asection *sdyn; + asection *sgot; + + dynobj = elf_hash_table (info)->dynobj; + + sgot = bfd_get_section_by_name (dynobj, ".got.plt"); + BFD_ASSERT (sgot != NULL); + sdyn = bfd_get_section_by_name (dynobj, ".dynamic"); + + if (elf_hash_table (info)->dynamic_sections_created) + { + asection *splt; + Elf64_External_Dyn *dyncon, *dynconend; + + BFD_ASSERT (sdyn != NULL); + + dyncon = (Elf64_External_Dyn *) sdyn->contents; + dynconend = (Elf64_External_Dyn *) (sdyn->contents + sdyn->_raw_size); + for (; dyncon < dynconend; dyncon++) + { + Elf_Internal_Dyn dyn; + const char *name; + asection *s; + + bfd_elf64_swap_dyn_in (dynobj, dyncon, &dyn); + + switch (dyn.d_tag) + { + default: + continue; + + case DT_PLTGOT: + name = ".got"; + goto get_vma; + + case DT_JMPREL: + name = ".rela.plt"; + + get_vma: + s = bfd_get_section_by_name (output_bfd, name); + BFD_ASSERT (s != NULL); + dyn.d_un.d_ptr = s->vma; + break; + + case DT_RELASZ: + /* FIXME: This comment and code is from elf64-alpha.c: */ + /* My interpretation of the TIS v1.1 ELF document indicates + that RELASZ should not include JMPREL. This is not what + the rest of the BFD does. It is, however, what the + glibc ld.so wants. Do this fixup here until we found + out who is right. */ + s = bfd_get_section_by_name (output_bfd, ".rela.plt"); + if (s) + { + /* Subtract JMPREL size from RELASZ. */ + dyn.d_un.d_val -= + (s->_cooked_size ? s->_cooked_size : s->_raw_size); + } + break; + + case DT_PLTRELSZ: + s = bfd_get_section_by_name (output_bfd, ".rela.plt"); + BFD_ASSERT (s != NULL); + dyn.d_un.d_val = + (s->_cooked_size != 0 ? s->_cooked_size : s->_raw_size); + break; + } + bfd_elf64_swap_dyn_out (output_bfd, &dyn, dyncon); + } + + /* Initialize the contents of the .plt section. */ + splt = bfd_get_section_by_name (dynobj, ".plt"); + BFD_ASSERT (splt != NULL); + if (splt->_raw_size > 0) + { + /* Fill in the first entry in the procedure linkage table. */ + memcpy (splt->contents, elf64_x86_64_plt0_entry, PLT_ENTRY_SIZE); + /* Add offset for pushq GOT+8(%rip), since the instruction + uses 6 bytes subtract this value. */ + bfd_put_32 (output_bfd, + (sgot->output_section->vma + + sgot->output_offset + + 8 + - splt->output_section->vma + - splt->output_offset + - 6), + splt->contents + 2); + /* Add offset for jmp *GOT+16(%rip). The 12 is the offset to + the end of the instruction. */ + bfd_put_32 (output_bfd, + (sgot->output_section->vma + + sgot->output_offset + + 16 + - splt->output_section->vma + - splt->output_offset + - 12), + splt->contents + 8); + + } + + elf_section_data (splt->output_section)->this_hdr.sh_entsize = + PLT_ENTRY_SIZE; + } + + /* Set the first entry in the global offset table to the address of + the dynamic section. */ + if (sgot->_raw_size > 0) + { + if (sdyn == NULL) + bfd_put_64 (output_bfd, (bfd_vma) 0, sgot->contents); + else + bfd_put_64 (output_bfd, + sdyn->output_section->vma + sdyn->output_offset, + sgot->contents); + /* Write GOT[1] and GOT[2], needed for the dynamic linker. */ + bfd_put_64 (output_bfd, (bfd_vma) 0, sgot->contents + GOT_ENTRY_SIZE); + bfd_put_64 (output_bfd, (bfd_vma) 0, sgot->contents + GOT_ENTRY_SIZE*2); + } + + elf_section_data (sgot->output_section)->this_hdr.sh_entsize = + GOT_ENTRY_SIZE; + + return true; +} + + +#define TARGET_LITTLE_SYM bfd_elf64_x86_64_vec +#define TARGET_LITTLE_NAME "elf64-x86-64" +#define ELF_ARCH bfd_arch_i386 +#define ELF_MACHINE_CODE EM_X86_64 +#define ELF_MAXPAGESIZE 0x100000 + +#define elf_backend_can_gc_sections 1 +#define elf_backend_want_got_plt 1 +#define elf_backend_plt_readonly 1 +#define elf_backend_want_plt_sym 0 +#define elf_backend_got_header_size (GOT_ENTRY_SIZE*3) +#define elf_backend_plt_header_size PLT_ENTRY_SIZE + +#define elf_info_to_howto elf64_x86_64_info_to_howto + +#define bfd_elf64_bfd_final_link _bfd_elf64_gc_common_final_link +#define bfd_elf64_bfd_link_hash_table_create \ + elf64_x86_64_link_hash_table_create +#define bfd_elf64_bfd_reloc_type_lookup elf64_x86_64_reloc_type_lookup + +#define elf_backend_adjust_dynamic_symbol elf64_x86_64_adjust_dynamic_symbol +#define elf_backend_check_relocs elf64_x86_64_check_relocs +#define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections +#define elf_backend_finish_dynamic_sections \ + elf64_x86_64_finish_dynamic_sections +#define elf_backend_finish_dynamic_symbol elf64_x86_64_finish_dynamic_symbol +#define elf_backend_gc_mark_hook elf64_x86_64_gc_mark_hook +#define elf_backend_gc_sweep_hook elf64_x86_64_gc_sweep_hook +#define elf_backend_relocate_section elf64_x86_64_relocate_section +#define elf_backend_size_dynamic_sections elf64_x86_64_size_dynamic_sections +#define elf_backend_object_p elf64_x86_64_elf_object_p + +#include "elf64-target.h" diff --git a/contrib/binutils/bfd/elfxx-ia64.c b/contrib/binutils/bfd/elfxx-ia64.c index c86f7a9eed2d..ee69168805d0 100644 --- a/contrib/binutils/bfd/elfxx-ia64.c +++ b/contrib/binutils/bfd/elfxx-ia64.c @@ -1437,7 +1437,7 @@ elfNN_ia64_hash_table_create (abfd) { struct elfNN_ia64_link_hash_table *ret; - ret = bfd_alloc (abfd, sizeof (*ret)); + ret = bfd_zalloc (abfd, sizeof (*ret)); if (!ret) return 0; if (!_bfd_elf_link_hash_table_init (&ret->root, abfd, diff --git a/contrib/binutils/bfd/peXXigen.c b/contrib/binutils/bfd/peXXigen.c index 0e1eaeac5361..a3141ba587a9 100644 --- a/contrib/binutils/bfd/peXXigen.c +++ b/contrib/binutils/bfd/peXXigen.c @@ -1825,7 +1825,10 @@ _bfd_XX_print_private_bfd_data_common (abfd, vfile) #undef PF /* ctime implies '\n'. */ - fprintf (file, "\nTime/Date\t\t%s", ctime (&pe->coff.timestamp)); + { + time_t t = pe->coff.timestamp; + fprintf (file, "\nTime/Date\t\t%s", ctime (&t)); + } fprintf (file, "\nImageBase\t\t"); fprintf_vma (file, i->ImageBase); fprintf (file, "\nSectionAlignment\t"); diff --git a/contrib/binutils/binutils/ChangeLog b/contrib/binutils/binutils/ChangeLog index ecbc29310764..5470118022a7 100644 --- a/contrib/binutils/binutils/ChangeLog +++ b/contrib/binutils/binutils/ChangeLog @@ -1,3 +1,36 @@ +2001-10-17 Nick Clifton <nickc@cambridge.redhat.com> + + * addr2line.1: Remove .TP macro from SYNOPSIS section - it + prevents successful translation to DocBook format. + * nlmconv.1: As above. + * nm.1: As above. + * objdump.1: As above. + * size.1: As above. + * strings.1: As above. + * strip.1: As above. + +2001-10-02 Nick Clifton <nickc@cambridge.redhat.com> + + * readelf.c (display_debug_line, display_debug_pubnames, + display_debug_info, display_debug_frames): Detect and warn + about 64-bit format entries. + (display_debug_aranges): Reword 64-bit warning. + (debug_displays): Add .debug_pubtypes as a known, but not yet + supported, debug section. + +2001-10-01 Nick Clifton <nickc@cambridge.redhat.com> + + * readelf.c (display_debug_aranges): Warn about DWARF64 format + .debug_arange sections. + +2001-08-05 Philip Blundell <philb@gnu.org> + + * binutils.texi (objdump): Fix typos. Use "Thumb" not "THUMB". + +2001-07-31 David O'Brien <obrien@FreeBSD.org> + + * readelf.1: New file. + 2001-06-29 James Cownie <jcownie@etnus.com> * readelf.c: Support DWARF 2.1 attributes. diff --git a/contrib/binutils/binutils/Makefile.am b/contrib/binutils/binutils/Makefile.am index d0adea0623c4..823c68b5055a 100644 --- a/contrib/binutils/binutils/Makefile.am +++ b/contrib/binutils/binutils/Makefile.am @@ -52,8 +52,8 @@ DLLWRAP_PROG=dllwrap SRCONV_PROG=srconv$(EXEEXT) sysdump$(EXEEXT) coffdump$(EXEEXT) -man_MANS = ar.1 nm.1 objdump.1 ranlib.1 size.1 strings.1 strip.1 objcopy.1 \ - addr2line.1 nlmconv.1 $(DEMANGLER_NAME).1 +man_MANS = ar.1 nm.1 objdump.1 ranlib.1 readelf.1 size.1 strings.1 strip.1 \ + objcopy.1 addr2line.1 nlmconv.1 $(DEMANGLER_NAME).1 PROGS = $(SIZE_PROG) $(OBJDUMP_PROG) $(NM_PROG) $(AR_PROG) $(STRINGS_PROG) $(STRIP_PROG) $(RANLIB_PROG) $(DEMANGLER_PROG) $(OBJCOPY_PROG) @BUILD_NLMCONV@ @BUILD_SRCONV@ @BUILD_DLLTOOL@ @BUILD_WINDRES@ $(ADDR2LINE_PROG) $(READELF_PROG) @BUILD_DLLWRAP@ @BUILD_MISC@ diff --git a/contrib/binutils/binutils/Makefile.in b/contrib/binutils/binutils/Makefile.in index c6dd977fb529..a1c4175fdc3b 100644 --- a/contrib/binutils/binutils/Makefile.in +++ b/contrib/binutils/binutils/Makefile.in @@ -161,8 +161,8 @@ DLLWRAP_PROG = dllwrap SRCONV_PROG = srconv$(EXEEXT) sysdump$(EXEEXT) coffdump$(EXEEXT) -man_MANS = ar.1 nm.1 objdump.1 ranlib.1 size.1 strings.1 strip.1 objcopy.1 \ - addr2line.1 nlmconv.1 $(DEMANGLER_NAME).1 +man_MANS = ar.1 nm.1 objdump.1 ranlib.1 readelf.1 size.1 strings.1 strip.1 \ + objcopy.1 addr2line.1 nlmconv.1 $(DEMANGLER_NAME).1 PROGS = $(SIZE_PROG) $(OBJDUMP_PROG) $(NM_PROG) $(AR_PROG) $(STRINGS_PROG) $(STRIP_PROG) $(RANLIB_PROG) $(DEMANGLER_PROG) $(OBJCOPY_PROG) @BUILD_NLMCONV@ @BUILD_SRCONV@ @BUILD_DLLTOOL@ @BUILD_WINDRES@ $(ADDR2LINE_PROG) $(READELF_PROG) @BUILD_DLLWRAP@ @BUILD_MISC@ diff --git a/contrib/binutils/binutils/addr2line.1 b/contrib/binutils/binutils/addr2line.1 index f8dde89be594..4294a502ecae 100644 --- a/contrib/binutils/binutils/addr2line.1 +++ b/contrib/binutils/binutils/addr2line.1 @@ -13,7 +13,6 @@ addr2line \- convert addresses into file names and line numbers .SH SYNOPSIS .hy 0 .na -.TP .B addr2line .RB "[\|" "\-b\ "\c .I bfdname\c diff --git a/contrib/binutils/binutils/binutils.texi b/contrib/binutils/binutils/binutils.texi index 9fc11bc313ad..74e7cda41ee1 100644 --- a/contrib/binutils/binutils/binutils.texi +++ b/contrib/binutils/binutils/binutils.texi @@ -1446,11 +1446,11 @@ just use @samp{r} followed by the register number. There are also two variants on the APCS register naming scheme enabled by @samp{-M reg-names-atpcs} and @samp{-M reg-names-special-atpcs} which -use the ARM/Thumb Procedure Call Standard naming conventions. (Eiuther -with the normal register name sor the special register names). +use the ARM/Thumb Procedure Call Standard naming conventions. (Either +with the normal register names or the special register names). This option can also be used for ARM architectures to force the -disassembler to interpret all instructions as THUMB instructions by +disassembler to interpret all instructions as Thumb instructions by using the switch @samp{--disassembler-options=force-thumb}. This can be useful when attempting to disassemble thumb code produced by other compilers. @@ -2440,7 +2440,7 @@ Specifies the type of machine for which the library file should be built. @code{dlltool} has a built in default type, depending upon how it was created, but this option can be used to override that. This is normally only useful when creating DLLs for an ARM processor, when the -contents of the DLL are actually encode using THUMB instructions. +contents of the DLL are actually encode using Thumb instructions. @item -a @itemx --add-indirect @@ -2483,7 +2483,7 @@ with certain operating systems. @itemx --interwork Specifies that @code{dlltool} should mark the objects in the library file and exports file that it produces as supporting interworking -between ARM and THUMB code. +between ARM and Thumb code. @item -n @itemx --nodelete diff --git a/contrib/binutils/binutils/nm.1 b/contrib/binutils/binutils/nm.1 index dbb116c7b610..d6f4eba7e52b 100644 --- a/contrib/binutils/binutils/nm.1 +++ b/contrib/binutils/binutils/nm.1 @@ -13,7 +13,6 @@ nm \- list symbols from object files. .SH SYNOPSIS .hy 0 .na -.TP .B nm .RB "[\|" \-a | \-\-debug\-syms "\|]" .RB "[\|" \-g | \-\-extern\-only "\|]" diff --git a/contrib/binutils/binutils/objdump.1 b/contrib/binutils/binutils/objdump.1 index 1c2fa612a299..591a0f44bbde 100644 --- a/contrib/binutils/binutils/objdump.1 +++ b/contrib/binutils/binutils/objdump.1 @@ -13,7 +13,6 @@ objdump \- display information from object files. .SH SYNOPSIS .hy 0 .na -.TP .B objdump .RB "[\|" \-a | \-\-archive\-headers "\|]" .RB "[\|" "\-b\ "\c diff --git a/contrib/binutils/binutils/readelf.c b/contrib/binutils/binutils/readelf.c index 1ce0eb76ef61..7befc88028d8 100644 --- a/contrib/binutils/binutils/readelf.c +++ b/contrib/binutils/binutils/readelf.c @@ -5490,6 +5490,13 @@ display_debug_lines (section, start, file) /* Check the length of the block. */ info.li_length = BYTE_GET (external->li_length); + + if (info.li_length == 0xffffffff) + { + warn (_("64-bit DWARF line info is not supported yet.\n")); + break; + } + if (info.li_length + sizeof (external->li_length) > section->sh_size) { warn @@ -5718,6 +5725,12 @@ display_debug_pubnames (section, start, file) data = start + sizeof (* external); start += pubnames.pn_length + sizeof (external->pn_length); + if (pubnames.pn_length == 0xffffffff) + { + warn (_("64-bit DWARF pubnames are not supported yet.\n")); + break; + } + if (pubnames.pn_version != 2) { static int warned = 0; @@ -6818,6 +6831,12 @@ display_debug_info (section, start, file) compunit.cu_abbrev_offset = BYTE_GET (external->cu_abbrev_offset); compunit.cu_pointer_size = BYTE_GET (external->cu_pointer_size); + if (compunit.cu_length == 0xffffffff) + { + warn (_("64-bit DWARF debug info is not supported yet.\n")); + break; + } + tags = start + sizeof (* external); cu_offset = start - section_begin; start += compunit.cu_length + sizeof (external->cu_length); @@ -6945,6 +6964,12 @@ display_debug_aranges (section, start, file) arange.ar_pointer_size = BYTE_GET (external->ar_pointer_size); arange.ar_segment_size = BYTE_GET (external->ar_segment_size); + if (arange.ar_length == 0xffffffff) + { + warn (_("64-bit DWARF aranges are not supported yet.\n")); + break; + } + if (arange.ar_version != 2) { warn (_("Only DWARF 2 aranges are currently supported.\n")); @@ -7156,6 +7181,12 @@ display_debug_frames (section, start, file) if (length == 0) return 1; + if (length == 0xffffffff) + { + warn (_("64-bit DWARF format frames are not supported yet.\n")); + break; + } + block_end = saved_start + length + 4; cie_id = byte_get (start, 4); start += 4; @@ -7264,7 +7295,7 @@ display_debug_frames (section, start, file) look_for = is_eh ? start - 4 - cie_id : section_start + cie_id; - for (cie=chunks; cie ; cie = cie->next) + for (cie = chunks; cie ; cie = cie->next) if (cie->chunk_start == look_for) break; @@ -7706,6 +7737,7 @@ debug_displays[] = { ".debug_frame", display_debug_frames, NULL }, { ".eh_frame", display_debug_frames, NULL }, { ".debug_macinfo", display_debug_not_supported, NULL }, + { ".debug_pubtypes", display_debug_not_supported, NULL }, { ".debug_str", display_debug_not_supported, NULL }, { ".debug_static_func", display_debug_not_supported, NULL }, { ".debug_static_vars", display_debug_not_supported, NULL }, diff --git a/contrib/binutils/binutils/size.1 b/contrib/binutils/binutils/size.1 index 1d182aecdfcd..7f8f9ef4e63b 100644 --- a/contrib/binutils/binutils/size.1 +++ b/contrib/binutils/binutils/size.1 @@ -13,7 +13,6 @@ size \- list section sizes and total size. .SH SYNOPSIS .hy 0 .na -.TP .B size .RB "[\|" \-A \||\| \-B \||\| \c .BI "\-\-format=" compatibility\c diff --git a/contrib/binutils/binutils/strings.1 b/contrib/binutils/binutils/strings.1 index 4233630cde7e..6cbf041a4cd1 100644 --- a/contrib/binutils/binutils/strings.1 +++ b/contrib/binutils/binutils/strings.1 @@ -13,7 +13,6 @@ strings \- print the strings of printable characters in files .SH SYNOPSIS .hy 0 .na -.TP .B strings .RB "[\|" \-a | \-\c .RB | \-\-all "\|]" diff --git a/contrib/binutils/binutils/strip.1 b/contrib/binutils/binutils/strip.1 index 5bd6dfbaebb1..83c3fe603056 100644 --- a/contrib/binutils/binutils/strip.1 +++ b/contrib/binutils/binutils/strip.1 @@ -13,7 +13,6 @@ strip \- Discard symbols from object files. .SH SYNOPSIS .hy 0 .na -.TP .B strip .RB "[\|" \-F\ \fIbfdname\fR\ |\ \fB\-\-target=\fIbfdname\fP "\|]" .RB "[\|" \-I\ \fIbfdname\fR\ |\ \fB\-\-input\-target=\fIbfdname\fP "\|]" diff --git a/contrib/binutils/config/mh-ia64pic b/contrib/binutils/config/mh-ia64pic new file mode 100644 index 000000000000..92e48d90fbdf --- /dev/null +++ b/contrib/binutils/config/mh-ia64pic @@ -0,0 +1 @@ +PICFLAG=-fpic diff --git a/contrib/binutils/config/mt-ia64pic b/contrib/binutils/config/mt-ia64pic new file mode 100644 index 000000000000..ff9872755757 --- /dev/null +++ b/contrib/binutils/config/mt-ia64pic @@ -0,0 +1 @@ +PICFLAG_FOR_TARGET=-fpic diff --git a/contrib/binutils/configure b/contrib/binutils/configure index af895c1b8a09..57e22d8c11d3 100755 --- a/contrib/binutils/configure +++ b/contrib/binutils/configure @@ -3,7 +3,7 @@ ### WARNING: this file contains embedded tabs. Do not run untabify on this file. # Configuration script -# Copyright (C) 1988, 90, 91, 92, 93, 94, 95, 96, 97, 98, 1999, 2000, 2001 +# Copyright (C) 1988, 90, 91, 92, 93, 94, 95, 96, 97, 98, 1999 # Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify @@ -804,57 +804,46 @@ fi # If CC and CXX are not set in the environment, and the Makefile # exists, try to extract them from it. This is to handle running -# ./config.status by hand. Do the same for various Makefile fragments -# so that they can specify these vars. -for file in Mafefile ${package_makefile_rules_frag} \ - ${site:+config/ms-${site}} ${host_makefile_frag} \ - ${target_makefile_frag} ${package_makefile_frag} -do - if ! test -r $file; then - file=${srcdir}/${file} - if ! test -r $file; then continue; fi - fi - - if [ -z "${CC}" ]; then - sed -n -e ':loop +# ./config.status by hand. +if [ -z "${CC}" ] && [ -r Makefile ]; then + sed -n -e ':loop /\\$/ N s/\\\n//g t loop -/^CC[ ]*=/ s/CC[ ]*=[ ]*\(.*\)/\1/p' < $file > Makefile.cc - CC=`tail -1 Makefile.cc` - rm -f Makefile.cc - fi +/^CC[ ]*=/ s/CC[ ]*=[ ]*\(.*\)/\1/p' < Makefile > Makefile.cc + CC=`tail -1 Makefile.cc` + rm -f Makefile.cc +fi - if [ -z "${CFLAGS}" ]; then - sed -n -e ':loop +if [ -z "${CFLAGS}" ] && [ -r Makefile ]; then + sed -n -e ':loop /\\$/ N s/\\\n//g t loop -/^CFLAGS[ ]*=/ s/CFLAGS[ ]*=[ ]*\(.*\)/\1/p' < $file > Makefile.cc - CFLAGS=`tail -1 Makefile.cc` - rm -f Makefile.cc - fi +/^CFLAGS[ ]*=/ s/CFLAGS[ ]*=[ ]*\(.*\)/\1/p' < Makefile > Makefile.cc + CFLAGS=`tail -1 Makefile.cc` + rm -f Makefile.cc +fi - if [ -z "${CXX}" ]; then - sed -n -e ':loop +if [ -z "${CXX}" ] && [ -r Makefile ]; then + sed -n -e ':loop /\\$/ N s/\\\n//g t loop -/^CXX[ ]*=/ s/CXX[ ]*=[ ]*\(.*\)/\1/p' < $file > Makefile.cc - CXX=`tail -1 Makefile.cc` - rm -f Makefile.cc - fi +/^CXX[ ]*=/ s/CXX[ ]*=[ ]*\(.*\)/\1/p' < Makefile > Makefile.cc + CXX=`tail -1 Makefile.cc` + rm -f Makefile.cc +fi - if [ -z "${CXXFLAGS}" ]; then - sed -n -e ':loop +if [ -z "${CXXFLAGS}" ] && [ -r Makefile ]; then + sed -n -e ':loop /\\$/ N s/\\\n//g t loop -/^CXXFLAGS[ ]*=/ s/CXXFLAGS[ ]*=[ ]*\(.*\)/\1/p' < $file > Makefile.cc - CXXFLAGS=`tail -1 Makefile.cc` - rm -f Makefile.cc - fi -done +/^CXXFLAGS[ ]*=/ s/CXXFLAGS[ ]*=[ ]*\(.*\)/\1/p' < Makefile > Makefile.cc + CXXFLAGS=`tail -1 Makefile.cc` + rm -f Makefile.cc +fi # Generate a default definition for YACC. This is used if the makefile can't # locate bison or byacc in objdir. diff --git a/contrib/binutils/configure.in b/contrib/binutils/configure.in index ee62e228d20c..1284aa6533cf 100644 --- a/contrib/binutils/configure.in +++ b/contrib/binutils/configure.in @@ -127,9 +127,6 @@ appdirs="" # Work in distributions that contain no compiler tools, like Autoconf. if [ -d ${srcdir}/config ]; then case "${host}" in - alpha*-*-freebsd*) - host_makefile_frag="${host_makefile_frag} config/mh-fbsdaxp" - ;; m68k-hp-hpux*) host_makefile_frag="${host_makefile_frag} config/mh-hp300" ;; diff --git a/contrib/binutils/gas/ChangeLog b/contrib/binutils/gas/ChangeLog index e33b133a8681..03a82109ca1a 100644 --- a/contrib/binutils/gas/ChangeLog +++ b/contrib/binutils/gas/ChangeLog @@ -1,3 +1,48 @@ +2001-10-16 Alan Modra <amodra@bigpond.net.au> + + From Andrew Pines <apines@cosmodog.com> + * config/tc-m68k.c (m68k_ip): Correct absolute jmp opcodes. + +2001-10-05 Alan Modra <amodra@bigpond.net.au> + + * config/tc-i386.c (parse_register): If not producing code for + x86_64, reject x86_64 register name matches. + (md_assemble): Remove now redundant check for x86_64 regs. + +2001-09-30 Stephane Carrez <Stephane.Carrez@worldnet.fr> + + * config/tc-m68hc11.c (cmp_opcode): Define prototype. + (print_opcode_format, skip_whites): Likewise. + (convert_branch, m68hc11_new_insn): Likewise. + (build_dbranch_insn, build_indexed_byte): Likewise. + (build_reg_mode, find, find_opcode): Likewise. + (print_insn_format): Fix call to print_opcode_format. + (md_assemble): Fix call to build_dbranch_insn. + +2001-09-19 Andreas Schwab <schwab@suse.de> + + * config/tc-m68k.c: Include "dwarf2dbg.h". + +2001-08-29 Joel Sherrill <joel@OARcorp.com> + + * configure.in (i[3456]86-*-rtems*, m68*-*-rtems*): Change + default from coff to elf. + * configure: Regenerate. + +2001-08-28 Philip Blundell <philb@gnu.org> + + * configure.in (sh-*-coff*, sh-*-rtems*): Set bfd_gas to yes. + Patch from Joel Sherril <joel.sherrill@OARcorp.com> + * configure: Regenerate. + +2001-07-21 Andreas Schwab <schwab@suse.de> + + * config/tc-m68k.c (md_pseudo_table) [OBJ_ELF]: Add .file and + .loc. + (md_assemble) [OBJ_ELF]: Call dwarf2_emit_insn before emitting + insn. + * config/tc-m68k.h (DWARF2_LINE_MIN_INSN_LENGTH): Define. + 2001-07-14 matthew green <mrg@eterna.com.au> * configure.in (i386-*-netbsdelf*): New target. diff --git a/contrib/binutils/gas/cgen.c b/contrib/binutils/gas/cgen.c index e15e1b65346b..759b38200822 100644 --- a/contrib/binutils/gas/cgen.c +++ b/contrib/binutils/gas/cgen.c @@ -1,5 +1,6 @@ /* GAS interface for targets using CGEN: Cpu tools GENerator. - Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. + Copyright 1996, 1997, 1998, 1999, 2000, 2001 + Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -15,7 +16,7 @@ GNU General Public License for more details. You should have received a copy of the GNU General Public License along with GAS; see the file COPYING. If not, write to the Free Software -Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include <setjmp.h> #include "ansidecl.h" @@ -26,6 +27,7 @@ Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "as.h" #include "subsegs.h" #include "cgen.h" +#include "dwarf2dbg.h" /* Opcode table descriptor, must be set by md_begin. */ @@ -37,13 +39,13 @@ CGEN_CPU_DESC gas_cgen_cpu_desc; void cgen_asm_record_register (name, number) - char * name; + char *name; int number; { /* Use symbol_create here instead of symbol_new so we don't try to output registers into the object file's symbol table. */ symbol_table_insert (symbol_create (name, reg_section, - number, & zero_address_frag)); + number, &zero_address_frag)); } /* We need to keep a list of fixups. We can't simply generate them as @@ -57,14 +59,13 @@ cgen_asm_record_register (name, number) OPINDEX is the index in the operand table. OPINFO is something the caller chooses to help in reloc determination. */ -struct fixup -{ +struct fixup { int opindex; int opinfo; expressionS exp; }; -static struct fixup fixups [GAS_CGEN_MAX_FIXUPS]; +static struct fixup fixups[GAS_CGEN_MAX_FIXUPS]; static int num_fixups; /* Prepare to parse an instruction. @@ -81,12 +82,13 @@ gas_cgen_init_parse () static void queue_fixup (opindex, opinfo, expP) int opindex; + int opinfo; expressionS * expP; { /* We need to generate a fixup for this expression. */ if (num_fixups >= GAS_CGEN_MAX_FIXUPS) as_fatal (_("too many fixups")); - fixups[num_fixups].exp = * expP; + fixups[num_fixups].exp = *expP; fixups[num_fixups].opindex = opindex; fixups[num_fixups].opinfo = opinfo; ++ num_fixups; @@ -99,14 +101,14 @@ queue_fixup (opindex, opinfo, expP) /* ??? I think with cgen_asm_finish_insn (or something else) there is no more need for this. */ -static struct fixup saved_fixups [GAS_CGEN_MAX_FIXUPS]; +static struct fixup saved_fixups[GAS_CGEN_MAX_FIXUPS]; static int saved_num_fixups; void gas_cgen_save_fixups () { saved_num_fixups = num_fixups; - + memcpy (saved_fixups, fixups, sizeof (fixups[0]) * num_fixups); num_fixups = 0; @@ -116,7 +118,7 @@ void gas_cgen_restore_fixups () { num_fixups = saved_num_fixups; - + memcpy (fixups, saved_fixups, sizeof (fixups[0]) * num_fixups); saved_num_fixups = 0; @@ -141,7 +143,7 @@ gas_cgen_swap_fixups () tmp = saved_num_fixups; saved_num_fixups = num_fixups; num_fixups = tmp; - + for (tmp = GAS_CGEN_MAX_FIXUPS; tmp--;) { tmp_fixup = saved_fixups [tmp]; @@ -175,7 +177,7 @@ gas_cgen_record_fixup (frag, where, insn, length, operand, opinfo, symbol, offse symbolS * symbol; offsetT offset; { - fixS * fixP; + fixS *fixP; /* It may seem strange to use operand->attrs and not insn->attrs here, but it is the operand that has a pc relative relocation. */ @@ -214,7 +216,7 @@ gas_cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp) int opinfo; expressionS * exp; { - fixS * fixP; + fixS *fixP; /* It may seem strange to use operand->attrs and not insn->attrs here, but it is the operand that has a pc relative relocation. */ @@ -232,6 +234,7 @@ gas_cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp) /* Used for communication between the next two procedures. */ static jmp_buf expr_jmp_buf; +static int expr_jmp_buf_p; /* Callback for cgen interface. Parse the expression at *STRP. The result is an error message or NULL for success (in which case @@ -246,23 +249,23 @@ static jmp_buf expr_jmp_buf; const char * gas_cgen_parse_operand (cd, want, strP, opindex, opinfo, resultP, valueP) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; enum cgen_parse_operand_type want; - const char ** strP; + const char **strP; int opindex; int opinfo; - enum cgen_parse_operand_result * resultP; - bfd_vma * valueP; + enum cgen_parse_operand_result *resultP; + bfd_vma *valueP; { #ifdef __STDC__ /* These are volatile to survive the setjmp. */ char * volatile hold; enum cgen_parse_operand_result * volatile resultP_1; #else - static char * hold; - static enum cgen_parse_operand_result * resultP_1; + static char *hold; + static enum cgen_parse_operand_result *resultP_1; #endif - const char * errmsg = NULL; + const char *errmsg = NULL; expressionS exp; if (want == CGEN_PARSE_OPERAND_INIT) @@ -273,46 +276,49 @@ gas_cgen_parse_operand (cd, want, strP, opindex, opinfo, resultP, valueP) resultP_1 = resultP; hold = input_line_pointer; - input_line_pointer = (char *) * strP; + input_line_pointer = (char *) *strP; /* We rely on md_operand to longjmp back to us. This is done via gas_cgen_md_operand. */ if (setjmp (expr_jmp_buf) != 0) { + expr_jmp_buf_p = 0; input_line_pointer = (char *) hold; - * resultP_1 = CGEN_PARSE_OPERAND_RESULT_ERROR; + *resultP_1 = CGEN_PARSE_OPERAND_RESULT_ERROR; return "illegal operand"; } - expression (& exp); + expr_jmp_buf_p = 1; + expression (&exp); + expr_jmp_buf_p = 0; - * strP = input_line_pointer; + *strP = input_line_pointer; input_line_pointer = hold; /* FIXME: Need to check `want'. */ switch (exp.X_op) { - case O_illegal : + case O_illegal: errmsg = _("illegal operand"); - * resultP = CGEN_PARSE_OPERAND_RESULT_ERROR; + *resultP = CGEN_PARSE_OPERAND_RESULT_ERROR; break; - case O_absent : + case O_absent: errmsg = _("missing operand"); - * resultP = CGEN_PARSE_OPERAND_RESULT_ERROR; + *resultP = CGEN_PARSE_OPERAND_RESULT_ERROR; break; - case O_constant : - * valueP = exp.X_add_number; - * resultP = CGEN_PARSE_OPERAND_RESULT_NUMBER; + case O_constant: + *valueP = exp.X_add_number; + *resultP = CGEN_PARSE_OPERAND_RESULT_NUMBER; break; - case O_register : - * valueP = exp.X_add_number; - * resultP = CGEN_PARSE_OPERAND_RESULT_REGISTER; + case O_register: + *valueP = exp.X_add_number; + *resultP = CGEN_PARSE_OPERAND_RESULT_REGISTER; break; - default : - queue_fixup (opindex, opinfo, & exp); - * valueP = 0; - * resultP = CGEN_PARSE_OPERAND_RESULT_QUEUED; + default: + queue_fixup (opindex, opinfo, &exp); + *valueP = 0; + *resultP = CGEN_PARSE_OPERAND_RESULT_QUEUED; break; } @@ -326,9 +332,11 @@ gas_cgen_parse_operand (cd, want, strP, opindex, opinfo, resultP, valueP) void gas_cgen_md_operand (expressionP) - expressionS * expressionP; + expressionS *expressionP ATTRIBUTE_UNUSED; { - longjmp (expr_jmp_buf, 1); + /* Don't longjmp if we're not called from within cgen_parse_operand(). */ + if (expr_jmp_buf_p) + longjmp (expr_jmp_buf, 1); } /* Finish assembling instruction INSN. @@ -340,15 +348,15 @@ gas_cgen_md_operand (expressionP) void gas_cgen_finish_insn (insn, buf, length, relax_p, result) - const CGEN_INSN * insn; + const CGEN_INSN *insn; CGEN_INSN_BYTES_PTR buf; unsigned int length; int relax_p; - finished_insnS * result; + finished_insnS *result; { int i; int relax_operand; - char * f; + char *f; unsigned int byte_len = length / 8; /* ??? Target foo issues various warnings here, so one might want to provide @@ -364,7 +372,8 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result) space for the largest insn. */ if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX)) - abort (); /* These currently shouldn't get here. */ + /* These currently shouldn't get here. */ + abort (); /* Is there a relaxable insn with the relaxable operand needing a fixup? */ @@ -374,7 +383,7 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result) /* Scan the fixups for the operand affected by relaxing (i.e. the branch address). */ - for (i = 0; i < num_fixups; ++ i) + for (i = 0; i < num_fixups; ++i) { if (CGEN_OPERAND_ATTR_VALUE (cgen_operand_lookup_by_num (gas_cgen_cpu_desc, fixups[i].opindex), CGEN_OPERAND_RELAX)) @@ -388,7 +397,10 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result) if (relax_operand != -1) { int max_len; - fragS * old_frag; + fragS *old_frag; + expressionS *exp; + symbolS *sym; + offsetT off; #ifdef TC_CGEN_MAX_RELAX max_len = TC_CGEN_MAX_RELAX (insn, byte_len); @@ -405,14 +417,24 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result) /* Create a relaxable fragment for this instruction. */ old_frag = frag_now; + exp = &fixups[relax_operand].exp; + sym = exp->X_add_symbol; + off = exp->X_add_number; + if (exp->X_op != O_constant && exp->X_op != O_symbol) + { + /* Handle complex expressions. */ + sym = make_expr_symbol (exp); + off = 0; + } + frag_var (rs_machine_dependent, max_len - byte_len /* max chars */, 0 /* variable part already allocated */, /* FIXME: When we machine generate the relax table, machine generate a macro to compute subtype. */ 1 /* subtype */, - fixups[relax_operand].exp.X_add_symbol, - fixups[relax_operand].exp.X_add_number, + sym, + off, f); /* Record the operand number with the fragment so md_convert_frag @@ -438,6 +460,9 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result) memcpy (f, buf, byte_len); #endif + /* Emit DWARF2 debugging information. */ + dwarf2_emit_insn (byte_len); + /* Create any fixups. */ for (i = 0; i < num_fixups; ++i) { @@ -457,12 +482,12 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result) #define md_cgen_record_fixup_exp gas_cgen_record_fixup_exp #endif - fixP = md_cgen_record_fixup_exp (frag_now, f - frag_now->fr_literal, - insn, length, operand, - fixups[i].opinfo, - & fixups[i].exp); - if (result) - result->fixups[i] = fixP; + fixP = md_cgen_record_fixup_exp (frag_now, f - frag_now->fr_literal, + insn, length, operand, + fixups[i].opinfo, + &fixups[i].exp); + if (result) + result->fixups[i] = fixP; } if (result) @@ -488,13 +513,13 @@ int gas_cgen_md_apply_fix3 (fixP, valueP, seg) fixS * fixP; valueT * valueP; - segT seg; + segT seg ATTRIBUTE_UNUSED; { - char * where = fixP->fx_frag->fr_literal + fixP->fx_where; + char *where = fixP->fx_frag->fr_literal + fixP->fx_where; valueT value; - /* canonical name, since used a lot */ + /* Canonical name, since used a lot. */ CGEN_CPU_DESC cd = gas_cgen_cpu_desc; - + /* FIXME FIXME FIXME: The value we are passed in *valuep includes the symbol values. Since we are using BFD_ASSEMBLER, if we are doing this relocation the code in write.c is going to call @@ -508,11 +533,11 @@ gas_cgen_md_apply_fix3 (fixP, valueP, seg) if (fixP->fx_addsy == (symbolS *) NULL) { - value = * valueP; + value = *valueP; fixP->fx_done = 1; } else if (fixP->fx_pcrel) - value = * valueP; + value = *valueP; else { value = fixP->fx_offset; @@ -523,7 +548,7 @@ gas_cgen_md_apply_fix3 (fixP, valueP, seg) else { /* We don't actually support subtracting a symbol. */ - as_bad_where (fixP->fx_file, fixP->fx_line, + as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); } } @@ -553,16 +578,16 @@ gas_cgen_md_apply_fix3 (fixP, valueP, seg) CGEN_INSN_INT insn_value = cgen_get_insn_value (cd, where, CGEN_INSN_BITSIZE (insn)); - /* ??? 0 is passed for `pc' */ + /* ??? 0 is passed for `pc'. */ errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields, &insn_value, (bfd_vma) 0); cgen_put_insn_value (cd, where, CGEN_INSN_BITSIZE (insn), insn_value); } #else - /* ??? 0 is passed for `pc' */ - errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields, where, - (bfd_vma) 0); + /* ??? 0 is passed for `pc'. */ + errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields, where, + (bfd_vma) 0); #endif if (errmsg) as_bad_where (fixP->fx_file, fixP->fx_line, "%s", errmsg); @@ -604,7 +629,9 @@ gas_cgen_md_apply_fix3 (fixP, valueP, seg) case BFD_RELOC_32: md_number_to_chars (where, value, 4); break; - /* FIXME: later add support for 64 bits. */ + case BFD_RELOC_64: + md_number_to_chars (where, value, 8); + break; default: as_bad_where (fixP->fx_file, fixP->fx_line, _("internal error: can't install fix for reloc type %d (`%s')"), @@ -631,10 +658,10 @@ gas_cgen_md_apply_fix3 (fixP, valueP, seg) arelent * gas_cgen_tc_gen_reloc (section, fixP) - asection * section; + asection * section ATTRIBUTE_UNUSED; fixS * fixP; { - arelent * reloc; + arelent *reloc; reloc = (arelent *) xmalloc (sizeof (arelent)); @@ -642,8 +669,7 @@ gas_cgen_tc_gen_reloc (section, fixP) if (reloc->howto == (reloc_howto_type *) NULL) { as_bad_where (fixP->fx_file, fixP->fx_line, - _("internal error: can't export reloc type %d (`%s')"), - fixP->fx_r_type, bfd_get_reloc_code_name (fixP->fx_r_type)); + _("relocation is not supported")); return NULL; } @@ -652,12 +678,12 @@ gas_cgen_tc_gen_reloc (section, fixP) reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy); - /* Use fx_offset for these cases */ - if ( fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY + /* Use fx_offset for these cases. */ + if (fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT) - reloc->addend = fixP->fx_offset; + reloc->addend = fixP->fx_offset; else - reloc->addend = fixP->fx_addnumber; + reloc->addend = fixP->fx_addnumber; reloc->address = fixP->fx_frag->fr_address + fixP->fx_where; return reloc; diff --git a/contrib/binutils/gas/cgen.h b/contrib/binutils/gas/cgen.h index 2bc1732247f9..b09ccaad3ccc 100644 --- a/contrib/binutils/gas/cgen.h +++ b/contrib/binutils/gas/cgen.h @@ -1,5 +1,5 @@ /* GAS cgen support. - Copyright (C) 1998, 1999 Free Software Foundation, Inc. + Copyright 1998, 1999, 2000 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -26,7 +26,9 @@ extern CGEN_CPU_DESC gas_cgen_cpu_desc; /* Maximum number of fixups in an insn. If you need to change this, allow target to override and do so there. */ +#ifndef GAS_CGEN_MAX_FIXUPS #define GAS_CGEN_MAX_FIXUPS 3 +#endif /* Struct defining result of gas_cgen_finish_insn. */ typedef struct { @@ -54,7 +56,7 @@ extern void gas_cgen_init_parse PARAMS ((void)); extern void gas_cgen_save_fixups PARAMS ((void)); extern void gas_cgen_restore_fixups PARAMS ((void)); extern void gas_cgen_swap_fixups PARAMS ((void)); - + /* Add a register to the assembler's hash table. This makes lets GAS parse registers for us. ??? This isn't currently used, but it could be in the future. */ diff --git a/contrib/binutils/gas/config/tc-arc.c b/contrib/binutils/gas/config/tc-arc.c index 3aafea364810..45f54ac4fe36 100644 --- a/contrib/binutils/gas/config/tc-arc.c +++ b/contrib/binutils/gas/config/tc-arc.c @@ -1,5 +1,6 @@ /* tc-arc.c -- Assembler for the ARC - Copyright (C) 1994, 1995, 1997, 1998, 1999 Free Software Foundation, Inc. + Copyright 1994, 1995, 1997, 1999, 2000, 2001 + Free Software Foundation, Inc. Contributed by Doug Evans (dje@cygnus.com). This file is part of GAS, the GNU Assembler. @@ -17,41 +18,90 @@ You should have received a copy of the GNU General Public License along with GAS; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA - 02111-1307, USA. */ + 02111-1307, USA. */ #include <stdio.h> #include <ctype.h> +#include "libiberty.h" #include "as.h" #include "subsegs.h" #include "opcode/arc.h" +#include "../opcodes/arc-ext.h" #include "elf/arc.h" +#include "dwarf2dbg.h" extern int arc_get_mach PARAMS ((char *)); +extern int arc_operand_type PARAMS ((int)); +extern int arc_insn_not_jl PARAMS ((arc_insn)); +extern int arc_limm_fixup_adjust PARAMS ((arc_insn)); +extern int arc_get_noshortcut_flag PARAMS ((void)); +extern int arc_set_ext_seg PARAMS ((void)); +extern void arc_code_symbol PARAMS ((expressionS *)); static arc_insn arc_insert_operand PARAMS ((arc_insn, const struct arc_operand *, int, const struct arc_operand_value *, offsetT, char *, unsigned int)); static void arc_common PARAMS ((int)); -static void arc_cpu PARAMS ((int)); -/*static void arc_rename PARAMS ((int));*/ +static void arc_extinst PARAMS ((int)); +static void arc_extoper PARAMS ((int)); +static void arc_option PARAMS ((int)); static int get_arc_exp_reloc_type PARAMS ((int, int, expressionS *, expressionS *)); -const pseudo_typeS md_pseudo_table[] = -{ - { "align", s_align_bytes, 0 }, /* Defaulting is invalid (0) */ +const struct suffix_classes { + char *name; + int len; +} suffixclass[] = { + { "SUFFIX_COND|SUFFIX_FLAG",23 }, + { "SUFFIX_FLAG", 11 }, + { "SUFFIX_COND", 11 }, + { "SUFFIX_NONE", 11 } +}; + +#define MAXSUFFIXCLASS (sizeof (suffixclass) / sizeof (struct suffix_classes)) + +const struct syntax_classes { + char *name; + int len; + int class; +} syntaxclass[] = { + { "SYNTAX_3OP|OP1_MUST_BE_IMM", 26, SYNTAX_3OP|OP1_MUST_BE_IMM|SYNTAX_VALID }, + { "OP1_MUST_BE_IMM|SYNTAX_3OP", 26, OP1_MUST_BE_IMM|SYNTAX_3OP|SYNTAX_VALID }, + { "SYNTAX_2OP|OP1_IMM_IMPLIED", 26, SYNTAX_2OP|OP1_IMM_IMPLIED|SYNTAX_VALID }, + { "OP1_IMM_IMPLIED|SYNTAX_2OP", 26, OP1_IMM_IMPLIED|SYNTAX_2OP|SYNTAX_VALID }, + { "SYNTAX_3OP", 10, SYNTAX_3OP|SYNTAX_VALID }, + { "SYNTAX_2OP", 10, SYNTAX_2OP|SYNTAX_VALID } +}; + +#define MAXSYNTAXCLASS (sizeof (syntaxclass) / sizeof (struct syntax_classes)) + +const pseudo_typeS md_pseudo_table[] = { + { "align", s_align_bytes, 0 }, /* Defaulting is invalid (0). */ + { "comm", arc_common, 0 }, { "common", arc_common, 0 }, -/*{ "hword", cons, 2 }, - already exists */ + { "lcomm", arc_common, 1 }, + { "lcommon", arc_common, 1 }, + { "2byte", cons, 2 }, + { "half", cons, 2 }, + { "short", cons, 2 }, + { "3byte", cons, 3 }, + { "4byte", cons, 4 }, { "word", cons, 4 }, -/*{ "xword", cons, 8 },*/ - { "cpu", arc_cpu, 0 }, -/*{ "rename", arc_rename, 0 },*/ + { "option", arc_option, 0 }, + { "cpu", arc_option, 0 }, + { "block", s_space, 0 }, + { "file", dwarf2_directive_file, 0 }, + { "loc", dwarf2_directive_loc, 0 }, + { "extcondcode", arc_extoper, 0 }, + { "extcoreregister", arc_extoper, 1 }, + { "extauxregister", arc_extoper, 2 }, + { "extinstruction", arc_extinst, 0 }, { NULL, 0, 0 }, }; /* This array holds the chars that always start a comment. If the - pre-processor is disabled, these aren't very useful */ + pre-processor is disabled, these aren't very useful. */ const char comment_chars[] = "#;"; /* This array holds the chars that only start a comment at the beginning of @@ -59,19 +109,18 @@ const char comment_chars[] = "#;"; .line and .file directives will appear in the pre-processed output */ /* Note that input_file.c hand checks for '#' at the beginning of the first line of the input file. This is because the compiler outputs - #NO_APP at the beginning of its output. */ + #NO_APP at the beginning of its output. */ /* Also note that comments started like this one will always - work if '/' isn't otherwise defined. */ + work if '/' isn't otherwise defined. */ const char line_comment_chars[] = "#"; const char line_separator_chars[] = ""; -/* Chars that can be used to separate mant from exp in floating point nums */ +/* Chars that can be used to separate mant from exp in floating point nums. */ const char EXP_CHARS[] = "eE"; -/* Chars that mean this number is a floating point constant */ -/* As in 0f12.456 */ -/* or 0d1.2345e12 */ +/* Chars that mean this number is a floating point constant + As in 0f12.456 or 0d1.2345e12. */ const char FLT_CHARS[] = "rRsSfFdD"; /* Byte order. */ @@ -79,43 +128,69 @@ extern int target_big_endian; const char *arc_target_format = DEFAULT_TARGET_FORMAT; static int byte_order = DEFAULT_BYTE_ORDER; -/* One of bfd_mach_arc_xxx. */ -static int arc_mach_type = bfd_mach_arc_base; +static segT arcext_section; + +/* One of bfd_mach_arc_n. */ +static int arc_mach_type = bfd_mach_arc_6; /* Non-zero if the cpu type has been explicitly specified. */ static int mach_type_specified_p = 0; /* Non-zero if opcode tables have been initialized. - A .cpu command must appear before any instructions. */ + A .option command must appear before any instructions. */ static int cpu_tables_init_p = 0; static struct hash_control *arc_suffix_hash = NULL; const char *md_shortopts = ""; -struct option md_longopts[] = -{ +struct option md_longopts[] = { #define OPTION_EB (OPTION_MD_BASE + 0) - {"EB", no_argument, NULL, OPTION_EB}, + { "EB", no_argument, NULL, OPTION_EB }, #define OPTION_EL (OPTION_MD_BASE + 1) - {"EL", no_argument, NULL, OPTION_EL}, + { "EL", no_argument, NULL, OPTION_EL }, +#define OPTION_ARC5 (OPTION_MD_BASE + 2) + { "marc5", no_argument, NULL, OPTION_ARC5 }, + { "pre-v6", no_argument, NULL, OPTION_ARC5 }, +#define OPTION_ARC6 (OPTION_MD_BASE + 3) + { "marc6", no_argument, NULL, OPTION_ARC6 }, +#define OPTION_ARC7 (OPTION_MD_BASE + 4) + { "marc7", no_argument, NULL, OPTION_ARC7 }, +#define OPTION_ARC8 (OPTION_MD_BASE + 5) + { "marc8", no_argument, NULL, OPTION_ARC8 }, +#define OPTION_ARC (OPTION_MD_BASE + 6) + { "marc", no_argument, NULL, OPTION_ARC }, { NULL, no_argument, NULL, 0 } }; size_t md_longopts_size = sizeof (md_longopts); -/* - * md_parse_option - * - * Invocation line includes a switch not recognized by the base assembler. - * See if it's a processor-specific option. - */ +#define IS_SYMBOL_OPERAND(o) \ + ((o) == 'b' || (o) == 'c' || (o) == 's' || (o) == 'o' || (o) == 'O') + +struct arc_operand_value *get_ext_suffix (char *s); + +/* Invocation line includes a switch not recognized by the base assembler. + See if it's a processor-specific option. */ int md_parse_option (c, arg) int c; - char *arg; + char *arg ATTRIBUTE_UNUSED; { switch (c) { + case OPTION_ARC5: + arc_mach_type = bfd_mach_arc_5; + break; + case OPTION_ARC: + case OPTION_ARC6: + arc_mach_type = bfd_mach_arc_6; + break; + case OPTION_ARC7: + arc_mach_type = bfd_mach_arc_7; + break; + case OPTION_ARC8: + arc_mach_type = bfd_mach_arc_8; + break; case OPTION_EB: byte_order = BIG_ENDIAN; arc_target_format = "elf32-bigarc"; @@ -134,15 +209,16 @@ void md_show_usage (stream) FILE *stream; { - fprintf (stream, _("\ -ARC options:\n\ --EB generate big endian output\n\ --EL generate little endian output\n")); + fprintf (stream, "\ +ARC Options:\n\ + -marc[5|6|7|8] select processor variant (default arc%d)\n\ + -EB assemble code for a big endian cpu\n\ + -EL assemble code for a little endian cpu\n", arc_mach_type + 5); } /* This function is called once, at assembler startup time. It should set up all the tables, etc. that the MD part of the assembler will need. - Opcode selection is defered until later because we might see a .cpu + Opcode selection is deferred until later because we might see a .option command. */ void @@ -152,30 +228,28 @@ md_begin () target_big_endian = byte_order == BIG_ENDIAN; if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, arc_mach_type)) - as_warn (_("could not set architecture and machine")); + as_warn ("could not set architecture and machine"); - /* Assume the base cpu. This call is necessary because we need to - initialize `arc_operand_map' which may be needed before we see the - first insn. */ - arc_opcode_init_tables (arc_get_opcode_mach (bfd_mach_arc_base, + /* This call is necessary because we need to initialize `arc_operand_map' + which may be needed before we see the first insn. */ + arc_opcode_init_tables (arc_get_opcode_mach (arc_mach_type, target_big_endian)); } /* Initialize the various opcode and operand tables. MACH is one of bfd_mach_arc_xxx. */ - static void init_opcode_tables (mach) int mach; { - register unsigned int i; + int i; char *last; if ((arc_suffix_hash = hash_new ()) == NULL) - as_fatal (_("virtual memory exhausted")); + as_fatal ("virtual memory exhausted"); if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, mach)) - as_warn (_("could not set architecture and machine")); + as_warn ("could not set architecture and machine"); /* This initializes a few things in arc-opc.c that we need. This must be called before the various arc_xxx_supported fns. */ @@ -186,8 +260,6 @@ init_opcode_tables (mach) last = ""; for (i = 0; i < arc_suffixes_count; i++) { - if (! arc_opval_supported (&arc_suffixes[i])) - continue; if (strcmp (arc_suffixes[i].name, last) != 0) hash_insert (arc_suffix_hash, arc_suffixes[i].name, (PTR) (arc_suffixes + i)); last = arc_suffixes[i].name; @@ -196,18 +268,24 @@ init_opcode_tables (mach) /* Since registers don't have a prefix, we put them in the symbol table so they can't be used as symbols. This also simplifies argument parsing as we can let gas parse registers for us. The recorded register number is - the index in `arc_reg_names'. */ + the address of the register's entry in arc_reg_names. + + If the register name is already in the table, then the existing + definition is assumed to be from an .ExtCoreRegister pseudo-op. */ + for (i = 0; i < arc_reg_names_count; i++) { - if (! arc_opval_supported (&arc_reg_names[i])) + if (symbol_find (arc_reg_names[i].name)) continue; /* Use symbol_create here instead of symbol_new so we don't try to output registers into the object file's symbol table. */ - symbol_table_insert (symbol_create (arc_reg_names[i].name, reg_section, - i, &zero_address_frag)); + symbol_table_insert (symbol_create (arc_reg_names[i].name, + reg_section, + (int) &arc_reg_names[i], + &zero_address_frag)); } - /* Tell `s_cpu' it's too late. */ + /* Tell `.option' it's too late. */ cpu_tables_init_p = 1; } @@ -251,7 +329,7 @@ arc_insert_operand (insn, operand, mods, reg, val, file, line) if (test < (offsetT) min || test > (offsetT) max) { const char *err = - _("operand out of range (%s not between %ld and %ld)"); + "operand out of range (%s not between %ld and %ld)"; char buf[100]; sprint_value (buf, test); @@ -282,9 +360,8 @@ arc_insert_operand (insn, operand, mods, reg, val, file, line) we go, because that would require us to first create the frag, and that would screw up references to ``.''. */ -struct arc_fixup -{ - /* index into `arc_operands' */ +struct arc_fixup { + /* index into `arc_operands' */ int opindex; expressionS exp; }; @@ -300,12 +377,15 @@ md_assemble (str) char *str; { const struct arc_opcode *opcode; + const struct arc_opcode *std_opcode; + struct arc_opcode *ext_opcode; char *start; + const char *last_errmsg = 0; arc_insn insn; static int init_tables_p = 0; /* Opcode table initialization is deferred until here because we have to - wait for a possible .cpu command. */ + wait for a possible .option command. */ if (!init_tables_p) { init_opcode_tables (arc_mach_type); @@ -319,19 +399,26 @@ md_assemble (str) /* The instructions are stored in lists hashed by the first letter (though we needn't care how they're hashed). Get the first in the list. */ - opcode = arc_opcode_lookup_asm (str); + ext_opcode = arc_ext_opcodes; + std_opcode = arc_opcode_lookup_asm (str); /* Keep looking until we find a match. */ start = str; - for ( ; opcode != NULL; opcode = ARC_OPCODE_NEXT_ASM (opcode)) + for (opcode = (ext_opcode ? ext_opcode : std_opcode); + opcode != NULL; + opcode = (ARC_OPCODE_NEXT_ASM (opcode) + ? ARC_OPCODE_NEXT_ASM (opcode) + : (ext_opcode ? ext_opcode = NULL, std_opcode : NULL))) { int past_opcode_p, fc, num_suffixes; + int fix_up_at = 0; char *syn; struct arc_fixup fixups[MAX_FIXUPS]; /* Used as a sanity check. If we need a limm reloc, make sure we ask for an extra 4 bytes from frag_more. */ int limm_reloc_p; + int ext_suffix_p; const struct arc_operand_value *insn_suffixes[MAX_SUFFIXES]; /* Is this opcode supported by the selected cpu? */ @@ -346,10 +433,11 @@ md_assemble (str) past_opcode_p = 0; num_suffixes = 0; limm_reloc_p = 0; + ext_suffix_p = 0; /* We don't check for (*str != '\0') here because we want to parse any trailing fake arguments in the syntax string. */ - for (str = start, syn = opcode->syntax; *syn != '\0'; ) + for (str = start, syn = opcode->syntax; *syn != '\0';) { int mods; const struct arc_operand *operand; @@ -379,14 +467,14 @@ md_assemble (str) /* We have an operand. Pick out any modifiers. */ mods = 0; - while (ARC_MOD_P (arc_operands[arc_operand_map[*syn]].flags)) + while (ARC_MOD_P (arc_operands[arc_operand_map[(int) *syn]].flags)) { - mods |= arc_operands[arc_operand_map[*syn]].flags & ARC_MOD_BITS; + mods |= arc_operands[arc_operand_map[(int) *syn]].flags & ARC_MOD_BITS; ++syn; } - operand = arc_operands + arc_operand_map[*syn]; + operand = arc_operands + arc_operand_map[(int) *syn]; if (operand->fmt == 0) - as_fatal (_("unknown syntax format character `%c'"), *syn); + as_fatal ("unknown syntax format character `%c'", *syn); if (operand->flags & ARC_OPERAND_FAKE) { @@ -394,9 +482,25 @@ md_assemble (str) if (operand->insert) { insn = (*operand->insert) (insn, operand, mods, NULL, 0, &errmsg); - /* If we get an error, go on to try the next insn. */ - if (errmsg) - break; + if (errmsg != (const char *) NULL) + { + last_errmsg = errmsg; + if (operand->flags & ARC_OPERAND_ERROR) + { + as_bad (errmsg); + return; + } + else if (operand->flags & ARC_OPERAND_WARN) + as_warn (errmsg); + break; + } + if (limm_reloc_p + && (operand->flags && operand->flags & ARC_OPERAND_LIMM) + && (operand->flags & + (ARC_OPERAND_ABSOLUTE_BRANCH | ARC_OPERAND_ADDRESS))) + { + fixups[fix_up_at].opindex = arc_operand_map[operand->fmt]; + } } ++syn; } @@ -405,8 +509,9 @@ md_assemble (str) { int found; char c; - char *s,*t; - const struct arc_operand_value *suf,*suffix,*suffix_end; + char *s, *t; + const struct arc_operand_value *suf, *suffix_end; + const struct arc_operand_value *suffix = NULL; if (!(operand->flags & ARC_OPERAND_SUFFIX)) abort (); @@ -439,53 +544,75 @@ md_assemble (str) } /* Pick the suffix out and look it up via the hash table. */ - for (t = s; *t && isalpha (*t); ++t) + for (t = s; *t && isalnum (*t); ++t) continue; c = *t; *t = '\0'; - suf = hash_find (arc_suffix_hash, s); - *t = c; + if ((suf = get_ext_suffix (s))) + ext_suffix_p = 1; + else + suf = hash_find (arc_suffix_hash, s); if (!suf) { /* This can happen in "blle foo" and we're currently using the template "b%q%.n %j". The "bl" insn occurs later in the table so "lle" isn't an illegal suffix. */ + *t = c; break; } /* Is it the right type? Note that the same character is used - several times, so we have to examine all of them. This is + several times, so we have to examine all of them. This is relatively efficient as equivalent entries are kept together. If it's not the right type, don't increment `str' so we try the next one in the series. */ found = 0; - suffix_end = arc_suffixes + arc_suffixes_count; - for (suffix = suf; - suffix < suffix_end && strcmp (suffix->name, suf->name) == 0; - ++suffix) + if (ext_suffix_p && arc_operands[suf->type].fmt == *syn) { - if (arc_operands[suffix->type].fmt == *syn) + /* Insert the suffix's value into the insn. */ + *t = c; + if (operand->insert) + insn = (*operand->insert) (insn, operand, + mods, NULL, suf->value, + NULL); + else + insn |= suf->value << operand->shift; + + str = t; + found = 1; + } + else + { + *t = c; + suffix_end = arc_suffixes + arc_suffixes_count; + for (suffix = suf; + suffix < suffix_end && strcmp (suffix->name, suf->name) == 0; + ++suffix) { - /* Insert the suffix's value into the insn. */ - if (operand->insert) - insn = (*operand->insert) (insn, operand, - mods, NULL, suffix->value, - NULL); - else - insn |= suffix->value << operand->shift; - - str = t; - found = 1; - break; + if (arc_operands[suffix->type].fmt == *syn) + { + /* Insert the suffix's value into the insn. */ + if (operand->insert) + insn = (*operand->insert) (insn, operand, + mods, NULL, suffix->value, + NULL); + else + insn |= suffix->value << operand->shift; + + str = t; + found = 1; + break; + } } } ++syn; if (!found) - ; /* Wrong type. Just go on to try next insn entry. */ + /* Wrong type. Just go on to try next insn entry. */ + ; else { if (num_suffixes == MAX_SUFFIXES) - as_bad (_("too many suffixes")); + as_bad ("too many suffixes"); else insn_suffixes[num_suffixes++] = suffix; } @@ -493,7 +620,6 @@ md_assemble (str) else /* This is either a register or an expression of some kind. */ { - char c; char *hold; const struct arc_operand_value *reg = NULL; long value = 0; @@ -505,22 +631,8 @@ md_assemble (str) /* Is there anything left to parse? We don't check for this at the top because we want to parse any trailing fake arguments in the syntax string. */ - if (*str == '\0') - break; -#if 0 - /* Is this a syntax character? Eg: is there a '[' present when - there shouldn't be? */ - if (!isalnum (*str) - /* '.' as in ".LLC0" */ - && *str != '.' - /* '_' as in "_print" */ - && *str != '_' - /* '-' as in "[fp,-4]" */ - && *str != '-' - /* '%' as in "%ia(_func)" */ - && *str != '%') + if (is_end_of_line[(unsigned char) *str]) break; -#endif /* Parse the operand. */ hold = input_line_pointer; @@ -530,37 +642,48 @@ md_assemble (str) input_line_pointer = hold; if (exp.X_op == O_illegal) - as_bad (_("illegal operand")); + as_bad ("illegal operand"); else if (exp.X_op == O_absent) - as_bad (_("missing operand")); + as_bad ("missing operand"); else if (exp.X_op == O_constant) { value = exp.X_add_number; } else if (exp.X_op == O_register) { - reg = arc_reg_names + exp.X_add_number; + reg = (struct arc_operand_value *) exp.X_add_number; } +#define IS_REG_DEST_OPERAND(o) ((o) == 'a') + else if (IS_REG_DEST_OPERAND (*syn)) + as_bad ("symbol as destination register"); else { + if (!strncmp (str, "@h30", 4)) + { + arc_code_symbol (&exp); + str += 4; + } /* We need to generate a fixup for this expression. */ if (fc >= MAX_FIXUPS) - as_fatal (_("too many fixups")); + as_fatal ("too many fixups"); fixups[fc].exp = exp; - + /* We don't support shimm relocs. break here to force + the assembler to output a limm. */ +#define IS_REG_SHIMM_OFFSET(o) ((o) == 'd') + if (IS_REG_SHIMM_OFFSET (*syn)) + break; /* If this is a register constant (IE: one whose register value gets stored as 61-63) then this - must be a limm. We don't support shimm relocs. */ + must be a limm. */ /* ??? This bit could use some cleaning up. Referencing the format chars like this goes against style. */ -#define IS_REG_OPERAND(o) ((o) == 'a' || (o) == 'b' || (o) == 'c') - if (IS_REG_OPERAND (*syn)) + if (IS_SYMBOL_OPERAND (*syn)) { const char *junk; - - fixups[fc].opindex = arc_operand_map['L']; limm_reloc_p = 1; + /* Save this, we don't yet know what reloc to use. */ + fix_up_at = fc; /* Tell insert_reg we need a limm. This is needed because the value at this point is zero, a shimm. */ @@ -569,7 +692,7 @@ md_assemble (str) (insn, operand, mods, reg, 0L, &junk); } else - fixups[fc].opindex = arc_operand_map[*syn]; + fixups[fc].opindex = arc_operand_map[(int) *syn]; ++fc; value = 0; } @@ -580,18 +703,18 @@ md_assemble (str) const char *errmsg = NULL; insn = (*operand->insert) (insn, operand, mods, reg, (long) value, &errmsg); -#if 0 if (errmsg != (const char *) NULL) - as_warn (errmsg); -#endif - /* FIXME: We want to try shimm insns for limm ones. But if - the constant won't fit, we must go on to try the next - possibility. Where do we issue warnings for constants - that are too big then? At present, we'll flag the insn - as unrecognizable! Maybe have the "bad instruction" - error message include our `errmsg'? */ - if (errmsg != (const char *) NULL) - break; + { + last_errmsg = errmsg; + if (operand->flags & ARC_OPERAND_ERROR) + { + as_bad (errmsg); + return; + } + else if (operand->flags & ARC_OPERAND_WARN) + as_warn (errmsg); + break; + } } else insn |= (value & ((1 << operand->bits) - 1)) << operand->shift; @@ -616,8 +739,8 @@ md_assemble (str) while (isspace (*str)) ++str; - if (*str != '\0') - as_bad (_("junk at end of line: `%s'"), str); + if (!is_end_of_line[(unsigned char) *str]) + as_bad ("junk at end of line: `%s'", str); /* Is there a limm value? */ limm_p = arc_opcode_limm_p (&limm); @@ -635,19 +758,18 @@ md_assemble (str) int cc_set_p = 0; /* 1 if conditional branch, including `b' "branch always" */ int cond_branch_p = opcode->flags & ARC_OPCODE_COND_BRANCH; - int need_cc_nop_p = 0; for (i = 0; i < num_suffixes; ++i) { switch (arc_operands[insn_suffixes[i]->type].fmt) { - case 'n' : + case 'n': delay_slot_type = insn_suffixes[i]->value; break; - case 'q' : + case 'q': conditional = insn_suffixes[i]->value; break; - case 'f' : + case 'f': cc_set_p = 1; break; } @@ -657,18 +779,22 @@ md_assemble (str) be legal, but let's warn the user anyway. Ditto for 8 byte jumps with delay slots. */ if (in_delay_slot_p && limm_p) - as_warn (_("8 byte instruction in delay slot")); - if (delay_slot_type != ARC_DELAY_NONE && limm_p) - as_warn (_("8 byte jump instruction with delay slot")); + as_warn ("8 byte instruction in delay slot"); + if (delay_slot_type != ARC_DELAY_NONE + && limm_p && arc_insn_not_jl (insn)) /* except for jl addr */ + as_warn ("8 byte jump instruction with delay slot"); in_delay_slot_p = (delay_slot_type != ARC_DELAY_NONE) && !limm_p; /* Warn when a conditional branch immediately follows a set of the condition codes. Note that this needn't be done if the insn that sets the condition codes uses a limm. */ if (cond_branch_p && conditional != 0 /* 0 = "always" */ - && prev_insn_needs_cc_nop_p) - as_warn (_("conditional branch follows set of flags")); - prev_insn_needs_cc_nop_p = cc_set_p && !limm_p; + && prev_insn_needs_cc_nop_p && arc_mach_type == bfd_mach_arc_5) + as_warn ("conditional branch follows set of flags"); + prev_insn_needs_cc_nop_p = + /* FIXME: ??? not required: + (delay_slot_type != ARC_DELAY_NONE) && */ + cc_set_p && !limm_p; } /* Write out the instruction. @@ -680,6 +806,7 @@ md_assemble (str) f = frag_more (8); md_number_to_chars (f, insn, 4); md_number_to_chars (f + 4, limm, 4); + dwarf2_emit_insn (8); } else if (limm_reloc_p) { @@ -690,6 +817,7 @@ md_assemble (str) { f = frag_more (4); md_number_to_chars (f, insn, 4); + dwarf2_emit_insn (4); } /* Create any fixups. */ @@ -712,9 +840,14 @@ md_assemble (str) if (arc_operands[fixups[i].opindex].flags & ARC_OPERAND_LIMM) { + /* Modify the fixup addend as required by the cpu. */ + fixups[i].exp.X_add_number += arc_limm_fixup_adjust (insn); op_type = fixups[i].opindex; /* FIXME: can we add this data to the operand table? */ - if (op_type == arc_operand_map['L']) + if (op_type == arc_operand_map['L'] + || op_type == arc_operand_map['s'] + || op_type == arc_operand_map['o'] + || op_type == arc_operand_map['O']) reloc_type = BFD_RELOC_32; else if (op_type == arc_operand_map['J']) reloc_type = BFD_RELOC_ARC_B26; @@ -746,239 +879,661 @@ md_assemble (str) /* Try the next entry. */ } - as_bad (_("bad instruction `%s'"), start); + if (NULL == last_errmsg) + as_bad ("bad instruction `%s'", start); + else + as_bad (last_errmsg); } -/* ??? This was copied from tc-sparc.c, I think. Is it necessary? */ - static void -arc_common (ignore) - int ignore; +arc_extoper (opertype) + int opertype; { char *name; + char *mode; char c; char *p; - int temp, size; + int imode = 0; + int number; + struct arc_ext_operand_value *ext_oper; symbolS *symbolP; + segT old_sec; + int old_subsec; + name = input_line_pointer; c = get_symbol_end (); - /* just after name is now '\0' */ + name = xstrdup (name); + if (NULL == name) + { + ignore_rest_of_line (); + return; + } + + p = name; + while (*p) + { + if (isupper (*p)) + *p = tolower (*p); + p++; + } + + /* just after name is now '\0' */ p = input_line_pointer; *p = c; SKIP_WHITESPACE (); + if (*input_line_pointer != ',') { - as_bad (_("expected comma after symbol-name")); + as_bad ("expected comma after operand name"); ignore_rest_of_line (); + free (name); return; } - input_line_pointer++; /* skip ',' */ - if ((temp = get_absolute_expression ()) < 0) + + input_line_pointer++; /* skip ',' */ + number = get_absolute_expression (); + + if (number < 0) { - as_bad (_(".COMMon length (%d.) <0! Ignored."), temp); + as_bad ("negative operand number %d", number); ignore_rest_of_line (); + free (name); return; } - size = temp; - *p = 0; - symbolP = symbol_find_or_make (name); - *p = c; - if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) + + if (opertype) + { + SKIP_WHITESPACE (); + + if (*input_line_pointer != ',') + { + as_bad ("expected comma after register-number"); + ignore_rest_of_line (); + free (name); + return; + } + + input_line_pointer++; /* skip ',' */ + mode = input_line_pointer; + + if (!strncmp (mode, "r|w", 3)) + { + imode = 0; + input_line_pointer += 3; + } + else + { + if (!strncmp (mode, "r", 1)) + { + imode = ARC_REGISTER_READONLY; + input_line_pointer += 1; + } + else + { + if (strncmp (mode, "w", 1)) + { + as_bad ("invalid mode"); + ignore_rest_of_line (); + free (name); + return; + } + else + { + imode = ARC_REGISTER_WRITEONLY; + input_line_pointer += 1; + } + } + } + SKIP_WHITESPACE (); + if (1 == opertype) + { + if (*input_line_pointer != ',') + { + as_bad ("expected comma after register-mode"); + ignore_rest_of_line (); + free (name); + return; + } + + input_line_pointer++; /* skip ',' */ + + if (!strncmp (input_line_pointer, "cannot_shortcut", 15)) + { + imode |= arc_get_noshortcut_flag (); + input_line_pointer += 15; + } + else + { + if (strncmp (input_line_pointer, "can_shortcut", 12)) + { + as_bad ("shortcut designator invalid"); + ignore_rest_of_line (); + free (name); + return; + } + else + { + input_line_pointer += 12; + } + } + } + } + + if ((opertype == 1) && number > 60) + { + as_bad ("core register value (%d) too large", number); + ignore_rest_of_line (); + free (name); + return; + } + + if ((opertype == 0) && number > 31) { - as_bad (_("ignoring attempt to re-define symbol")); + as_bad ("condition code value (%d) too large", number); ignore_rest_of_line (); + free (name); return; } - if (S_GET_VALUE (symbolP) != 0) + + ext_oper = (struct arc_ext_operand_value *) \ + xmalloc (sizeof (struct arc_ext_operand_value)); + + if (opertype) { - if (S_GET_VALUE (symbolP) != size) + /* If the symbol already exists, point it at the new definition. */ + if ((symbolP = symbol_find (name))) { - as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."), - S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size); + if (S_GET_SEGMENT (symbolP) == reg_section) + S_SET_VALUE (symbolP, (int) &ext_oper->operand); + else + { + as_bad ("attempt to override symbol: %s", name); + ignore_rest_of_line (); + free (name); + free (ext_oper); + return; + } } + else + { + /* If its not there, add it. */ + symbol_table_insert (symbol_create (name, reg_section, + (int) &ext_oper->operand, &zero_address_frag)); + } + } + + ext_oper->operand.name = name; + ext_oper->operand.value = number; + ext_oper->operand.type = arc_operand_type (opertype); + ext_oper->operand.flags = imode; + + ext_oper->next = arc_ext_operands; + arc_ext_operands = ext_oper; + + /* OK, now that we know what this operand is, put a description in + the arc extension section of the output file. */ + + old_sec = now_seg; + old_subsec = now_subseg; + + arc_set_ext_seg (); + + switch (opertype) + { + case 0: + p = frag_more (1); + *p = 3 + strlen (name) + 1; + p = frag_more (1); + *p = EXT_COND_CODE; + p = frag_more (1); + *p = number; + p = frag_more (strlen (name) + 1); + strcpy (p, name); + break; + case 1: + p = frag_more (1); + *p = 3 + strlen (name) + 1; + p = frag_more (1); + *p = EXT_CORE_REGISTER; + p = frag_more (1); + *p = number; + p = frag_more (strlen (name) + 1); + strcpy (p, name); + break; + case 2: + p = frag_more (1); + *p = 6 + strlen (name) + 1; + p = frag_more (1); + *p = EXT_AUX_REGISTER; + p = frag_more (1); + *p = number >> 24 & 0xff; + p = frag_more (1); + *p = number >> 16 & 0xff; + p = frag_more (1); + *p = number >> 8 & 0xff; + p = frag_more (1); + *p = number & 0xff; + p = frag_more (strlen (name) + 1); + strcpy (p, name); + break; + default: + as_bad ("invalid opertype"); + ignore_rest_of_line (); + free (name); + return; + break; } - assert (symbol_get_frag (symbolP) == &zero_address_frag); + + subseg_set (old_sec, old_subsec); + + /* Enter all registers into the symbol table. */ + + demand_empty_rest_of_line (); +} + +static void +arc_extinst (ignore) + int ignore ATTRIBUTE_UNUSED; +{ + unsigned char syntax[129]; + char *name; + char *p; + char c; + int suffixcode = -1; + int opcode, subopcode; + int i; + int class = 0; + int name_len; + struct arc_opcode *ext_op; + + segT old_sec; + int old_subsec; + + name = input_line_pointer; + c = get_symbol_end (); + name = xstrdup (name); + if (NULL == name) + { + ignore_rest_of_line (); + return; + } + strcpy (syntax, name); + name_len = strlen (name); + + /* just after name is now '\0' */ + p = input_line_pointer; + *p = c; + + SKIP_WHITESPACE (); + if (*input_line_pointer != ',') { - as_bad (_("expected comma after common length")); + as_bad ("expected comma after operand name"); ignore_rest_of_line (); return; } - input_line_pointer++; + + input_line_pointer++; /* skip ',' */ + opcode = get_absolute_expression (); + SKIP_WHITESPACE (); - if (*input_line_pointer != '"') + + if (*input_line_pointer != ',') + { + as_bad ("expected comma after opcode"); + ignore_rest_of_line (); + return; + } + + input_line_pointer++; /* skip ',' */ + subopcode = get_absolute_expression (); + + if (subopcode < 0) { - temp = get_absolute_expression (); - if (temp < 0) + as_bad ("negative subopcode %d", subopcode); + ignore_rest_of_line (); + return; + } + + if (subopcode) + { + if (3 != opcode) { - temp = 0; - as_warn (_("Common alignment negative; 0 assumed")); + as_bad ("subcode value found when opcode not equal 0x03"); + ignore_rest_of_line (); + return; } - if (symbolP->local) + else { - segT old_sec; - int old_subsec; - char *p; - int align; - - allocate_bss: - old_sec = now_seg; - old_subsec = now_subseg; - align = temp; - record_alignment (bss_section, align); - subseg_set (bss_section, 0); - if (align) - frag_align (align, 0, 0); - if (S_GET_SEGMENT (symbolP) == bss_section) - symbol_get_frag (symbolP)->fr_symbol = 0; - symbol_set_frag (symbolP, frag_now); - p = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, - (offsetT) size, (char *) 0); - *p = 0; - S_SET_SEGMENT (symbolP, bss_section); - S_CLEAR_EXTERNAL (symbolP); - subseg_set (old_sec, old_subsec); + if (subopcode < 0x09 || subopcode == 0x3f) + { + as_bad ("invalid subopcode %d", subopcode); + ignore_rest_of_line (); + return; + } } - else + } + + SKIP_WHITESPACE (); + + if (*input_line_pointer != ',') + { + as_bad ("expected comma after subopcode"); + ignore_rest_of_line (); + return; + } + + input_line_pointer++; /* skip ',' */ + + for (i = 0; i < (int) MAXSUFFIXCLASS; i++) + { + if (!strncmp (suffixclass[i].name,input_line_pointer, suffixclass[i].len)) { - allocate_common: - S_SET_VALUE (symbolP, (valueT) size); - S_SET_ALIGN (symbolP, temp); - S_SET_EXTERNAL (symbolP); - S_SET_SEGMENT (symbolP, bfd_com_section_ptr); + suffixcode = i; + input_line_pointer += suffixclass[i].len; + break; } } - else + + if (-1 == suffixcode) { - input_line_pointer++; - /* ??? Some say data, some say bss. */ - if (strncmp (input_line_pointer, ".bss\"", 5) - && strncmp (input_line_pointer, ".data\"", 6)) + as_bad ("invalid suffix class"); + ignore_rest_of_line (); + return; + } + + SKIP_WHITESPACE (); + + if (*input_line_pointer != ',') + { + as_bad ("expected comma after suffix class"); + ignore_rest_of_line (); + return; + } + + input_line_pointer++; /* skip ',' */ + + for (i = 0; i < (int) MAXSYNTAXCLASS; i++) + { + if (!strncmp (syntaxclass[i].name,input_line_pointer, syntaxclass[i].len)) { - input_line_pointer--; - goto bad_common_segment; + class = syntaxclass[i].class; + input_line_pointer += syntaxclass[i].len; + break; } - while (*input_line_pointer++ != '"') - ; - goto allocate_common; } - demand_empty_rest_of_line (); - return; - { - bad_common_segment: - p = input_line_pointer; - while (*p && *p != '\n') - p++; - c = *p; - *p = '\0'; - as_bad (_("bad .common segment %s"), input_line_pointer + 1); - *p = c; - input_line_pointer = p; - ignore_rest_of_line (); - return; - } + if (0 == (SYNTAX_VALID & class)) + { + as_bad ("invalid syntax class"); + ignore_rest_of_line (); + return; + } + + if ((0x3 == opcode) & (class & SYNTAX_3OP)) + { + as_bad ("opcode 0x3 and SYNTAX_3OP invalid"); + ignore_rest_of_line (); + return; + } + + switch (suffixcode) + { + case 0: + strcat (syntax, "%.q%.f "); + break; + case 1: + strcat (syntax, "%.f "); + break; + case 2: + strcat (syntax, "%.q "); + break; + case 3: + strcat (syntax, " "); + break; + default: + as_bad ("unknown suffix class"); + ignore_rest_of_line (); + return; + break; + }; + + strcat (syntax, ((opcode == 0x3) ? "%a,%b" : ((class & SYNTAX_3OP) ? "%a,%b,%c" : "%b,%c"))); + if (suffixcode < 2) + strcat (syntax, "%F"); + strcat (syntax, "%S%L"); + + ext_op = (struct arc_opcode *) xmalloc (sizeof (struct arc_opcode)); + if (NULL == ext_op) + { + ignore_rest_of_line (); + return; + } + + ext_op->syntax = xstrdup (syntax); + if (NULL == ext_op->syntax) + { + ignore_rest_of_line (); + return; + } + + ext_op->mask = I (-1) | ((0x3 == opcode) ? C (-1) : 0); + ext_op->value = I (opcode) | ((0x3 == opcode) ? C (subopcode) : 0); + ext_op->flags = class; + ext_op->next_asm = arc_ext_opcodes; + ext_op->next_dis = arc_ext_opcodes; + arc_ext_opcodes = ext_op; + + /* OK, now that we know what this inst is, put a description in the + arc extension section of the output file. */ + + old_sec = now_seg; + old_subsec = now_subseg; + + arc_set_ext_seg (); + + p = frag_more (1); + *p = 5 + name_len + 1; + p = frag_more (1); + *p = EXT_INSTRUCTION; + p = frag_more (1); + *p = opcode; + p = frag_more (1); + *p = subopcode; + p = frag_more (1); + *p = (class & (OP1_MUST_BE_IMM | OP1_IMM_IMPLIED) ? IGNORE_FIRST_OPD : 0); + p = frag_more (name_len); + strncpy (p, syntax, name_len); + p = frag_more (1); + *p = '\0'; + + subseg_set (old_sec, old_subsec); + + demand_empty_rest_of_line (); } -/* Select the cpu we're assembling for. */ +int +arc_set_ext_seg () +{ + if (!arcext_section) + { + arcext_section = subseg_new (".arcextmap", 0); + bfd_set_section_flags (stdoutput, arcext_section, + SEC_READONLY | SEC_HAS_CONTENTS); + } + else + subseg_set (arcext_section, 0); + return 1; +} static void -arc_cpu (ignore) - int ignore; +arc_common (localScope) + int localScope; { - int mach; + char *name; char c; - char *cpu; + char *p; + int align, size; + symbolS *symbolP; - /* If an instruction has already been seen, it's too late. */ - if (cpu_tables_init_p) + name = input_line_pointer; + c = get_symbol_end (); + /* just after name is now '\0' */ + p = input_line_pointer; + *p = c; + SKIP_WHITESPACE (); + + if (*input_line_pointer != ',') { - as_bad (_(".cpu command must appear before any instructions")); + as_bad ("expected comma after symbol name"); ignore_rest_of_line (); return; } - cpu = input_line_pointer; - c = get_symbol_end (); - mach = arc_get_mach (cpu); - *input_line_pointer = c; - if (mach == -1) - goto bad_cpu; + input_line_pointer++; /* skip ',' */ + size = get_absolute_expression (); - demand_empty_rest_of_line (); + if (size < 0) + { + as_bad ("negative symbol length"); + ignore_rest_of_line (); + return; + } - /* The cpu may have been selected on the command line. - The choices must match. */ - /* ??? This was a command line option early on. It's gone now, but - leave this in. */ - if (mach_type_specified_p && mach != arc_mach_type) - as_bad (_(".cpu conflicts with previous value")); + *p = 0; + symbolP = symbol_find_or_make (name); + *p = c; + + if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) + { + as_bad ("ignoring attempt to re-define symbol"); + ignore_rest_of_line (); + return; + } + if (((int) S_GET_VALUE (symbolP) != 0) \ + && ((int) S_GET_VALUE (symbolP) != size)) + { + as_warn ("length of symbol \"%s\" already %ld, ignoring %d", + S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size); + } + assert (symbolP->sy_frag == &zero_address_frag); + + /* Now parse the alignment field. This field is optional for + local and global symbols. Default alignment is zero. */ + if (*input_line_pointer == ',') + { + input_line_pointer++; + align = get_absolute_expression (); + if (align < 0) + { + align = 0; + as_warn ("assuming symbol alignment of zero"); + } + } else + align = 0; + + if (localScope != 0) { - arc_mach_type = mach; - mach_type_specified_p = 1; - if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, mach)) - as_warn (_("could not set architecture and machine")); + segT old_sec; + int old_subsec; + char *pfrag; + + old_sec = now_seg; + old_subsec = now_subseg; + record_alignment (bss_section, align); + subseg_set (bss_section, 0); /* ??? subseg_set (bss_section, 1); ??? */ + + if (align) + /* Do alignment. */ + frag_align (align, 0, 0); + + /* Detach from old frag. */ + if (S_GET_SEGMENT (symbolP) == bss_section) + symbolP->sy_frag->fr_symbol = NULL; + + symbolP->sy_frag = frag_now; + pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, + (offsetT) size, (char *) 0); + *pfrag = 0; + + S_SET_SIZE (symbolP, size); + S_SET_SEGMENT (symbolP, bss_section); + S_CLEAR_EXTERNAL (symbolP); + symbolP->local = 1; + subseg_set (old_sec, old_subsec); + } + else + { + S_SET_VALUE (symbolP, (valueT) size); + S_SET_ALIGN (symbolP, align); + S_SET_EXTERNAL (symbolP); + S_SET_SEGMENT (symbolP, bfd_com_section_ptr); } - return; - bad_cpu: - as_bad (_("bad .cpu op")); - ignore_rest_of_line (); -} + symbolP->bsym->flags |= BSF_OBJECT; -#if 0 -/* The .rename pseudo-op. This is used by gcc to implement - -mmangle-cpu-libgcc. */ + demand_empty_rest_of_line (); + return; +} + +/* Select the cpu we're assembling for. */ static void -arc_rename (ignore) - int ignore; +arc_option (ignore) + int ignore ATTRIBUTE_UNUSED; { - char *name,*new; + int mach; char c; - symbolS *sym; - int len; + char *cpu; - name = input_line_pointer; + cpu = input_line_pointer; c = get_symbol_end (); - sym = symbol_find_or_make (name); + mach = arc_get_mach (cpu); *input_line_pointer = c; - if (*input_line_pointer != ',') + /* If an instruction has already been seen, it's too late. */ + if (cpu_tables_init_p) { - as_bad (_("missing rename string")); + as_bad ("\".option\" directive must appear before any instructions"); ignore_rest_of_line (); return; } - ++input_line_pointer; - SKIP_WHITESPACE (); - name = input_line_pointer; - c = get_symbol_end (); - if (*name == '\0') + if (mach == -1) + goto bad_cpu; + + if (mach_type_specified_p && mach != arc_mach_type) { - *input_line_pointer = c; - as_bad (_("invalid symbol to rename to")); + as_bad ("\".option\" directive conflicts with initial definition"); ignore_rest_of_line (); return; } - new = (char *) xmalloc (strlen (name) + 1); - strcpy (new, name); - *input_line_pointer = c; - symbol_get_tc (sym)->real_name = new; - + else + { + /* The cpu may have been selected on the command line. */ + if (mach != arc_mach_type) + as_warn ("\".option\" directive overrides command-line (default) value"); + arc_mach_type = mach; + if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, mach)) + as_fatal ("could not set architecture and machine"); + mach_type_specified_p = 1; + } demand_empty_rest_of_line (); + return; + + bad_cpu: + as_bad ("invalid identifier for \".option\""); + ignore_rest_of_line (); } -#endif -/* Turn a string in input_line_pointer into a floating point constant of type - type, and store the appropriate bytes in *litP. The number of LITTLENUMS - emitted is stored in *sizeP. - An error message is returned, or NULL on OK. */ +/* Turn a string in input_line_pointer into a floating point constant + of type TYPE, and store the appropriate bytes in *LITP. The number + of LITTLENUMS emitted is stored in *SIZEP. An error message is + returned, or NULL on OK. */ -/* Equal to MAX_PRECISION in atof-ieee.c */ +/* Equal to MAX_PRECISION in atof-ieee.c */ #define MAX_LITTLENUMS 6 char * @@ -1007,7 +1562,7 @@ md_atof (type, litP, sizeP) default: *sizeP = 0; - return _("bad call to md_atof"); + return "bad call to md_atof"; } t = atof_ieee (input_line_pointer, type, words); @@ -1038,7 +1593,7 @@ md_number_to_chars (buf, val, n) number_to_chars_littleendian (buf, val, n); } -/* Round up a section size to the appropriate boundary. */ +/* Round up a section size to the appropriate boundary. */ valueT md_section_align (segment, size) @@ -1054,21 +1609,59 @@ md_section_align (segment, size) int md_estimate_size_before_relax (fragp, seg) - fragS *fragp; - asection *seg; + fragS *fragp ATTRIBUTE_UNUSED; + asection *seg ATTRIBUTE_UNUSED; { - abort (); + as_fatal (_("md_estimate_size_before_relax\n")); + return 1; } /* Convert a machine dependent frag. We never generate these. */ void md_convert_frag (abfd, sec, fragp) - bfd *abfd; - asection *sec; - fragS *fragp; + bfd *abfd ATTRIBUTE_UNUSED; + asection *sec ATTRIBUTE_UNUSED; + fragS *fragp ATTRIBUTE_UNUSED; { - abort (); + as_fatal (_("md_convert_frag\n")); +} + +void +arc_code_symbol (expressionP) + expressionS *expressionP; +{ + if (expressionP->X_op == O_symbol && expressionP->X_add_number == 0 + /* I think this test is unnecessary but just as a sanity check... */ + && expressionP->X_op_symbol == NULL) + { + expressionS two; + expressionP->X_op = O_right_shift; + expressionP->X_add_symbol->sy_value.X_op = O_constant; + two.X_op = O_constant; + two.X_add_symbol = two.X_op_symbol = NULL; + two.X_add_number = 2; + expressionP->X_op_symbol = make_expr_symbol (&two); + } + /* Allow %st(sym1-sym2) */ + else if (expressionP->X_op == O_subtract + && expressionP->X_add_symbol != NULL + && expressionP->X_op_symbol != NULL + && expressionP->X_add_number == 0) + { + expressionS two; + expressionP->X_add_symbol = make_expr_symbol (expressionP); + expressionP->X_op = O_right_shift; + two.X_op = O_constant; + two.X_add_symbol = two.X_op_symbol = NULL; + two.X_add_number = 2; + expressionP->X_op_symbol = make_expr_symbol (&two); + } + else + { + as_bad ("expression too complex code symbol"); + return; + } } /* Parse an operand that is machine-specific. @@ -1079,59 +1672,58 @@ md_convert_frag (abfd, sec, fragp) ??? We can't create new expression types so we map the %-op's onto the existing syntax. This means that the user could use the chosen syntax - to achieve the same effect. Perhaps put a special cookie in X_add_number - to mark the expression as special. */ + to achieve the same effect. */ -void +void md_operand (expressionP) expressionS *expressionP; { char *p = input_line_pointer; - if (*p == '%' && strncmp (p, "%st(", 4) == 0) - { - input_line_pointer += 4; - expression (expressionP); - if (*input_line_pointer != ')') - { - as_bad (_("missing ')' in %-op")); - return; - } - ++input_line_pointer; - if (expressionP->X_op == O_symbol - && expressionP->X_add_number == 0 - /* I think this test is unnecessary but just as a sanity check... */ - && expressionP->X_op_symbol == NULL) - { - expressionS two; - - expressionP->X_op = O_right_shift; - two.X_op = O_constant; - two.X_add_symbol = two.X_op_symbol = NULL; - two.X_add_number = 2; - expressionP->X_op_symbol = make_expr_symbol (&two); - } - /* allow %st(sym1-sym2) */ - else if (expressionP->X_op == O_subtract - && expressionP->X_add_symbol != NULL - && expressionP->X_op_symbol != NULL - && expressionP->X_add_number == 0) - { - expressionS two; - - expressionP->X_add_symbol = make_expr_symbol (expressionP); - expressionP->X_op = O_right_shift; - two.X_op = O_constant; - two.X_add_symbol = two.X_op_symbol = NULL; - two.X_add_number = 2; - expressionP->X_op_symbol = make_expr_symbol (&two); - } - else - { - as_bad (_("expression too complex for %%st")); - return; - } - } + if (*p == '%') + if (strncmp (p, "%st(", 4) == 0) + { + input_line_pointer += 4; + expression (expressionP); + if (*input_line_pointer != ')') + { + as_bad ("missing ')' in %%-op"); + return; + } + ++input_line_pointer; + arc_code_symbol (expressionP); + } + else + { + /* It could be a register. */ + int i, l; + struct arc_ext_operand_value *ext_oper = arc_ext_operands; + p++; + + while (ext_oper) + { + l = strlen (ext_oper->operand.name); + if (!strncmp (p, ext_oper->operand.name, l) && !isalnum(*(p + l))) + { + input_line_pointer += l + 1; + expressionP->X_op = O_register; + expressionP->X_add_number = (int) &ext_oper->operand; + return; + } + ext_oper = ext_oper->next; + } + for (i = 0; i < arc_reg_names_count; i++) + { + l = strlen (arc_reg_names[i].name); + if (!strncmp (p, arc_reg_names[i].name, l) && !isalnum (*(p + l))) + { + input_line_pointer += l + 1; + expressionP->X_op = O_register; + expressionP->X_add_number = (int) &arc_reg_names[i]; + break; + } + } + } } /* We have no need to default values of symbols. @@ -1140,7 +1732,7 @@ md_operand (expressionP) symbolS * md_undefined_symbol (name) - char *name; + char *name ATTRIBUTE_UNUSED; { return 0; } @@ -1155,9 +1747,23 @@ md_undefined_symbol (name) void arc_parse_cons_expression (exp, nbytes) expressionS *exp; - int nbytes; + unsigned int nbytes ATTRIBUTE_UNUSED; { + char *p = input_line_pointer; + int code_symbol_fix = 0; + + for (; ! is_end_of_line[(unsigned char) *p]; p++) + if (*p == '@' && !strncmp (p, "@h30", 4)) + { + code_symbol_fix = 1; + strcpy (p, "; "); + } expr (0, exp); + if (code_symbol_fix) + { + arc_code_symbol (exp); + input_line_pointer = p; + } } /* Record a fixup for a cons expression. */ @@ -1192,7 +1798,7 @@ arc_cons_fix_new (frag, where, nbytes, exp) /* The location from which a PC relative jump should be calculated, given a PC relative reloc. */ -long +long md_pcrel_from (fixP) fixS *fixP; { @@ -1242,13 +1848,13 @@ get_arc_exp_reloc_type (data_p, default_type, exp, expnew) if (exp->X_op == O_right_shift && exp->X_op_symbol != NULL - && symbol_constant_p (exp->X_op_symbol) - && S_GET_VALUE (exp->X_op_symbol) == 2 + && exp->X_op_symbol->sy_value.X_op == O_constant + && exp->X_op_symbol->sy_value.X_add_number == 2 && exp->X_add_number == 0) { if (exp->X_add_symbol != NULL - && (symbol_constant_p (exp->X_add_symbol) - || symbol_equated_p (exp->X_add_symbol))) + && (exp->X_add_symbol->sy_value.X_op == O_constant + || exp->X_add_symbol->sy_value.X_op == O_symbol)) { *expnew = *exp; expnew->X_op = O_symbol; @@ -1256,10 +1862,9 @@ get_arc_exp_reloc_type (data_p, default_type, exp, expnew) return data_p ? BFD_RELOC_ARC_B26 : arc_operand_map['J']; } else if (exp->X_add_symbol != NULL - && (symbol_get_value_expression (exp->X_add_symbol)->X_op - == O_subtract)) + && exp->X_add_symbol->sy_value.X_op == O_subtract) { - *expnew = *symbol_get_value_expression (exp->X_add_symbol); + *expnew = exp->X_add_symbol->sy_value; return data_p ? BFD_RELOC_ARC_B26 : arc_operand_map['J']; } } @@ -1282,7 +1887,9 @@ md_apply_fix3 (fixP, valueP, seg) valueT *valueP; segT seg; { - /*char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;*/ +#if 0 + char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; +#endif valueT value; /* FIXME FIXME FIXME: The value we are passed in *valueP includes @@ -1323,7 +1930,7 @@ md_apply_fix3 (fixP, valueP, seg) { /* We can't actually support subtracting a symbol. */ as_bad_where (fixP->fx_file, fixP->fx_line, - _("expression too complex")); + "expression too complex"); } } } @@ -1372,14 +1979,14 @@ md_apply_fix3 (fixP, valueP, seg) && operand->shift == 7); fixP->fx_r_type = BFD_RELOC_ARC_B22_PCREL; } - else if (0 && operand->fmt == 'J') + else if (operand->fmt == 'J') { assert ((operand->flags & ARC_OPERAND_ABSOLUTE_BRANCH) != 0 && operand->bits == 24 && operand->shift == 32); fixP->fx_r_type = BFD_RELOC_ARC_B26; } - else if (0 && operand->fmt == 'L') + else if (operand->fmt == 'L') { assert ((operand->flags & ARC_OPERAND_LIMM) != 0 && operand->bits == 32 @@ -1389,7 +1996,7 @@ md_apply_fix3 (fixP, valueP, seg) else { as_bad_where (fixP->fx_file, fixP->fx_line, - _("unresolved expression that must be resolved")); + "unresolved expression that must be resolved"); fixP->fx_done = 1; return 1; } @@ -1440,45 +2047,32 @@ md_apply_fix3 (fixP, valueP, seg) arelent * tc_gen_reloc (section, fixP) - asection *section; + asection *section ATTRIBUTE_UNUSED; fixS *fixP; { arelent *reloc; reloc = (arelent *) xmalloc (sizeof (arelent)); - reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); - *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy); + reloc->sym_ptr_ptr = &fixP->fx_addsy->bsym; reloc->address = fixP->fx_frag->fr_address + fixP->fx_where; reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); if (reloc->howto == (reloc_howto_type *) NULL) { as_bad_where (fixP->fx_file, fixP->fx_line, - _("internal error: can't export reloc type %d (`%s')"), - fixP->fx_r_type, bfd_get_reloc_code_name (fixP->fx_r_type)); + "internal error: can't export reloc type %d (`%s')", + fixP->fx_r_type, + bfd_get_reloc_code_name (fixP->fx_r_type)); return NULL; } assert (!fixP->fx_pcrel == !reloc->howto->pc_relative); - reloc->addend = fixP->fx_addnumber; - - return reloc; -} - -/* Frobbers. */ - -#if 0 -/* Set the real name if the .rename pseudo-op was used. - Return 1 if the symbol should not be included in the symbol table. */ + /* Set addend to account for PC being advanced one insn before the + target address is computed, drop fx_addnumber as it is handled + elsewhere mlm */ -int -arc_frob_symbol (sym) - symbolS *sym; -{ - if (symbol_get_tc (sym)->real_name != (char *) NULL) - S_SET_NAME (sym, symbol_get_tc (sym)->real_name); + reloc->addend = (fixP->fx_pcrel ? -4 : 0); - return 0; + return reloc; } -#endif diff --git a/contrib/binutils/gas/config/tc-arc.h b/contrib/binutils/gas/config/tc-arc.h index 5066201e73bb..463400c5fcfc 100644 --- a/contrib/binutils/gas/config/tc-arc.h +++ b/contrib/binutils/gas/config/tc-arc.h @@ -1,5 +1,5 @@ /* tc-arc.h - Macros and type defines for the ARC. - Copyright (C) 1994, 1995, 1997, 1999 Free Software Foundation, Inc. + Copyright 1994, 1995, 1997, 2000, 2001 Free Software Foundation, Inc. Contributed by Doug Evans (dje@cygnus.com). This file is part of GAS, the GNU Assembler. @@ -17,7 +17,7 @@ You should have received a copy of the GNU General Public License along with GAS; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA - 02111-1307, USA. */ + 02111-1307, USA. */ #define TC_ARC 1 @@ -27,7 +27,19 @@ #define TARGET_ARCH bfd_arch_arc +#define DIFF_EXPR_OK +#define REGISTER_PREFIX '%' + +#ifdef LITTLE_ENDIAN +#undef LITTLE_ENDIAN +#endif + +#ifdef BIG_ENDIAN +#undef BIG_ENDIAN +#endif + #define LITTLE_ENDIAN 1234 + #define BIG_ENDIAN 4321 /* The endianness of the target format may change based on command @@ -55,17 +67,4 @@ extern void arc_cons_fix_new (); #define TC_CONS_FIX_NEW(FRAG, WHERE, NBYTES, EXP) \ arc_cons_fix_new (FRAG, WHERE, NBYTES, EXP) -#if 0 -/* Extra stuff that we need to keep track of for each symbol. */ -struct arc_tc_sy -{ - /* The real name, if the symbol was renamed. */ - char *real_name; -}; - -#define TC_SYMFIELD_TYPE struct arc_tc_sy - -/* Finish up the symbol. */ -extern int arc_frob_symbol PARAMS ((symbolS *)); -#define tc_frob_symbol(sym, punt) punt = arc_frob_symbol (sym) -#endif +#define DWARF2_LINE_MIN_INSN_LENGTH 4 diff --git a/contrib/binutils/gas/config/tc-i386.c b/contrib/binutils/gas/config/tc-i386.c index c23541382b48..bbd4fc49a34d 100644 --- a/contrib/binutils/gas/config/tc-i386.c +++ b/contrib/binutils/gas/config/tc-i386.c @@ -1903,19 +1903,6 @@ md_assemble (line) } } - if (i.reg_operands && flag_code < CODE_64BIT) - { - int op; - for (op = i.operands; --op >= 0;) - if ((i.types[op] & Reg) - && (i.op[op].regs->reg_flags & (RegRex64|RegRex))) - { - as_bad (_("Extended register `%%%s' available only in 64bit mode."), - i.op[op].regs->reg_name); - return; - } - } - /* If matched instruction specifies an explicit instruction mnemonic suffix, use it. */ if (i.tm.opcode_modifier & (Size16 | Size32 | Size64)) @@ -4481,6 +4468,13 @@ parse_register (reg_string, end_op) } } + if (r != NULL + && r->reg_flags & (RegRex64|RegRex) + && flag_code != CODE_64BIT) + { + return (const reg_entry *) NULL; + } + return r; } diff --git a/contrib/binutils/gas/configure b/contrib/binutils/gas/configure index e8cb78b6c1e4..5545d4ba478e 100755 --- a/contrib/binutils/gas/configure +++ b/contrib/binutils/gas/configure @@ -2388,7 +2388,8 @@ EOF ;; i386-*-rtemself*) fmt=elf ;; - i386-*-rtems*) fmt=coff ;; + i386-*-rtemscoff*) fmt=coff ;; + i386-*-rtems*) fmt=elf ;; i386-*-gnu*) fmt=elf ;; i386-*-mach*) fmt=aout em=mach bfd_gas=yes ;; @@ -2430,8 +2431,9 @@ EOF m68k-*-sysv4*) # must be before -sysv* fmt=elf em=svr4 ;; m68k-*-elf*) fmt=elf ;; - m68k-*-coff | m68k-*-sysv* | m68k-*-rtems*) + m68k-*-coff | m68k-*-sysv* | m68k-*-rtemscoff*) fmt=coff ;; + m68k-*-rtems*) fmt=elf ;; m68k-*-hpux*) fmt=hp300 em=hp300 ;; m68k-*-linux*aout*) fmt=aout em=linux ;; m68k-*-linux-gnu*) fmt=elf em=linux ;; @@ -2515,10 +2517,10 @@ EOF sh-*-linux*) fmt=elf em=linux ;; sh-*-elf*) fmt=elf ;; - sh-*-coff*) fmt=coff ;; + sh-*-coff*) fmt=coff bfd_gas=yes;; sh-*-pe*) fmt=coff em=pe bfd_gas=yes;; sh-*-rtemself*) fmt=elf ;; - sh-*-rtems*) fmt=coff ;; + sh-*-rtems*) fmt=coff bfd_gas=yes;; ns32k-pc532-mach* | ns32k-pc532-ux*) fmt=aout em=pc532mach ;; ns32k-pc532-netbsd* | ns32k-pc532-lites*) fmt=aout em=nbsd532 ;; @@ -3071,7 +3073,7 @@ EOF # Extract the first word of "gcc", so it can be a program name with args. set dummy gcc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3074: checking for $ac_word" >&5 +echo "configure:3077: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3101,7 +3103,7 @@ if test -z "$CC"; then # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3104: checking for $ac_word" >&5 +echo "configure:3107: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3152,7 +3154,7 @@ fi # Extract the first word of "cl", so it can be a program name with args. set dummy cl; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3155: checking for $ac_word" >&5 +echo "configure:3158: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3184,7 +3186,7 @@ fi fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6 -echo "configure:3187: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 +echo "configure:3190: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 ac_ext=c # CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. @@ -3195,12 +3197,12 @@ cross_compiling=$ac_cv_prog_cc_cross cat > conftest.$ac_ext << EOF -#line 3198 "configure" +#line 3201 "configure" #include "confdefs.h" main(){return(0);} EOF -if { (eval echo configure:3203: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3206: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then ac_cv_prog_cc_works=yes # If we can't run a trivial program, we are probably using a cross compiler. if (./conftest; exit) 2>/dev/null; then @@ -3226,12 +3228,12 @@ if test $ac_cv_prog_cc_works = no; then { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; } fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6 -echo "configure:3229: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 +echo "configure:3232: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6 cross_compiling=$ac_cv_prog_cc_cross echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 -echo "configure:3234: checking whether we are using GNU C" >&5 +echo "configure:3237: checking whether we are using GNU C" >&5 if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3240,7 +3242,7 @@ else yes; #endif EOF -if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:3243: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then +if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:3246: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then ac_cv_prog_gcc=yes else ac_cv_prog_gcc=no @@ -3259,7 +3261,7 @@ ac_test_CFLAGS="${CFLAGS+set}" ac_save_CFLAGS="$CFLAGS" CFLAGS= echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6 -echo "configure:3262: checking whether ${CC-cc} accepts -g" >&5 +echo "configure:3265: checking whether ${CC-cc} accepts -g" >&5 if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3296,7 +3298,7 @@ do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3299: checking for $ac_word" >&5 +echo "configure:3302: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_YACC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3327,7 +3329,7 @@ done test -n "$YACC" || YACC="yacc" echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6 -echo "configure:3330: checking how to run the C preprocessor" >&5 +echo "configure:3333: checking how to run the C preprocessor" >&5 # On Suns, sometimes $CPP names a directory. if test -n "$CPP" && test -d "$CPP"; then CPP= @@ -3342,13 +3344,13 @@ else # On the NeXT, cc -E runs the code through the compiler's parser, # not just through cpp. cat > conftest.$ac_ext <<EOF -#line 3345 "configure" +#line 3348 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3351: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3354: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -3359,13 +3361,13 @@ else rm -rf conftest* CPP="${CC-cc} -E -traditional-cpp" cat > conftest.$ac_ext <<EOF -#line 3362 "configure" +#line 3365 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3368: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3371: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -3376,13 +3378,13 @@ else rm -rf conftest* CPP="${CC-cc} -nologo -E" cat > conftest.$ac_ext <<EOF -#line 3379 "configure" +#line 3382 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3385: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3388: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -3412,7 +3414,7 @@ do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3415: checking for $ac_word" >&5 +echo "configure:3418: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_LEX'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3445,7 +3447,7 @@ test -n "$LEX" || LEX=""$missing_dir/missing flex"" # Extract the first word of "flex", so it can be a program name with args. set dummy flex; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3448: checking for $ac_word" >&5 +echo "configure:3451: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_LEX'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3479,7 +3481,7 @@ then *) ac_lib=l ;; esac echo $ac_n "checking for yywrap in -l$ac_lib""... $ac_c" 1>&6 -echo "configure:3482: checking for yywrap in -l$ac_lib" >&5 +echo "configure:3485: checking for yywrap in -l$ac_lib" >&5 ac_lib_var=`echo $ac_lib'_'yywrap | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -3487,7 +3489,7 @@ else ac_save_LIBS="$LIBS" LIBS="-l$ac_lib $LIBS" cat > conftest.$ac_ext <<EOF -#line 3490 "configure" +#line 3493 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -3498,7 +3500,7 @@ int main() { yywrap() ; return 0; } EOF -if { (eval echo configure:3501: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3504: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -3521,7 +3523,7 @@ fi fi echo $ac_n "checking lex output file root""... $ac_c" 1>&6 -echo "configure:3524: checking lex output file root" >&5 +echo "configure:3527: checking lex output file root" >&5 if eval "test \"`echo '$''{'ac_cv_prog_lex_root'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3542,7 +3544,7 @@ echo "$ac_t""$ac_cv_prog_lex_root" 1>&6 LEX_OUTPUT_ROOT=$ac_cv_prog_lex_root echo $ac_n "checking whether yytext is a pointer""... $ac_c" 1>&6 -echo "configure:3545: checking whether yytext is a pointer" >&5 +echo "configure:3548: checking whether yytext is a pointer" >&5 if eval "test \"`echo '$''{'ac_cv_prog_lex_yytext_pointer'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3554,14 +3556,14 @@ echo 'extern char *yytext;' >>$LEX_OUTPUT_ROOT.c ac_save_LIBS="$LIBS" LIBS="$LIBS $LEXLIB" cat > conftest.$ac_ext <<EOF -#line 3557 "configure" +#line 3560 "configure" #include "confdefs.h" `cat $LEX_OUTPUT_ROOT.c` int main() { ; return 0; } EOF -if { (eval echo configure:3564: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3567: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_prog_lex_yytext_pointer=yes else @@ -3587,7 +3589,7 @@ ALL_LINGUAS= # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3590: checking for $ac_word" >&5 +echo "configure:3593: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3615,12 +3617,12 @@ else fi echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6 -echo "configure:3618: checking for ANSI C header files" >&5 +echo "configure:3621: checking for ANSI C header files" >&5 if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3623 "configure" +#line 3626 "configure" #include "confdefs.h" #include <stdlib.h> #include <stdarg.h> @@ -3628,7 +3630,7 @@ else #include <float.h> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3631: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3634: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -3645,7 +3647,7 @@ rm -f conftest* if test $ac_cv_header_stdc = yes; then # SunOS 4.x string.h does not declare mem*, contrary to ANSI. cat > conftest.$ac_ext <<EOF -#line 3648 "configure" +#line 3651 "configure" #include "confdefs.h" #include <string.h> EOF @@ -3663,7 +3665,7 @@ fi if test $ac_cv_header_stdc = yes; then # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. cat > conftest.$ac_ext <<EOF -#line 3666 "configure" +#line 3669 "configure" #include "confdefs.h" #include <stdlib.h> EOF @@ -3684,7 +3686,7 @@ if test "$cross_compiling" = yes; then : else cat > conftest.$ac_ext <<EOF -#line 3687 "configure" +#line 3690 "configure" #include "confdefs.h" #include <ctype.h> #define ISLOWER(c) ('a' <= (c) && (c) <= 'z') @@ -3695,7 +3697,7 @@ if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2); exit (0); } EOF -if { (eval echo configure:3698: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:3701: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then : else @@ -3719,12 +3721,12 @@ EOF fi echo $ac_n "checking for working const""... $ac_c" 1>&6 -echo "configure:3722: checking for working const" >&5 +echo "configure:3725: checking for working const" >&5 if eval "test \"`echo '$''{'ac_cv_c_const'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3727 "configure" +#line 3730 "configure" #include "confdefs.h" int main() { @@ -3773,7 +3775,7 @@ ccp = (char const *const *) p; ; return 0; } EOF -if { (eval echo configure:3776: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:3779: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_const=yes else @@ -3794,21 +3796,21 @@ EOF fi echo $ac_n "checking for inline""... $ac_c" 1>&6 -echo "configure:3797: checking for inline" >&5 +echo "configure:3800: checking for inline" >&5 if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else ac_cv_c_inline=no for ac_kw in inline __inline__ __inline; do cat > conftest.$ac_ext <<EOF -#line 3804 "configure" +#line 3807 "configure" #include "confdefs.h" int main() { } $ac_kw foo() { ; return 0; } EOF -if { (eval echo configure:3811: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:3814: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_inline=$ac_kw; break else @@ -3834,12 +3836,12 @@ EOF esac echo $ac_n "checking for off_t""... $ac_c" 1>&6 -echo "configure:3837: checking for off_t" >&5 +echo "configure:3840: checking for off_t" >&5 if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3842 "configure" +#line 3845 "configure" #include "confdefs.h" #include <sys/types.h> #if STDC_HEADERS @@ -3867,12 +3869,12 @@ EOF fi echo $ac_n "checking for size_t""... $ac_c" 1>&6 -echo "configure:3870: checking for size_t" >&5 +echo "configure:3873: checking for size_t" >&5 if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3875 "configure" +#line 3878 "configure" #include "confdefs.h" #include <sys/types.h> #if STDC_HEADERS @@ -3902,19 +3904,19 @@ fi # The Ultrix 4.2 mips builtin alloca declared by alloca.h only works # for constant arguments. Useless! echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6 -echo "configure:3905: checking for working alloca.h" >&5 +echo "configure:3908: checking for working alloca.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3910 "configure" +#line 3913 "configure" #include "confdefs.h" #include <alloca.h> int main() { char *p = alloca(2 * sizeof(int)); ; return 0; } EOF -if { (eval echo configure:3917: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3920: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_header_alloca_h=yes else @@ -3935,12 +3937,12 @@ EOF fi echo $ac_n "checking for alloca""... $ac_c" 1>&6 -echo "configure:3938: checking for alloca" >&5 +echo "configure:3941: checking for alloca" >&5 if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3943 "configure" +#line 3946 "configure" #include "confdefs.h" #ifdef __GNUC__ @@ -3968,7 +3970,7 @@ int main() { char *p = (char *) alloca(1); ; return 0; } EOF -if { (eval echo configure:3971: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3974: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_func_alloca_works=yes else @@ -4000,12 +4002,12 @@ EOF echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6 -echo "configure:4003: checking whether alloca needs Cray hooks" >&5 +echo "configure:4006: checking whether alloca needs Cray hooks" >&5 if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4008 "configure" +#line 4011 "configure" #include "confdefs.h" #if defined(CRAY) && ! defined(CRAY2) webecray @@ -4030,12 +4032,12 @@ echo "$ac_t""$ac_cv_os_cray" 1>&6 if test $ac_cv_os_cray = yes; then for ac_func in _getb67 GETB67 getb67; do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4033: checking for $ac_func" >&5 +echo "configure:4036: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4038 "configure" +#line 4041 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -4058,7 +4060,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:4061: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4064: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4085,7 +4087,7 @@ done fi echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6 -echo "configure:4088: checking stack direction for C alloca" >&5 +echo "configure:4091: checking stack direction for C alloca" >&5 if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4093,7 +4095,7 @@ else ac_cv_c_stack_direction=0 else cat > conftest.$ac_ext <<EOF -#line 4096 "configure" +#line 4099 "configure" #include "confdefs.h" find_stack_direction () { @@ -4112,7 +4114,7 @@ main () exit (find_stack_direction() < 0); } EOF -if { (eval echo configure:4115: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:4118: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_c_stack_direction=1 else @@ -4137,17 +4139,17 @@ for ac_hdr in unistd.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:4140: checking for $ac_hdr" >&5 +echo "configure:4143: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4145 "configure" +#line 4148 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:4150: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:4153: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -4176,12 +4178,12 @@ done for ac_func in getpagesize do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4179: checking for $ac_func" >&5 +echo "configure:4182: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4184 "configure" +#line 4187 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -4204,7 +4206,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:4207: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4210: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4229,7 +4231,7 @@ fi done echo $ac_n "checking for working mmap""... $ac_c" 1>&6 -echo "configure:4232: checking for working mmap" >&5 +echo "configure:4235: checking for working mmap" >&5 if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4237,7 +4239,7 @@ else ac_cv_func_mmap_fixed_mapped=no else cat > conftest.$ac_ext <<EOF -#line 4240 "configure" +#line 4243 "configure" #include "confdefs.h" /* Thanks to Mike Haertel and Jim Avera for this test. @@ -4377,7 +4379,7 @@ main() } EOF -if { (eval echo configure:4380: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:4383: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_func_mmap_fixed_mapped=yes else @@ -4405,17 +4407,17 @@ unistd.h values.h sys/param.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:4408: checking for $ac_hdr" >&5 +echo "configure:4411: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4413 "configure" +#line 4416 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:4418: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:4421: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -4445,12 +4447,12 @@ done __argz_count __argz_stringify __argz_next do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4448: checking for $ac_func" >&5 +echo "configure:4451: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4453 "configure" +#line 4456 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -4473,7 +4475,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:4476: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4479: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4502,12 +4504,12 @@ done for ac_func in stpcpy do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4505: checking for $ac_func" >&5 +echo "configure:4508: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4510 "configure" +#line 4513 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -4530,7 +4532,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:4533: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4536: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4564,19 +4566,19 @@ EOF if test $ac_cv_header_locale_h = yes; then echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6 -echo "configure:4567: checking for LC_MESSAGES" >&5 +echo "configure:4570: checking for LC_MESSAGES" >&5 if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4572 "configure" +#line 4575 "configure" #include "confdefs.h" #include <locale.h> int main() { return LC_MESSAGES ; return 0; } EOF -if { (eval echo configure:4579: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4582: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* am_cv_val_LC_MESSAGES=yes else @@ -4597,7 +4599,7 @@ EOF fi fi echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6 -echo "configure:4600: checking whether NLS is requested" >&5 +echo "configure:4603: checking whether NLS is requested" >&5 # Check whether --enable-nls or --disable-nls was given. if test "${enable_nls+set}" = set; then enableval="$enable_nls" @@ -4617,7 +4619,7 @@ fi EOF echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6 -echo "configure:4620: checking whether included gettext is requested" >&5 +echo "configure:4623: checking whether included gettext is requested" >&5 # Check whether --with-included-gettext or --without-included-gettext was given. if test "${with_included_gettext+set}" = set; then withval="$with_included_gettext" @@ -4636,17 +4638,17 @@ fi ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'` echo $ac_n "checking for libintl.h""... $ac_c" 1>&6 -echo "configure:4639: checking for libintl.h" >&5 +echo "configure:4642: checking for libintl.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4644 "configure" +#line 4647 "configure" #include "confdefs.h" #include <libintl.h> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:4649: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:4652: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -4663,19 +4665,19 @@ fi if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then echo "$ac_t""yes" 1>&6 echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6 -echo "configure:4666: checking for gettext in libc" >&5 +echo "configure:4669: checking for gettext in libc" >&5 if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4671 "configure" +#line 4674 "configure" #include "confdefs.h" #include <libintl.h> int main() { return (int) gettext ("") ; return 0; } EOF -if { (eval echo configure:4678: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4681: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gt_cv_func_gettext_libc=yes else @@ -4691,7 +4693,7 @@ echo "$ac_t""$gt_cv_func_gettext_libc" 1>&6 if test "$gt_cv_func_gettext_libc" != "yes"; then echo $ac_n "checking for bindtextdomain in -lintl""... $ac_c" 1>&6 -echo "configure:4694: checking for bindtextdomain in -lintl" >&5 +echo "configure:4697: checking for bindtextdomain in -lintl" >&5 ac_lib_var=`echo intl'_'bindtextdomain | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -4699,7 +4701,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lintl $LIBS" cat > conftest.$ac_ext <<EOF -#line 4702 "configure" +#line 4705 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -4710,7 +4712,7 @@ int main() { bindtextdomain() ; return 0; } EOF -if { (eval echo configure:4713: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4716: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -4726,19 +4728,19 @@ fi if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then echo "$ac_t""yes" 1>&6 echo $ac_n "checking for gettext in libintl""... $ac_c" 1>&6 -echo "configure:4729: checking for gettext in libintl" >&5 +echo "configure:4732: checking for gettext in libintl" >&5 if eval "test \"`echo '$''{'gt_cv_func_gettext_libintl'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4734 "configure" +#line 4737 "configure" #include "confdefs.h" int main() { return (int) gettext ("") ; return 0; } EOF -if { (eval echo configure:4741: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4744: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gt_cv_func_gettext_libintl=yes else @@ -4766,7 +4768,7 @@ EOF # Extract the first word of "msgfmt", so it can be a program name with args. set dummy msgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4769: checking for $ac_word" >&5 +echo "configure:4772: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4800,12 +4802,12 @@ fi for ac_func in dcgettext do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4803: checking for $ac_func" >&5 +echo "configure:4806: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4808 "configure" +#line 4811 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -4828,7 +4830,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:4831: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4834: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4855,7 +4857,7 @@ done # Extract the first word of "gmsgfmt", so it can be a program name with args. set dummy gmsgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4858: checking for $ac_word" >&5 +echo "configure:4861: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4891,7 +4893,7 @@ fi # Extract the first word of "xgettext", so it can be a program name with args. set dummy xgettext; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4894: checking for $ac_word" >&5 +echo "configure:4897: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4923,7 +4925,7 @@ else fi cat > conftest.$ac_ext <<EOF -#line 4926 "configure" +#line 4929 "configure" #include "confdefs.h" int main() { @@ -4931,7 +4933,7 @@ extern int _nl_msg_cat_cntr; return _nl_msg_cat_cntr ; return 0; } EOF -if { (eval echo configure:4934: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4937: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* CATOBJEXT=.gmo DATADIRNAME=share @@ -4963,7 +4965,7 @@ fi # Extract the first word of "msgfmt", so it can be a program name with args. set dummy msgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4966: checking for $ac_word" >&5 +echo "configure:4969: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4997,7 +4999,7 @@ fi # Extract the first word of "gmsgfmt", so it can be a program name with args. set dummy gmsgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:5000: checking for $ac_word" >&5 +echo "configure:5003: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5033,7 +5035,7 @@ fi # Extract the first word of "xgettext", so it can be a program name with args. set dummy xgettext; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:5036: checking for $ac_word" >&5 +echo "configure:5039: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5123,7 +5125,7 @@ fi LINGUAS= else echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6 -echo "configure:5126: checking for catalogs to be installed" >&5 +echo "configure:5129: checking for catalogs to be installed" >&5 NEW_LINGUAS= for lang in ${LINGUAS=$ALL_LINGUAS}; do case "$ALL_LINGUAS" in @@ -5151,17 +5153,17 @@ echo "configure:5126: checking for catalogs to be installed" >&5 if test "$CATOBJEXT" = ".cat"; then ac_safe=`echo "linux/version.h" | sed 'y%./+-%__p_%'` echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6 -echo "configure:5154: checking for linux/version.h" >&5 +echo "configure:5157: checking for linux/version.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5159 "configure" +#line 5162 "configure" #include "confdefs.h" #include <linux/version.h> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:5164: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:5167: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -5224,7 +5226,7 @@ fi echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6 -echo "configure:5227: checking whether to enable maintainer-specific portions of Makefiles" >&5 +echo "configure:5230: checking whether to enable maintainer-specific portions of Makefiles" >&5 # Check whether --enable-maintainer-mode or --disable-maintainer-mode was given. if test "${enable_maintainer_mode+set}" = set; then enableval="$enable_maintainer_mode" @@ -5249,7 +5251,7 @@ fi echo $ac_n "checking for executable suffix""... $ac_c" 1>&6 -echo "configure:5252: checking for executable suffix" >&5 +echo "configure:5255: checking for executable suffix" >&5 if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5259,7 +5261,7 @@ else rm -f conftest* echo 'int main () { return 0; }' > conftest.$ac_ext ac_cv_exeext= - if { (eval echo configure:5262: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then + if { (eval echo configure:5265: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then for file in conftest.*; do case $file in *.c | *.o | *.obj | *.ilk | *.pdb) ;; @@ -5284,17 +5286,17 @@ for ac_hdr in string.h stdlib.h memory.h strings.h unistd.h stdarg.h varargs.h e do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:5287: checking for $ac_hdr" >&5 +echo "configure:5290: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5292 "configure" +#line 5295 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:5297: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:5300: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -5324,7 +5326,7 @@ done # Put this here so that autoconf's "cross-compiling" message doesn't confuse # people who are not cross-compiling but are compiling cross-assemblers. echo $ac_n "checking whether compiling a cross-assembler""... $ac_c" 1>&6 -echo "configure:5327: checking whether compiling a cross-assembler" >&5 +echo "configure:5330: checking whether compiling a cross-assembler" >&5 if test "${host}" = "${target}"; then cross_gas=no else @@ -5339,19 +5341,19 @@ echo "$ac_t""$cross_gas" 1>&6 # The Ultrix 4.2 mips builtin alloca declared by alloca.h only works # for constant arguments. Useless! echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6 -echo "configure:5342: checking for working alloca.h" >&5 +echo "configure:5345: checking for working alloca.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5347 "configure" +#line 5350 "configure" #include "confdefs.h" #include <alloca.h> int main() { char *p = alloca(2 * sizeof(int)); ; return 0; } EOF -if { (eval echo configure:5354: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5357: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_header_alloca_h=yes else @@ -5372,12 +5374,12 @@ EOF fi echo $ac_n "checking for alloca""... $ac_c" 1>&6 -echo "configure:5375: checking for alloca" >&5 +echo "configure:5378: checking for alloca" >&5 if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5380 "configure" +#line 5383 "configure" #include "confdefs.h" #ifdef __GNUC__ @@ -5405,7 +5407,7 @@ int main() { char *p = (char *) alloca(1); ; return 0; } EOF -if { (eval echo configure:5408: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5411: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_func_alloca_works=yes else @@ -5437,12 +5439,12 @@ EOF echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6 -echo "configure:5440: checking whether alloca needs Cray hooks" >&5 +echo "configure:5443: checking whether alloca needs Cray hooks" >&5 if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5445 "configure" +#line 5448 "configure" #include "confdefs.h" #if defined(CRAY) && ! defined(CRAY2) webecray @@ -5467,12 +5469,12 @@ echo "$ac_t""$ac_cv_os_cray" 1>&6 if test $ac_cv_os_cray = yes; then for ac_func in _getb67 GETB67 getb67; do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:5470: checking for $ac_func" >&5 +echo "configure:5473: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5475 "configure" +#line 5478 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -5495,7 +5497,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:5498: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5501: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -5522,7 +5524,7 @@ done fi echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6 -echo "configure:5525: checking stack direction for C alloca" >&5 +echo "configure:5528: checking stack direction for C alloca" >&5 if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5530,7 +5532,7 @@ else ac_cv_c_stack_direction=0 else cat > conftest.$ac_ext <<EOF -#line 5533 "configure" +#line 5536 "configure" #include "confdefs.h" find_stack_direction () { @@ -5549,7 +5551,7 @@ main () exit (find_stack_direction() < 0); } EOF -if { (eval echo configure:5552: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:5555: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_c_stack_direction=1 else @@ -5571,21 +5573,21 @@ EOF fi echo $ac_n "checking for inline""... $ac_c" 1>&6 -echo "configure:5574: checking for inline" >&5 +echo "configure:5577: checking for inline" >&5 if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else ac_cv_c_inline=no for ac_kw in inline __inline__ __inline; do cat > conftest.$ac_ext <<EOF -#line 5581 "configure" +#line 5584 "configure" #include "confdefs.h" int main() { } $ac_kw foo() { ; return 0; } EOF -if { (eval echo configure:5588: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:5591: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_inline=$ac_kw; break else @@ -5615,12 +5617,12 @@ esac for ac_func in unlink remove do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:5618: checking for $ac_func" >&5 +echo "configure:5621: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5623 "configure" +#line 5626 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -5643,7 +5645,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:5646: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5649: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -5672,12 +5674,12 @@ done for ac_func in sbrk do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:5675: checking for $ac_func" >&5 +echo "configure:5678: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5680 "configure" +#line 5683 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -5700,7 +5702,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:5703: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5706: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -5735,7 +5737,7 @@ case "$host" in ;; *-ncr-sysv4.3*) echo $ac_n "checking for _mwvalidcheckl in -lmw""... $ac_c" 1>&6 -echo "configure:5738: checking for _mwvalidcheckl in -lmw" >&5 +echo "configure:5741: checking for _mwvalidcheckl in -lmw" >&5 ac_lib_var=`echo mw'_'_mwvalidcheckl | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -5743,7 +5745,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lmw $LIBS" cat > conftest.$ac_ext <<EOF -#line 5746 "configure" +#line 5749 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -5754,7 +5756,7 @@ int main() { _mwvalidcheckl() ; return 0; } EOF -if { (eval echo configure:5757: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5760: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -5775,7 +5777,7 @@ else fi echo $ac_n "checking for main in -lm""... $ac_c" 1>&6 -echo "configure:5778: checking for main in -lm" >&5 +echo "configure:5781: checking for main in -lm" >&5 ac_lib_var=`echo m'_'main | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -5783,14 +5785,14 @@ else ac_save_LIBS="$LIBS" LIBS="-lm $LIBS" cat > conftest.$ac_ext <<EOF -#line 5786 "configure" +#line 5789 "configure" #include "confdefs.h" int main() { main() ; return 0; } EOF -if { (eval echo configure:5793: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5796: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -5813,7 +5815,7 @@ fi ;; *) echo $ac_n "checking for main in -lm""... $ac_c" 1>&6 -echo "configure:5816: checking for main in -lm" >&5 +echo "configure:5819: checking for main in -lm" >&5 ac_lib_var=`echo m'_'main | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -5821,14 +5823,14 @@ else ac_save_LIBS="$LIBS" LIBS="-lm $LIBS" cat > conftest.$ac_ext <<EOF -#line 5824 "configure" +#line 5827 "configure" #include "confdefs.h" int main() { main() ; return 0; } EOF -if { (eval echo configure:5831: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5834: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -5859,12 +5861,12 @@ esac # enough, but on some of those systems, the assert macro relies on requoting # working properly! echo $ac_n "checking for working assert macro""... $ac_c" 1>&6 -echo "configure:5862: checking for working assert macro" >&5 +echo "configure:5865: checking for working assert macro" >&5 if eval "test \"`echo '$''{'gas_cv_assert_ok'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5867 "configure" +#line 5870 "configure" #include "confdefs.h" #include <assert.h> #include <stdio.h> @@ -5880,7 +5882,7 @@ assert (a == b ; return 0; } EOF -if { (eval echo configure:5883: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5886: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_assert_ok=yes else @@ -5921,12 +5923,12 @@ gas_test_headers=" " echo $ac_n "checking whether declaration is required for strstr""... $ac_c" 1>&6 -echo "configure:5924: checking whether declaration is required for strstr" >&5 +echo "configure:5927: checking whether declaration is required for strstr" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_strstr'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5929 "configure" +#line 5932 "configure" #include "confdefs.h" $gas_test_headers int main() { @@ -5937,7 +5939,7 @@ x = (f) strstr; ; return 0; } EOF -if { (eval echo configure:5940: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5943: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_strstr=no else @@ -5958,12 +5960,12 @@ fi echo $ac_n "checking whether declaration is required for malloc""... $ac_c" 1>&6 -echo "configure:5961: checking whether declaration is required for malloc" >&5 +echo "configure:5964: checking whether declaration is required for malloc" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_malloc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5966 "configure" +#line 5969 "configure" #include "confdefs.h" $gas_test_headers int main() { @@ -5974,7 +5976,7 @@ x = (f) malloc; ; return 0; } EOF -if { (eval echo configure:5977: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5980: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_malloc=no else @@ -5995,12 +5997,12 @@ fi echo $ac_n "checking whether declaration is required for free""... $ac_c" 1>&6 -echo "configure:5998: checking whether declaration is required for free" >&5 +echo "configure:6001: checking whether declaration is required for free" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_free'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 6003 "configure" +#line 6006 "configure" #include "confdefs.h" $gas_test_headers int main() { @@ -6011,7 +6013,7 @@ x = (f) free; ; return 0; } EOF -if { (eval echo configure:6014: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6017: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_free=no else @@ -6032,12 +6034,12 @@ fi echo $ac_n "checking whether declaration is required for sbrk""... $ac_c" 1>&6 -echo "configure:6035: checking whether declaration is required for sbrk" >&5 +echo "configure:6038: checking whether declaration is required for sbrk" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_sbrk'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 6040 "configure" +#line 6043 "configure" #include "confdefs.h" $gas_test_headers int main() { @@ -6048,7 +6050,7 @@ x = (f) sbrk; ; return 0; } EOF -if { (eval echo configure:6051: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6054: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_sbrk=no else @@ -6069,12 +6071,12 @@ fi echo $ac_n "checking whether declaration is required for environ""... $ac_c" 1>&6 -echo "configure:6072: checking whether declaration is required for environ" >&5 +echo "configure:6075: checking whether declaration is required for environ" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_environ'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 6077 "configure" +#line 6080 "configure" #include "confdefs.h" $gas_test_headers int main() { @@ -6085,7 +6087,7 @@ x = (f) environ; ; return 0; } EOF -if { (eval echo configure:6088: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6091: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_environ=no else @@ -6109,12 +6111,12 @@ fi # for it? echo $ac_n "checking whether declaration is required for errno""... $ac_c" 1>&6 -echo "configure:6112: checking whether declaration is required for errno" >&5 +echo "configure:6115: checking whether declaration is required for errno" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_errno'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 6117 "configure" +#line 6120 "configure" #include "confdefs.h" #ifdef HAVE_ERRNO_H @@ -6129,7 +6131,7 @@ x = (f) errno; ; return 0; } EOF -if { (eval echo configure:6132: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6135: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_errno=no else diff --git a/contrib/binutils/gas/configure.in b/contrib/binutils/gas/configure.in index f0d09142eb24..4250cf26b209 100644 --- a/contrib/binutils/gas/configure.in +++ b/contrib/binutils/gas/configure.in @@ -269,7 +269,8 @@ changequote([,])dnl AC_DEFINE(STRICTCOFF, 1, [Using strict COFF?]) ;; i386-*-rtemself*) fmt=elf ;; - i386-*-rtems*) fmt=coff ;; + i386-*-rtemscoff*) fmt=coff ;; + i386-*-rtems*) fmt=elf ;; i386-*-gnu*) fmt=elf ;; i386-*-mach*) fmt=aout em=mach bfd_gas=yes ;; @@ -311,8 +312,9 @@ changequote([,])dnl m68k-*-sysv4*) # must be before -sysv* fmt=elf em=svr4 ;; m68k-*-elf*) fmt=elf ;; - m68k-*-coff | m68k-*-sysv* | m68k-*-rtems*) + m68k-*-coff | m68k-*-sysv* | m68k-*-rtemscoff*) fmt=coff ;; + m68k-*-rtems*) fmt=elf ;; m68k-*-hpux*) fmt=hp300 em=hp300 ;; m68k-*-linux*aout*) fmt=aout em=linux ;; m68k-*-linux-gnu*) fmt=elf em=linux ;; @@ -390,10 +392,10 @@ changequote([,])dnl sh-*-linux*) fmt=elf em=linux ;; sh-*-elf*) fmt=elf ;; - sh-*-coff*) fmt=coff ;; + sh-*-coff*) fmt=coff bfd_gas=yes;; sh-*-pe*) fmt=coff em=pe bfd_gas=yes;; sh-*-rtemself*) fmt=elf ;; - sh-*-rtems*) fmt=coff ;; + sh-*-rtems*) fmt=coff bfd_gas=yes;; ns32k-pc532-mach* | ns32k-pc532-ux*) fmt=aout em=pc532mach ;; ns32k-pc532-netbsd* | ns32k-pc532-lites*) fmt=aout em=nbsd532 ;; diff --git a/contrib/binutils/gas/doc/c-arc.texi b/contrib/binutils/gas/doc/c-arc.texi new file mode 100644 index 000000000000..700a01d15d8c --- /dev/null +++ b/contrib/binutils/gas/doc/c-arc.texi @@ -0,0 +1,207 @@ +@c Copyright 2000, 2001 Free Software Foundation, Inc. +@c This is part of the GAS manual. +@c For copying conditions, see the file as.texinfo. + +@ifset GENERIC +@page +@node ARC-Dependent +@chapter ARC Dependent Features +@end ifset + +@ifclear GENERIC +@node Machine Dependencies +@chapter ARC Dependent Features +@end ifclear + +@set ARC_CORE_DEFAULT 6 + +@cindex ARC support +@menu +* ARC Options:: Options +* ARC Syntax:: Syntax +* ARC Floating Point:: Floating Point +* ARC Directives:: ARC Machine Directives +* ARC Opcodes:: Opcodes +@end menu + + +@node ARC Options +@section Options +@cindex ARC options (none) +@cindex options for ARC (none) + +@table @code + +@cindex @code{-marc[5|6|7|8]} command line option, ARC +@item -marc[5|6|7|8] +This option selects the core processor variant. Using +@code{-marc} is the same as @code{-marc@value{ARC_CORE_DEFAULT}}, which +is also the default. + +@table @code + +@cindex @code{arc5} arc5, ARC +@item arc5 +Base instruction set. + +@cindex @code{arc6} arc6, ARC +@item arc6 +Jump-and-link (jl) instruction. No requirement of an instruction between +setting flags and conditional jump. For example: + +@smallexample + mov.f r0,r1 + beq foo +@end smallexample + +@cindex @code{arc7} arc7, ARC +@item arc7 +Break (brk) and sleep (sleep) instructions. + +@cindex @code{arc8} arc8, ARC +@item arc8 +Software interrupt (swi) instruction. + +@end table + +Note: the @code{.option} directive can to be used to select a core +variant from within assembly code. + +@cindex @code{-EB} command line option, ARC +@item -EB +This option specifies that the output generated by the assembler should +be marked as being encoded for a big-endian processor. + +@cindex @code{-EL} command line option, ARC +@item -EL +This option specifies that the output generated by the assembler should +be marked as being encoded for a little-endian processor - this is the +default. + +@end table + + +@node ARC Syntax +@section Syntax +@menu +* ARC-Chars:: Special Characters +* ARC-Regs:: Register Names +@end menu + +@node ARC-Chars +@subsection Special Characters + +@cindex ARC special characters +@cindex special characters, ARC +*TODO* + +@node ARC-Regs +@subsection Register Names + +@cindex ARC register names +@cindex register names, ARC +*TODO* + + +@node ARC Floating Point +@section Floating Point + +@cindex floating point, ARC (@sc{ieee}) +@cindex ARC floating point (@sc{ieee}) +The ARC core does not currently have hardware floating point +support. Software floating point support is provided by @code{GCC} +and uses @sc{ieee} floating-point numbers. + + +@node ARC Directives +@section ARC Machine Directives + +@cindex machine directives, ARC +@cindex ARC machine directives +The ARC version of @code{@value{AS}} supports the following additional +machine directives: + +@table @code + +@cindex @code{2byte} directive, ARC +@item .2byte @var{expressions} +*TODO* + +@cindex @code{3byte} directive, ARC +@item .3byte @var{expressions} +*TODO* + +@cindex @code{4byte} directive, ARC +@item .4byte @var{expressions} +*TODO* + +@cindex @code{extAuxRegister} directive, ARC +@item .extAuxRegister @var{name},@var{address},@var{mode} +*TODO* + +@smallexample + .extAuxRegister mulhi,0x12,w +@end smallexample + +@cindex @code{extCondCode} directive, ARC +@item .extCondCode @var{suffix},@var{value} +*TODO* + +@smallexample + .extCondCode is_busy,0x14 +@end smallexample + +@cindex @code{extCoreRegister} directive, ARC +@item .extCoreRegister @var{name},@var{regnum},@var{mode},@var{shortcut} +*TODO* + +@smallexample + .extCoreRegister mlo,57,r,can_shortcut +@end smallexample + +@cindex @code{extInstruction} directive, ARC +@item .extInstruction @var{name},@var{opcode},@var{subopcode},@var{suffixclass},@var{syntaxclass} +*TODO* + +@smallexample + .extInstruction mul64,0x14,0x0,SUFFIX_COND,SYNTAX_3OP|OP1_MUST_BE_IMM +@end smallexample + +@cindex @code{half} directive, ARC +@item .half @var{expressions} +*TODO* + +@cindex @code{long} directive, ARC +@item .long @var{expressions} +*TODO* + +@cindex @code{option} directive, ARC +@item .option @var{arc|arc5|arc6|arc7|arc8} +The @code{.option} directive must be followed by the desired core +version. Again @code{arc} is an alias for +@code{arc@value{ARC_CORE_DEFAULT}}. + +Note: the @code{.option} directive overrides the command line option +@code{-marc}; a warning is emitted when the version is not consistent +between the two - even for the implicit default core version +(arc@value{ARC_CORE_DEFAULT}). + +@cindex @code{short} directive, ARC +@item .short @var{expressions} +*TODO* + +@cindex @code{word} directive, ARC +@item .word @var{expressions} +*TODO* + +@end table + + +@node ARC Opcodes +@section Opcodes + +@cindex ARC opcodes +@cindex opcodes for ARC + +For information on the ARC instruction set, see @cite{ARC Programmers +Reference Manual}, ARC Cores Ltd. diff --git a/contrib/binutils/include/coff/rs6k64.h b/contrib/binutils/include/coff/rs6k64.h new file mode 100644 index 000000000000..ed1098e6d301 --- /dev/null +++ b/contrib/binutils/include/coff/rs6k64.h @@ -0,0 +1,251 @@ +/* IBM RS/6000 "XCOFF64" file definitions for BFD. + Copyright (C) 2000 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +*/ + +/********************** FILE HEADER **********************/ + +struct external_filehdr { + char f_magic[2]; /* magic number */ + char f_nscns[2]; /* number of sections */ + char f_timdat[4]; /* time & date stamp */ + char f_symptr[8];/* file pointer to symtab */ + char f_opthdr[2]; /* sizeof(optional hdr) */ + char f_flags[2]; /* flags */ + char f_nsyms[4]; /* number of symtab entries */ +}; + + /* IBM RS/6000 */ +#define U803XTOCMAGIC 0757 /* readonly text segments and TOC, XCOFF64 */ + +#define BADMAG(x) ((x).f_magic != U803XTOCMAGIC) + +#define FILHDR struct external_filehdr +#define FILHSZ 24 + +/********************** AOUT "OPTIONAL HEADER" **********************/ + + +typedef struct +{ + unsigned char magic[2]; /* type of file */ + unsigned char vstamp[2]; /* version stamp */ + unsigned char o_debugger[4]; /* reserved */ + unsigned char text_start[8]; /* base of text used for this file */ + unsigned char data_start[8]; /* base of data used for this file */ + unsigned char o_toc[8]; /* address of TOC */ + unsigned char o_snentry[2]; /* section number of entry point */ + unsigned char o_sntext[2]; /* section number of .text section */ + unsigned char o_sndata[2]; /* section number of .data section */ + unsigned char o_sntoc[2]; /* section number of TOC */ + unsigned char o_snloader[2]; /* section number of .loader section */ + unsigned char o_snbss[2]; /* section number of .bss section */ + unsigned char o_algntext[2]; /* .text alignment */ + unsigned char o_algndata[2]; /* .data alignment */ + unsigned char o_modtype[2]; /* module type (??) */ + unsigned char o_cputype[2]; /* cpu type */ + unsigned char o_resv2[4]; /* reserved */ + unsigned char tsize[8]; /* text size bytes, padded to FW bdry */ + unsigned char dsize[8]; /* initialized data " " */ + unsigned char bsize[8]; /* uninitialized data " " */ + unsigned char entry[8]; /* entry pt. */ + unsigned char o_maxstack[8]; /* max stack size (??) */ + unsigned char o_maxdata[8]; /* max data size (??) */ + unsigned char o_resv3[16]; /* reserved */ +} +AOUTHDR; + +#define AOUTSZ 120 +#define SMALL_AOUTSZ (0) +#define AOUTHDRSZ 72 + +#define RS6K_AOUTHDR_OMAGIC 0x0107 /* old: text & data writeable */ +#define RS6K_AOUTHDR_NMAGIC 0x0108 /* new: text r/o, data r/w */ +#define RS6K_AOUTHDR_ZMAGIC 0x010B /* paged: text r/o, both page-aligned */ + + +/********************** SECTION HEADER **********************/ + + +struct external_scnhdr { + char s_name[8]; /* section name */ + char s_paddr[8]; /* physical address, aliased s_nlib */ + char s_vaddr[8]; /* virtual address */ + char s_size[8]; /* section size */ + char s_scnptr[8]; /* file ptr to raw data for section */ + char s_relptr[8]; /* file ptr to relocation */ + char s_lnnoptr[8]; /* file ptr to line numbers */ + char s_nreloc[4]; /* number of relocation entries */ + char s_nlnno[4]; /* number of line number entries*/ + char s_flags[4]; /* flags */ + char s_pad[4]; /* padding */ +}; + +/* + * names of "special" sections + */ +#define _TEXT ".text" +#define _DATA ".data" +#define _BSS ".bss" +#define _PAD ".pad" +#define _LOADER ".loader" + +#define SCNHDR struct external_scnhdr + +#define SCNHSZ 72 + +/* XCOFF uses a special .loader section with type STYP_LOADER. */ +#define STYP_LOADER 0x1000 + +/* XCOFF uses a special .debug section with type STYP_DEBUG. */ +#define STYP_DEBUG 0x2000 + +/* XCOFF handles line number or relocation overflow by creating + another section header with STYP_OVRFLO set. */ +#define STYP_OVRFLO 0x8000 + +/********************** LINE NUMBERS **********************/ + +/* 1 line number entry for every "breakpointable" source line in a section. + * Line numbers are grouped on a per function basis; first entry in a function + * grouping will have l_lnno = 0 and in place of physical address will be the + * symbol table index of the function name. + */ +struct external_lineno { + union { + char l_symndx[8];/* function name symbol index, iff l_lnno == 0*/ + char l_paddr[8]; /* (physical) address of line number */ + } l_addr; + char l_lnno[4]; /* line number */ +}; + + +#define LINENO struct external_lineno + +#define LINESZ 12 + + +/********************** SYMBOLS **********************/ + +#define E_SYMNMLEN 8 /* # characters in a symbol name */ +#define E_FILNMLEN 14 /* # characters in a file name */ +#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */ + +struct external_syment +{ + union { + char e_value[8]; + } e; + char e_offset[4]; + char e_scnum[2]; + char e_type[2]; + char e_sclass[1]; + char e_numaux[1]; +}; + + + +#define N_BTMASK (017) +#define N_TMASK (060) +#define N_BTSHFT (4) +#define N_TSHIFT (2) + + +union external_auxent { + + struct { + union { + struct { + char x_lnno[4]; /* declaration line number */ + char x_size[2]; /* str/union/array size */ + } x_lnsz; + struct { + char x_lnnoptr[8];/* ptr to fcn line */ + char x_fsize[4]; /* size of function */ + char x_endndx[4]; /* entry ndx past block end */ + } x_fcn; + } x_fcnary; + } x_sym; + + union { + char x_fname[E_FILNMLEN]; + struct { + char x_zeroes[4]; + char x_offset[4]; + char x_pad[6]; + unsigned char x_ftype[1]; + unsigned char x_resv[2]; + } x_n; + } x_file; + + struct { + char x_exptr[8]; + char x_fsize[4]; + char x_endndx[4]; + char x_pad[1]; + } x_except; + + struct { + unsigned char x_scnlen_lo[4]; + unsigned char x_parmhash[4]; + unsigned char x_snhash[2]; + unsigned char x_smtyp[1]; + unsigned char x_smclas[1]; + unsigned char x_scnlen_hi[4]; + unsigned char x_pad[1]; + } x_csect; + + struct { + char x_pad[17]; + char x_auxtype[1]; + } x_auxtype; +}; + +#define SYMENT struct external_syment +#define SYMESZ 18 +#define AUXENT union external_auxent +#define AUXESZ 18 +#define DBXMASK 0x80 /* for dbx storage mask */ +#define SYMNAME_IN_DEBUG(symptr) ((symptr)->n_sclass & DBXMASK) + +/* Values for auxtype field in XCOFF64, taken from AIX 4.3 sym.h */ +#define _AUX_EXCEPT 255 +#define _AUX_FCN 254 +#define _AUX_SYM 253 +#define _AUX_FILE 252 +#define _AUX_CSECT 251 + + + +/********************** RELOCATION DIRECTIVES **********************/ + + +struct external_reloc { + char r_vaddr[8]; + char r_symndx[4]; + char r_size[1]; + char r_type[1]; +}; + + +#define RELOC struct external_reloc +#define RELSZ 14 + +#define DEFAULT_DATA_SECTION_ALIGNMENT 4 +#define DEFAULT_BSS_SECTION_ALIGNMENT 4 +#define DEFAULT_TEXT_SECTION_ALIGNMENT 4 +/* For new sections we havn't heard of before */ +#define DEFAULT_SECTION_ALIGNMENT 4 diff --git a/contrib/binutils/include/coff/sh.h b/contrib/binutils/include/coff/sh.h index f7271f210b82..7ae32fc14990 100644 --- a/contrib/binutils/include/coff/sh.h +++ b/contrib/binutils/include/coff/sh.h @@ -1,4 +1,20 @@ -/*** coff information for Hitachi SH */ +/* coff information for Hitachi SH + + Copyright 2001 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /********************** FILE HEADER **********************/ @@ -305,3 +321,6 @@ struct external_reloc { #define R_SH_LABEL 32 /* label */ /* NB: R_SH_SWITCH8 is 33 */ + +#define R_SH_LOOP_START 34 +#define R_SH_LOOP_END 35 diff --git a/contrib/binutils/include/opcode/arc.h b/contrib/binutils/include/opcode/arc.h index a1e0ca152632..81e5bd847dc2 100644 --- a/contrib/binutils/include/opcode/arc.h +++ b/contrib/binutils/include/opcode/arc.h @@ -1,93 +1,110 @@ /* Opcode table for the ARC. - Copyright 1994, 1995, 1997 Free Software Foundation, Inc. + Copyright 1994, 1995, 1997, 2001 Free Software Foundation, Inc. Contributed by Doug Evans (dje@cygnus.com). -This file is part of GAS, the GNU Assembler, GDB, the GNU debugger, and -the GNU Binutils. + This file is part of GAS, the GNU Assembler, GDB, the GNU debugger, and + the GNU Binutils. -GAS/GDB is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + GAS/GDB is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. -GAS/GDB is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + GAS/GDB is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GAS or GDB; see the file COPYING. If not, write to + the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -You should have received a copy of the GNU General Public License -along with GAS or GDB; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ /* List of the various cpu types. The tables currently use bit masks to say whether the instruction or whatever is supported by a particular cpu. This lets us have one entry apply to several cpus. - This duplicates bfd_mach_arc_xxx. For now I wish to isolate this from bfd - and bfd from this. Also note that these numbers are bit values as we want - to allow for things available on more than one ARC (but not necessarily all - ARCs). */ - -/* The `base' cpu must be 0 (table entries are omitted for the base cpu). - The cpu type is treated independently of endianness. - The complete `mach' number includes endianness. + The `base' cpu must be 0. The cpu type is treated independently of + endianness. The complete `mach' number includes endianness. These values are internal to opcodes/bfd/binutils/gas. */ -#define ARC_MACH_BASE 0 -#define ARC_MACH_UNUSED1 1 -#define ARC_MACH_UNUSED2 2 -#define ARC_MACH_UNUSED4 4 +#define ARC_MACH_5 0 +#define ARC_MACH_6 1 +#define ARC_MACH_7 2 +#define ARC_MACH_8 4 + /* Additional cpu values can be inserted here and ARC_MACH_BIG moved down. */ -#define ARC_MACH_BIG 8 +#define ARC_MACH_BIG 16 /* Mask of number of bits necessary to record cpu type. */ -#define ARC_MACH_CPU_MASK 7 +#define ARC_MACH_CPU_MASK (ARC_MACH_BIG - 1) + /* Mask of number of bits necessary to record cpu type + endianness. */ -#define ARC_MACH_MASK 15 +#define ARC_MACH_MASK ((ARC_MACH_BIG << 1) - 1) /* Type to denote an ARC instruction (at least a 32 bit unsigned int). */ + typedef unsigned int arc_insn; struct arc_opcode { - char *syntax; /* syntax of insn */ - unsigned long mask, value; /* recognize insn if (op&mask)==value */ - int flags; /* various flag bits */ + char *syntax; /* syntax of insn */ + unsigned long mask, value; /* recognize insn if (op&mask) == value */ + int flags; /* various flag bits */ /* Values for `flags'. */ /* Return CPU number, given flag bits. */ #define ARC_OPCODE_CPU(bits) ((bits) & ARC_MACH_CPU_MASK) + /* Return MACH number, given flag bits. */ #define ARC_OPCODE_MACH(bits) ((bits) & ARC_MACH_MASK) + /* First opcode flag bit available after machine mask. */ -#define ARC_OPCODE_FLAG_START ((ARC_MACH_MASK + 1) << 0) +#define ARC_OPCODE_FLAG_START (ARC_MACH_MASK + 1) + /* This insn is a conditional branch. */ #define ARC_OPCODE_COND_BRANCH (ARC_OPCODE_FLAG_START) - - /* These values are used to optimize assembly and disassembly. Each insn is - on a list of related insns (same first letter for assembly, same insn code - for disassembly). */ - struct arc_opcode *next_asm; /* Next instruction to try during assembly. */ - struct arc_opcode *next_dis; /* Next instruction to try during disassembly. */ - - /* Macros to create the hash values for the lists. */ +#define SYNTAX_3OP (ARC_OPCODE_COND_BRANCH << 1) +#define SYNTAX_LENGTH (SYNTAX_3OP ) +#define SYNTAX_2OP (SYNTAX_3OP << 1) +#define OP1_MUST_BE_IMM (SYNTAX_2OP << 1) +#define OP1_IMM_IMPLIED (OP1_MUST_BE_IMM << 1) +#define SYNTAX_VALID (OP1_IMM_IMPLIED << 1) + +#define I(x) (((x) & 31) << 27) +#define A(x) (((x) & ARC_MASK_REG) << ARC_SHIFT_REGA) +#define B(x) (((x) & ARC_MASK_REG) << ARC_SHIFT_REGB) +#define C(x) (((x) & ARC_MASK_REG) << ARC_SHIFT_REGC) +#define R(x,b,m) (((x) & (m)) << (b)) /* value X, mask M, at bit B */ + +/* These values are used to optimize assembly and disassembly. Each insn + is on a list of related insns (same first letter for assembly, same + insn code for disassembly). */ + + struct arc_opcode *next_asm; /* Next instr to try during assembly. */ + struct arc_opcode *next_dis; /* Next instr to try during disassembly. */ + +/* Macros to create the hash values for the lists. */ #define ARC_HASH_OPCODE(string) \ ((string)[0] >= 'a' && (string)[0] <= 'z' ? (string)[0] - 'a' : 26) #define ARC_HASH_ICODE(insn) \ ((unsigned int) (insn) >> 27) - /* Macros to access `next_asm', `next_dis' so users needn't care about the - underlying mechanism. */ + /* Macros to access `next_asm', `next_dis' so users needn't care about the + underlying mechanism. */ #define ARC_OPCODE_NEXT_ASM(op) ((op)->next_asm) #define ARC_OPCODE_NEXT_DIS(op) ((op)->next_dis) }; +/* this is an "insert at front" linked list per Metaware spec + that new definitions override older ones. */ +struct arc_opcode *arc_ext_opcodes; + struct arc_operand_value { - char *name; /* eg: "eq" */ - short value; /* eg: 1 */ - unsigned char type; /* index into `arc_operands' */ - unsigned char flags; /* various flag bits */ + char *name; /* eg: "eq" */ + short value; /* eg: 1 */ + unsigned char type; /* index into `arc_operands' */ + unsigned char flags; /* various flag bits */ /* Values for `flags'. */ @@ -97,18 +114,23 @@ struct arc_operand_value { #define ARC_OPVAL_MACH(bits) ((bits) & ARC_MACH_MASK) }; +struct arc_ext_operand_value { + struct arc_ext_operand_value *next; + struct arc_operand_value operand; +} *arc_ext_operands; + struct arc_operand { - /* One of the insn format chars. */ +/* One of the insn format chars. */ unsigned char fmt; - /* The number of bits in the operand (may be unused for a modifier). */ +/* The number of bits in the operand (may be unused for a modifier). */ unsigned char bits; - /* How far the operand is left shifted in the instruction, or - the modifier's flag bit (may be unused for a modifier. */ +/* How far the operand is left shifted in the instruction, or + the modifier's flag bit (may be unused for a modifier. */ unsigned char shift; - /* Various flag bits. */ +/* Various flag bits. */ int flags; /* Values for `flags'. */ @@ -150,6 +172,19 @@ struct arc_operand { in special ways. */ #define ARC_OPERAND_FAKE 0x100 +/* separate flags operand for j and jl instructions */ +#define ARC_OPERAND_JUMPFLAGS 0x200 + +/* allow warnings and errors to be issued after call to insert_xxxxxx */ +#define ARC_OPERAND_WARN 0x400 +#define ARC_OPERAND_ERROR 0x800 + +/* this is a load operand */ +#define ARC_OPERAND_LOAD 0x8000 + +/* this is a store operand */ +#define ARC_OPERAND_STORE 0x10000 + /* Modifier values. */ /* A dot is required before a suffix. Eg: .le */ #define ARC_MOD_DOT 0x1000 @@ -166,52 +201,57 @@ struct arc_operand { /* Non-zero if the operand type is really a modifier. */ #define ARC_MOD_P(X) ((X) & ARC_MOD_BITS) - /* Insertion function. This is used by the assembler. To insert an - operand value into an instruction, check this field. - - If it is NULL, execute - i |= (p & ((1 << o->bits) - 1)) << o->shift; - (I is the instruction which we are filling in, O is a pointer to - this structure, and OP is the opcode value; this assumes twos - complement arithmetic). - - If this field is not NULL, then simply call it with the - instruction and the operand value. It will return the new value - of the instruction. If the ERRMSG argument is not NULL, then if - the operand value is illegal, *ERRMSG will be set to a warning - string (the operand will be inserted in any case). If the - operand value is legal, *ERRMSG will be unchanged. - - REG is non-NULL when inserting a register value. */ +/* enforce read/write only register restrictions */ +#define ARC_REGISTER_READONLY 0x01 +#define ARC_REGISTER_WRITEONLY 0x02 +#define ARC_REGISTER_NOSHORT_CUT 0x04 + +/* Insertion function. This is used by the assembler. To insert an + operand value into an instruction, check this field. + + If it is NULL, execute + i |= (p & ((1 << o->bits) - 1)) << o->shift; + (I is the instruction which we are filling in, O is a pointer to + this structure, and OP is the opcode value; this assumes twos + complement arithmetic). + + If this field is not NULL, then simply call it with the + instruction and the operand value. It will return the new value + of the instruction. If the ERRMSG argument is not NULL, then if + the operand value is illegal, *ERRMSG will be set to a warning + string (the operand will be inserted in any case). If the + operand value is legal, *ERRMSG will be unchanged. + + REG is non-NULL when inserting a register value. */ arc_insn (*insert) PARAMS ((arc_insn insn, const struct arc_operand *operand, int mods, const struct arc_operand_value *reg, long value, const char **errmsg)); - /* Extraction function. This is used by the disassembler. To - extract this operand type from an instruction, check this field. - - If it is NULL, compute - op = ((i) >> o->shift) & ((1 << o->bits) - 1); - if ((o->flags & ARC_OPERAND_SIGNED) != 0 - && (op & (1 << (o->bits - 1))) != 0) - op -= 1 << o->bits; - (I is the instruction, O is a pointer to this structure, and OP - is the result; this assumes twos complement arithmetic). - - If this field is not NULL, then simply call it with the - instruction value. It will return the value of the operand. If - the INVALID argument is not NULL, *INVALID will be set to - non-zero if this operand type can not actually be extracted from - this operand (i.e., the instruction does not match). If the - operand is valid, *INVALID will not be changed. - - INSN is a pointer to an array of two `arc_insn's. The first element is - the insn, the second is the limm if present. - - Operands that have a printable form like registers and suffixes have - their struct arc_operand_value pointer stored in OPVAL. */ +/* Extraction function. This is used by the disassembler. To + extract this operand type from an instruction, check this field. + + If it is NULL, compute + op = ((i) >> o->shift) & ((1 << o->bits) - 1); + if ((o->flags & ARC_OPERAND_SIGNED) != 0 + && (op & (1 << (o->bits - 1))) != 0) + op -= 1 << o->bits; + (I is the instruction, O is a pointer to this structure, and OP + is the result; this assumes twos complement arithmetic). + + If this field is not NULL, then simply call it with the + instruction value. It will return the value of the operand. If + the INVALID argument is not NULL, *INVALID will be set to + non-zero if this operand type can not actually be extracted from + this operand (i.e., the instruction does not match). If the + operand is valid, *INVALID will not be changed. + + INSN is a pointer to an array of two `arc_insn's. The first element is + the insn, the second is the limm if present. + + Operands that have a printable form like registers and suffixes have + their struct arc_operand_value pointer stored in OPVAL. */ long (*extract) PARAMS ((arc_insn *insn, const struct arc_operand *operand, @@ -219,9 +259,8 @@ struct arc_operand { int *invalid)); }; -/* Bits that say what version of cpu we have. - These should be passed to arc_init_opcode_tables. - At present, all there is is the cpu type. */ +/* Bits that say what version of cpu we have. These should be passed to + arc_init_opcode_tables. At present, all there is is the cpu type. */ /* CPU number, given value passed to `arc_init_opcode_tables'. */ #define ARC_HAVE_CPU(bits) ((bits) & ARC_MACH_CPU_MASK) @@ -243,16 +282,16 @@ struct arc_operand { #define ARC_MASK_REG 63 /* Delay slot types. */ -#define ARC_DELAY_NONE 0 /* no delay slot */ -#define ARC_DELAY_NORMAL 1 /* delay slot in both cases */ -#define ARC_DELAY_JUMP 2 /* delay slot only if branch taken */ +#define ARC_DELAY_NONE 0 /* no delay slot */ +#define ARC_DELAY_NORMAL 1 /* delay slot in both cases */ +#define ARC_DELAY_JUMP 2 /* delay slot only if branch taken */ /* Non-zero if X will fit in a signed 9 bit field. */ #define ARC_SHIMM_CONST_P(x) ((long) (x) >= -256 && (long) (x) <= 255) extern const struct arc_operand arc_operands[]; extern const int arc_operand_count; -extern /*const*/ struct arc_opcode arc_opcodes[]; +extern struct arc_opcode arc_opcodes[]; extern const int arc_opcodes_count; extern const struct arc_operand_value arc_suffixes[]; extern const int arc_suffixes_count; @@ -262,6 +301,7 @@ extern unsigned char arc_operand_map[]; /* Utility fns in arc-opc.c. */ int arc_get_opcode_mach PARAMS ((int, int)); + /* `arc_opcode_init_tables' must be called before `arc_xxx_supported'. */ void arc_opcode_init_tables PARAMS ((int)); void arc_opcode_init_insert PARAMS ((void)); @@ -269,6 +309,7 @@ void arc_opcode_init_extract PARAMS ((void)); const struct arc_opcode *arc_opcode_lookup_asm PARAMS ((const char *)); const struct arc_opcode *arc_opcode_lookup_dis PARAMS ((unsigned int)); int arc_opcode_limm_p PARAMS ((long *)); -const struct arc_operand_value *arc_opcode_lookup_suffix PARAMS ((const struct arc_operand *type, int value)); +const struct arc_operand_value *arc_opcode_lookup_suffix + PARAMS ((const struct arc_operand *type, int value)); int arc_opcode_supported PARAMS ((const struct arc_opcode *)); int arc_opval_supported PARAMS ((const struct arc_operand_value *)); diff --git a/contrib/binutils/include/opcode/cgen.h b/contrib/binutils/include/opcode/cgen.h index 0cff7c826823..8cf312322256 100644 --- a/contrib/binutils/include/opcode/cgen.h +++ b/contrib/binutils/include/opcode/cgen.h @@ -1,6 +1,6 @@ /* Header file for targets using CGEN: Cpu tools GENerator. -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. +Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. This file is part of GDB, the GNU debugger, and the GNU Binutils. @@ -452,7 +452,7 @@ typedef struct { extern const CGEN_HW_ENTRY * cgen_hw_lookup_by_name PARAMS ((CGEN_CPU_DESC, const char *)); extern const CGEN_HW_ENTRY * cgen_hw_lookup_by_num - PARAMS ((CGEN_CPU_DESC, int)); + PARAMS ((CGEN_CPU_DESC, unsigned int)); /* This struct is used to describe things like register names, etc. */ @@ -735,18 +735,31 @@ typedef struct into the operand table. The operand table doesn't exist in C, per se, as the data is recorded in the parse/insert/extract/print switch statements. */ -#ifndef CGEN_MAX_SYNTAX_BYTES -#define CGEN_MAX_SYNTAX_BYTES 16 +/* This should be at least as large as necessary for any target. */ +#define CGEN_MAX_SYNTAX_BYTES 40 + +/* A target may know its own precise maximum. Assert that it falls below + the above limit. */ +#ifdef CGEN_ACTUAL_MAX_SYNTAX_BYTES +#if CGEN_ACTUAL_MAX_SYNTAX_BYTES > CGEN_MAX_SYNTAX_BYTES +#error "CGEN_ACTUAL_MAX_SYNTAX_BYTES too high - enlarge CGEN_MAX_SYNTAX_BYTES" +#endif +#endif + +#if !defined(MAX_OPERANDS) || MAX_OPERANDS <= 127 +typedef unsigned char CGEN_SYNTAX_CHAR_TYPE; +#else +typedef unsigned short CGEN_SYNTAX_CHAR_TYPE; #endif typedef struct { - unsigned char syntax[CGEN_MAX_SYNTAX_BYTES]; + CGEN_SYNTAX_CHAR_TYPE syntax[CGEN_MAX_SYNTAX_BYTES]; } CGEN_SYNTAX; #define CGEN_SYNTAX_STRING(syn) (syn->syntax) #define CGEN_SYNTAX_CHAR_P(c) ((c) < 128) -#define CGEN_SYNTAX_CHAR(c) (c) +#define CGEN_SYNTAX_CHAR(c) ((unsigned char)c) #define CGEN_SYNTAX_FIELD(c) ((c) - 128) #define CGEN_SYNTAX_MAKE_FIELD(c) ((c) + 128) @@ -824,9 +837,17 @@ typedef struct { #define CGEN_IFMT_IFLD_IFLD(ii) ((ii)->ifld) } CGEN_IFMT_IFLD; -#ifndef CGEN_MAX_IFMT_OPERANDS -#define CGEN_MAX_IFMT_OPERANDS 1 +/* This should be at least as large as necessary for any target. */ +#define CGEN_MAX_IFMT_OPERANDS 16 + +/* A target may know its own precise maximum. Assert that it falls below + the above limit. */ +#ifdef CGEN_ACTUAL_MAX_IFMT_OPERANDS +#if CGEN_ACTUAL_MAX_IFMT_OPERANDS > CGEN_MAX_IFMT_OPERANDS +#error "CGEN_ACTUAL_MAX_IFMT_OPERANDS too high - enlarge CGEN_MAX_IFMT_OPERANDS" #endif +#endif + typedef struct { diff --git a/contrib/binutils/ld/ChangeLog b/contrib/binutils/ld/ChangeLog index df9f3c5f54b5..0399c9576258 100644 --- a/contrib/binutils/ld/ChangeLog +++ b/contrib/binutils/ld/ChangeLog @@ -1,3 +1,35 @@ +2001-10-17 Nick Clifton <nickc@cambridge.redhat.com> + + * ld.1: Remove .TP macro from SYNOPSIS section - it prevents + successful translation to DocBook format. + +2001-09-30 Stephane Carrez <Stephane.Carrez@worldnet.fr> + + Report 2001-08-03 Stephane Carrez <Stephane.Carrez@worldnet.fr> + + * scripttempl/elfm68hc12.sc (FINISH_CODE, FINISH_RELOC): New to handle + .fini[0-4] sections used by _exit + (CTOR, DTOR): Export ctor/dtor symbols; move them to ROM. + (*.text,*.data,*.bss): Take into account .text.*, .data.*, .bss.*. + * scripttempl/elfm68hc11.sc: Likewise. + +2001-08-29 Joel Sherrill <joel@OARcorp.com> + + * configure.tgt (i[3456]86-*-rtems*, m68*-*-rtems*): Change + default from coff to elf. + +2001-08-13 Richard Henderson <rth@redhat.com> + + * emultempl/needrelax.em: New file. + * emulparams/elf64_ia64.sh (EXTRA_EM_FILE): Reference it. + * Makefile.am (eelf64_ia64.c): Depend on it. + * Makefile.in: Rebuild. + +2001-07-30 Nick Clifton <nickc@cambridge.redhat.com> + + * ld.texinfo (Simple Assignments): Fix computation in SECTIONS + example. + 2001-07-19 David O'Brien <obrien@FreeBSD.org> * emultempl/elf32.em: Do not assuming that contents of the buffer @@ -137,15 +169,15 @@ * mpw-eppcmac.c: Likewise. 2001-04-28 Paul Sokolovsky <Paul.Sokolovsky@technologist.com> - * ldlang.c (load_symbols): Give emulation a chance - to process unrecognized file before fatal error is - reported, not after. + * ldlang.c (load_symbols): Give emulation a chance + to process unrecognized file before fatal error is + reported, not after. 2001-02-26 H.J. Lu <hjl@gnu.org> * ldlang.c (open_input_bfds): Set the bfd error handler so - that problems can be caught whilst loading symbols. - (record_bfd_errors): New function: Report BFD errors and mark - the executable output as being invalid. + that problems can be caught whilst loading symbols. + (record_bfd_errors): New function: Report BFD errors and mark + the executable output as being invalid. 2001-04-02 Alan Modra <alan@linuxcare.com.au> diff --git a/contrib/binutils/ld/Makefile.am b/contrib/binutils/ld/Makefile.am index 916a8832b998..0408dfbcad32 100644 --- a/contrib/binutils/ld/Makefile.am +++ b/contrib/binutils/ld/Makefile.am @@ -491,7 +491,8 @@ eelf64hppa.c: $(srcdir)/emulparams/elf64hppa.sh \ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf64hppa "$(tdir_elf64hppa)" eelf64_ia64.c: $(srcdir)/emulparams/elf64_ia64.sh \ - $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \ + $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf64_ia64 "$(tdir_elf64_ia64)" eelf64_sparc.c: $(srcdir)/emulparams/elf64_sparc.sh \ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} diff --git a/contrib/binutils/ld/Makefile.in b/contrib/binutils/ld/Makefile.in index b4db3e85f698..831790838aca 100644 --- a/contrib/binutils/ld/Makefile.in +++ b/contrib/binutils/ld/Makefile.in @@ -1205,7 +1205,8 @@ eelf64hppa.c: $(srcdir)/emulparams/elf64hppa.sh \ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf64hppa "$(tdir_elf64hppa)" eelf64_ia64.c: $(srcdir)/emulparams/elf64_ia64.sh \ - $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \ + $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf64_ia64 "$(tdir_elf64_ia64)" eelf64_sparc.c: $(srcdir)/emulparams/elf64_sparc.sh \ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} diff --git a/contrib/binutils/ld/configure.tgt b/contrib/binutils/ld/configure.tgt index bb690121a0ad..478eaca22947 100644 --- a/contrib/binutils/ld/configure.tgt +++ b/contrib/binutils/ld/configure.tgt @@ -121,8 +121,9 @@ i[3456]86-*-sco*) targ_emul=i386coff ;; i[3456]86-*-isc*) targ_emul=i386coff ;; i[3456]86-*-lynxos*) targ_emul=i386lynx ;; i[3456]86-*-coff) targ_emul=i386coff ;; +i[3456]86-*-rtemscoff*) targ_emul=i386coff ;; i[3456]86-*-rtemself*) targ_emul=elf_i386 ;; -i[3456]86-*-rtems*) targ_emul=i386coff ;; +i[3456]86-*-rtems*) targ_emul=elf_i386 ;; i[3456]86-*-bsd) targ_emul=i386bsd ;; i[3456]86-*-bsd386) targ_emul=i386bsd ;; i[3456]86-*-bsdi*) targ_emul=i386bsd ;; @@ -246,7 +247,8 @@ m68*-*-lynxos*) targ_emul=m68klynx ;; m68*-hp*-netbsd*) targ_emul=m68k4knbsd ;; m68*-*-netbsd*) targ_emul=m68knbsd ;; m68*-*-psos*) targ_emul=m68kpsos ;; -m68*-*-rtems*) targ_emul=m68kcoff ;; +m68*-*-rtemscoff*) targ_emul=m68kcoff ;; +m68*-*-rtems*) targ_emul=m68kelf ;; hppa*64*-*-linux-gnu*) targ_emul=hppa64linux ;; hppa*64*-*) targ_emul=elf64hppa ;; hppa*-*-linux-gnu*) targ_emul=hppalinux ;; diff --git a/contrib/binutils/ld/emulparams/elf64_ia64.sh b/contrib/binutils/ld/emulparams/elf64_ia64.sh index fff59924cb3c..158db9c4c964 100644 --- a/contrib/binutils/ld/emulparams/elf64_ia64.sh +++ b/contrib/binutils/ld/emulparams/elf64_ia64.sh @@ -2,6 +2,7 @@ SCRIPT_NAME=elf ELFSIZE=64 TEMPLATE_NAME=elf32 +EXTRA_EM_FILE=needrelax OUTPUT_FORMAT="elf64-ia64-little" ARCH=ia64 MACHINE= diff --git a/contrib/binutils/ld/emulparams/elf_x86_64.sh b/contrib/binutils/ld/emulparams/elf_x86_64.sh new file mode 100644 index 000000000000..635748f63884 --- /dev/null +++ b/contrib/binutils/ld/emulparams/elf_x86_64.sh @@ -0,0 +1,11 @@ +SCRIPT_NAME=elf +ELFSIZE=64 +OUTPUT_FORMAT="elf64-x86-64" +TEXT_START_ADDR=0x400000 +MAXPAGESIZE=0x100000 +NONPAGED_TEXT_START_ADDR=0x400000 +ARCH=i386 +MACHINE= +NOP=0x9090 +TEMPLATE_NAME=elf32 +GENERATE_SHLIB_SCRIPT=yes diff --git a/contrib/binutils/ld/emultempl/needrelax.em b/contrib/binutils/ld/emultempl/needrelax.em new file mode 100644 index 000000000000..9bb96c276482 --- /dev/null +++ b/contrib/binutils/ld/emultempl/needrelax.em @@ -0,0 +1,40 @@ +# This shell script emits a C file. -*- C -*- +# Copyright (C) 2001 Free Software Foundation, Inc. +# +# This file is part of GLD, the Gnu Linker. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# + +# This file is sourced from elf32.em. It is used by targets for +# which relaxation is not just an optimization, but for correctness. + +LDEMUL_BEFORE_ALLOCATION=need_relax_${EMULATION_NAME}_before_allocation + +cat >>e${EMULATION_NAME}.c <<EOF + +static void need_relax_${EMULATION_NAME}_before_allocation PARAMS ((void)); + +static void +need_relax_${EMULATION_NAME}_before_allocation () +{ + /* Call main function; we're just extending it. */ + gld${EMULATION_NAME}_before_allocation (); + + /* Force -relax on if not doing a relocatable link. */ + if (! link_info.relocateable) + command_line.relax = true; +} +EOF diff --git a/contrib/binutils/ld/ld.1 b/contrib/binutils/ld/ld.1 index 1cfbbba118e1..fa4d439e959e 100644 --- a/contrib/binutils/ld/ld.1 +++ b/contrib/binutils/ld/ld.1 @@ -14,7 +14,6 @@ ld \- the GNU linker .SH SYNOPSIS .hy 0 .na -.TP .B ld .RB "[\|" \-o " .I output\c diff --git a/contrib/binutils/ld/ld.texinfo b/contrib/binutils/ld/ld.texinfo index 668c0e92f3b7..8c4d98f10f99 100644 --- a/contrib/binutils/ld/ld.texinfo +++ b/contrib/binutils/ld/ld.texinfo @@ -2123,7 +2123,7 @@ SECTIONS *(.text) _etext = .; @} - _bdata = (. + 3) & ~ 4; + _bdata = (. + 3) & ~ 3; .data : @{ *(.data) @} @} @end smallexample diff --git a/contrib/binutils/libtool.m4 b/contrib/binutils/libtool.m4 new file mode 100644 index 000000000000..cb004e223ab6 --- /dev/null +++ b/contrib/binutils/libtool.m4 @@ -0,0 +1,840 @@ +## libtool.m4 - Configure libtool for the host system. -*-Shell-script-*- +## Copyright 1996, 1997, 1998, 1999, 2000, 2001 +## Free Software Foundation, Inc. +## Originally by Gordon Matzigkeit <gord@gnu.ai.mit.edu>, 1996 +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, but +## WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +## General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +## +## As a special exception to the GNU General Public License, if you +## distribute this file as part of a program that contains a +## configuration script generated by Autoconf, you may include it under +## the same distribution terms that you use for the rest of that program. + +# serial 45 AC_PROG_LIBTOOL +AC_DEFUN(AC_PROG_LIBTOOL,[AC_REQUIRE([_AC_PROG_LIBTOOL]) +dnl If AC_PROG_CXX has already been expanded, run AC_LIBTOOL_CXX +dnl immediately, otherwise, hook it in at the end of AC_PROG_CXX. + AC_PROVIDE_IFELSE([AC_PROG_CXX], + [AC_LIBTOOL_CXX], + [define([AC_PROG_CXX], defn([AC_PROG_CXX])[AC_LIBTOOL_CXX +])]) + +dnl Quote A][M_PROG_GCJ so that aclocal doesn't bring it in needlessly. +dnl If either AC_PROG_GCJ or A][M_PROG_GCJ have already been expanded, run +dnl AC_LIBTOOL_GCJ immediately, otherwise, hook it in at the end of both. + AC_PROVIDE_IFELSE([AC_PROG_GCJ], + [AC_LIBTOOL_GCJ], + [AC_PROVIDE_IFELSE([A][M_PROG_GCJ], + [AC_LIBTOOL_GCJ], + [AC_PROVIDE_IFELSE([LT_AC_PROG_GCJ], + [AC_LIBTOOL_GCJ], + [ifdef([AC_PROG_GCJ], + [define([AC_PROG_GCJ], defn([AC_PROG_GCJ])[AC_LIBTOOL_GCJ +])]) + ifdef([A][M_PROG_GCJ], + [define([A][M_PROG_GCJ], defn([A][M_PROG_GCJ])[AC_LIBTOOL_GCJ +])]) + ifdef([LT_AC_PROG_GCJ], + [define([LT_AC_PROG_GCJ], defn([LT_AC_PROG_GCJ])[AC_LIBTOOL_GCJ +])])])])])]) + +AC_DEFUN(_AC_PROG_LIBTOOL, +[AC_REQUIRE([AC_LIBTOOL_SETUP])dnl +AC_BEFORE([$0],[AC_LIBTOOL_CXX])dnl +AC_BEFORE([$0],[AC_LIBTOOL_GCJ])dnl + +# Save cache, so that ltconfig can load it +AC_CACHE_SAVE + +# Actually configure libtool. ac_aux_dir is where install-sh is found. +AR="$AR" LTCC="$CC" CC="$CC" CFLAGS="$CFLAGS" CPPFLAGS="$CPPFLAGS" \ +MAGIC_CMD="$MAGIC_CMD" LD="$LD" LDFLAGS="$LDFLAGS" LIBS="$LIBS" \ +LN_S="$LN_S" NM="$NM" RANLIB="$RANLIB" STRIP="$STRIP" \ +AS="$AS" DLLTOOL="$DLLTOOL" OBJDUMP="$OBJDUMP" \ +objext="$OBJEXT" exeext="$EXEEXT" reload_flag="$reload_flag" \ +deplibs_check_method="$deplibs_check_method" file_magic_cmd="$file_magic_cmd" \ +${CONFIG_SHELL-/bin/sh} $ac_aux_dir/ltconfig --no-reexec \ +$libtool_flags --no-verify --build="$build" $ac_aux_dir/ltmain.sh $host \ +|| AC_MSG_ERROR([libtool configure failed]) + +# Reload cache, that may have been modified by ltconfig +AC_CACHE_LOAD + +# This can be used to rebuild libtool when needed +LIBTOOL_DEPS="$ac_aux_dir/ltconfig $ac_aux_dir/ltmain.sh $ac_aux_dir/ltcf-c.sh" + +# Always use our own libtool. +LIBTOOL='$(SHELL) $(top_builddir)/libtool' +AC_SUBST(LIBTOOL)dnl + +# Redirect the config.log output again, so that the ltconfig log is not +# clobbered by the next message. +exec 5>>./config.log +]) + +AC_DEFUN(AC_LIBTOOL_SETUP, +[AC_PREREQ(2.13)dnl +AC_REQUIRE([AC_ENABLE_SHARED])dnl +AC_REQUIRE([AC_ENABLE_STATIC])dnl +AC_REQUIRE([AC_ENABLE_FAST_INSTALL])dnl +AC_REQUIRE([AC_CANONICAL_HOST])dnl +AC_REQUIRE([AC_CANONICAL_BUILD])dnl +AC_REQUIRE([AC_PROG_CC])dnl +AC_REQUIRE([AC_PROG_LD])dnl +AC_REQUIRE([AC_PROG_LD_RELOAD_FLAG])dnl +AC_REQUIRE([AC_PROG_NM])dnl +AC_REQUIRE([AC_PROG_LN_S])dnl +AC_REQUIRE([AC_DEPLIBS_CHECK_METHOD])dnl +# Autoconf 2.13's AC_OBJEXT and AC_EXEEXT macros only works for C compilers! +AC_REQUIRE([AC_OBJEXT])dnl +AC_REQUIRE([AC_EXEEXT])dnl +dnl + +# Only perform the check for file, if the check method requires it +case "$deplibs_check_method" in +file_magic*) + if test "$file_magic_cmd" = '$MAGIC_CMD'; then + AC_PATH_MAGIC + fi + ;; +esac + +AC_CHECK_TOOL(RANLIB, ranlib, :) +AC_CHECK_TOOL(STRIP, strip, :) + +# Check for any special flags to pass to ltconfig. +libtool_flags="--cache-file=$cache_file" +test "$enable_shared" = no && libtool_flags="$libtool_flags --disable-shared" +test "$enable_static" = no && libtool_flags="$libtool_flags --disable-static" +test "$enable_fast_install" = no && libtool_flags="$libtool_flags --disable-fast-install" +test "$ac_cv_prog_gcc" = yes && libtool_flags="$libtool_flags --with-gcc" +test "$ac_cv_prog_gnu_ld" = yes && libtool_flags="$libtool_flags --with-gnu-ld" +ifdef([AC_PROVIDE_AC_LIBTOOL_DLOPEN], +[libtool_flags="$libtool_flags --enable-dlopen"]) +ifdef([AC_PROVIDE_AC_LIBTOOL_WIN32_DLL], +[libtool_flags="$libtool_flags --enable-win32-dll"]) +AC_ARG_ENABLE(libtool-lock, + [ --disable-libtool-lock avoid locking (might break parallel builds)]) +test "x$enable_libtool_lock" = xno && libtool_flags="$libtool_flags --disable-lock" +test x"$silent" = xyes && libtool_flags="$libtool_flags --silent" + +AC_ARG_WITH(pic, + [ --with-pic try to use only PIC/non-PIC objects [default=use both]], + pic_mode="$withval", pic_mode=default) +test x"$pic_mode" = xyes && libtool_flags="$libtool_flags --prefer-pic" +test x"$pic_mode" = xno && libtool_flags="$libtool_flags --prefer-non-pic" + +# Some flags need to be propagated to the compiler or linker for good +# libtool support. +case "$host" in +*-*-irix6*) + # Find out which ABI we are using. + echo '[#]line __oline__ "configure"' > conftest.$ac_ext + if AC_TRY_EVAL(ac_compile); then + case "`/usr/bin/file conftest.o`" in + *32-bit*) + LD="${LD-ld} -32" + ;; + *N32*) + LD="${LD-ld} -n32" + ;; + *64-bit*) + LD="${LD-ld} -64" + ;; + esac + fi + rm -rf conftest* + ;; + +*-*-sco3.2v5*) + # On SCO OpenServer 5, we need -belf to get full-featured binaries. + SAVE_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -belf" + AC_CACHE_CHECK([whether the C compiler needs -belf], lt_cv_cc_needs_belf, + [AC_LANG_SAVE + AC_LANG_C + AC_TRY_LINK([],[],[lt_cv_cc_needs_belf=yes],[lt_cv_cc_needs_belf=no]) + AC_LANG_RESTORE]) + if test x"$lt_cv_cc_needs_belf" != x"yes"; then + # this is probably gcc 2.8.0, egcs 1.0 or newer; no need for -belf + CFLAGS="$SAVE_CFLAGS" + fi + ;; + +ifdef([AC_PROVIDE_AC_LIBTOOL_WIN32_DLL], +[*-*-cygwin* | *-*-mingw* | *-*-pw32*) + AC_CHECK_TOOL(DLLTOOL, dlltool, false) + AC_CHECK_TOOL(AS, as, false) + AC_CHECK_TOOL(OBJDUMP, objdump, false) + + # recent cygwin and mingw systems supply a stub DllMain which the user + # can override, but on older systems we have to supply one + AC_CACHE_CHECK([if libtool should supply DllMain function], lt_cv_need_dllmain, + [AC_TRY_LINK([], + [extern int __attribute__((__stdcall__)) DllMain(void*, int, void*); + DllMain (0, 0, 0);], + [lt_cv_need_dllmain=no],[lt_cv_need_dllmain=yes])]) + + case "$host/$CC" in + *-*-cygwin*/gcc*-mno-cygwin*|*-*-mingw*) + # old mingw systems require "-dll" to link a DLL, while more recent ones + # require "-mdll" + SAVE_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -mdll" + AC_CACHE_CHECK([how to link DLLs], lt_cv_cc_dll_switch, + [AC_TRY_LINK([], [], [lt_cv_cc_dll_switch=-mdll],[lt_cv_cc_dll_switch=-dll])]) + CFLAGS="$SAVE_CFLAGS" ;; + *-*-cygwin* | *-*-pw32*) + # cygwin systems need to pass --dll to the linker, and not link + # crt.o which will require a WinMain@16 definition. + lt_cv_cc_dll_switch="-Wl,--dll -nostartfiles" ;; + esac + ;; + ]) +esac +]) + +# AC_LIBTOOL_DLOPEN - enable checks for dlopen support +AC_DEFUN(AC_LIBTOOL_DLOPEN, [AC_BEFORE([$0],[AC_LIBTOOL_SETUP])]) + +# AC_LIBTOOL_WIN32_DLL - declare package support for building win32 dll's +AC_DEFUN(AC_LIBTOOL_WIN32_DLL, [AC_BEFORE([$0], [AC_LIBTOOL_SETUP])]) + +# AC_ENABLE_SHARED - implement the --enable-shared flag +# Usage: AC_ENABLE_SHARED[(DEFAULT)] +# Where DEFAULT is either `yes' or `no'. If omitted, it defaults to +# `yes'. +AC_DEFUN(AC_ENABLE_SHARED, [dnl +define([AC_ENABLE_SHARED_DEFAULT], ifelse($1, no, no, yes))dnl +AC_ARG_ENABLE(shared, +changequote(<<, >>)dnl +<< --enable-shared[=PKGS] build shared libraries [default=>>AC_ENABLE_SHARED_DEFAULT], +changequote([, ])dnl +[p=${PACKAGE-default} +case "$enableval" in +yes) enable_shared=yes ;; +no) enable_shared=no ;; +*) + enable_shared=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_shared=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac], +enable_shared=AC_ENABLE_SHARED_DEFAULT)dnl +]) + +# AC_DISABLE_SHARED - set the default shared flag to --disable-shared +AC_DEFUN(AC_DISABLE_SHARED, [AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl +AC_ENABLE_SHARED(no)]) + +# AC_ENABLE_STATIC - implement the --enable-static flag +# Usage: AC_ENABLE_STATIC[(DEFAULT)] +# Where DEFAULT is either `yes' or `no'. If omitted, it defaults to +# `yes'. +AC_DEFUN(AC_ENABLE_STATIC, [dnl +define([AC_ENABLE_STATIC_DEFAULT], ifelse($1, no, no, yes))dnl +AC_ARG_ENABLE(static, +changequote(<<, >>)dnl +<< --enable-static[=PKGS] build static libraries [default=>>AC_ENABLE_STATIC_DEFAULT], +changequote([, ])dnl +[p=${PACKAGE-default} +case "$enableval" in +yes) enable_static=yes ;; +no) enable_static=no ;; +*) + enable_static=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_static=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac], +enable_static=AC_ENABLE_STATIC_DEFAULT)dnl +]) + +# AC_DISABLE_STATIC - set the default static flag to --disable-static +AC_DEFUN(AC_DISABLE_STATIC, [AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl +AC_ENABLE_STATIC(no)]) + + +# AC_ENABLE_FAST_INSTALL - implement the --enable-fast-install flag +# Usage: AC_ENABLE_FAST_INSTALL[(DEFAULT)] +# Where DEFAULT is either `yes' or `no'. If omitted, it defaults to +# `yes'. +AC_DEFUN(AC_ENABLE_FAST_INSTALL, [dnl +define([AC_ENABLE_FAST_INSTALL_DEFAULT], ifelse($1, no, no, yes))dnl +AC_ARG_ENABLE(fast-install, +changequote(<<, >>)dnl +<< --enable-fast-install[=PKGS] optimize for fast installation [default=>>AC_ENABLE_FAST_INSTALL_DEFAULT], +changequote([, ])dnl +[p=${PACKAGE-default} +case "$enableval" in +yes) enable_fast_install=yes ;; +no) enable_fast_install=no ;; +*) + enable_fast_install=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_fast_install=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac], +enable_fast_install=AC_ENABLE_FAST_INSTALL_DEFAULT)dnl +]) + +# AC_DISABLE_FAST_INSTALL - set the default to --disable-fast-install +AC_DEFUN(AC_DISABLE_FAST_INSTALL, [AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl +AC_ENABLE_FAST_INSTALL(no)]) + +# AC_LIBTOOL_PICMODE - implement the --with-pic flag +# Usage: AC_LIBTOOL_PICMODE[(MODE)] +# Where MODE is either `yes' or `no'. If omitted, it defaults to +# `both'. +AC_DEFUN(AC_LIBTOOL_PICMODE, [AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl +pic_mode=ifelse($#,1,$1,default)]) + + +# AC_PATH_TOOL_PREFIX - find a file program which can recognise shared library +AC_DEFUN(AC_PATH_TOOL_PREFIX, +[AC_MSG_CHECKING([for $1]) +AC_CACHE_VAL(lt_cv_path_MAGIC_CMD, +[case "$MAGIC_CMD" in + /*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a path. + ;; + ?:/*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a dos path. + ;; + *) + ac_save_MAGIC_CMD="$MAGIC_CMD" + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" +dnl $ac_dummy forces splitting on constant user-supplied paths. +dnl POSIX.2 word splitting is done only on the output of word expansions, +dnl not every word. This closes a longstanding sh security hole. + ac_dummy="ifelse([$2], , $PATH, [$2])" + for ac_dir in $ac_dummy; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$1; then + lt_cv_path_MAGIC_CMD="$ac_dir/$1" + if test -n "$file_magic_test_file"; then + case "$deplibs_check_method" in + "file_magic "*) + file_magic_regex="`expr \"$deplibs_check_method\" : \"file_magic \(.*\)\"`" + MAGIC_CMD="$lt_cv_path_MAGIC_CMD" + if eval $file_magic_cmd \$file_magic_test_file 2> /dev/null | + egrep "$file_magic_regex" > /dev/null; then + : + else + cat <<EOF 1>&2 + +*** Warning: the command libtool uses to detect shared libraries, +*** $file_magic_cmd, produces output that libtool cannot recognize. +*** The result is that libtool may fail to recognize shared libraries +*** as such. This will affect the creation of libtool libraries that +*** depend on shared libraries, but programs linked with such libtool +*** libraries will work regardless of this problem. Nevertheless, you +*** may want to report the problem to your system manager and/or to +*** bug-libtool@gnu.org + +EOF + fi ;; + esac + fi + break + fi + done + IFS="$ac_save_ifs" + MAGIC_CMD="$ac_save_MAGIC_CMD" + ;; +esac]) +MAGIC_CMD="$lt_cv_path_MAGIC_CMD" +if test -n "$MAGIC_CMD"; then + AC_MSG_RESULT($MAGIC_CMD) +else + AC_MSG_RESULT(no) +fi +]) + + +# AC_PATH_MAGIC - find a file program which can recognise a shared library +AC_DEFUN(AC_PATH_MAGIC, +[AC_REQUIRE([AC_CHECK_TOOL_PREFIX])dnl +AC_PATH_TOOL_PREFIX(${ac_tool_prefix}file, /usr/bin:$PATH) +if test -z "$lt_cv_path_MAGIC_CMD"; then + if test -n "$ac_tool_prefix"; then + AC_PATH_TOOL_PREFIX(file, /usr/bin:$PATH) + else + MAGIC_CMD=: + fi +fi +]) + + +# AC_PROG_LD - find the path to the GNU or non-GNU linker +AC_DEFUN(AC_PROG_LD, +[AC_ARG_WITH(gnu-ld, +[ --with-gnu-ld assume the C compiler uses GNU ld [default=no]], +test "$withval" = no || with_gnu_ld=yes, with_gnu_ld=no) +AC_REQUIRE([AC_PROG_CC])dnl +AC_REQUIRE([AC_CANONICAL_HOST])dnl +AC_REQUIRE([AC_CANONICAL_BUILD])dnl +ac_prog=ld +if test "$ac_cv_prog_gcc" = yes; then + # Check if gcc -print-prog-name=ld gives a path. + AC_MSG_CHECKING([for ld used by GCC]) + case $host in + *-*-mingw*) + # gcc leaves a trailing carriage return which upsets mingw + ac_prog=`($CC -print-prog-name=ld) 2>&5 | tr -d '\015'` ;; + *) + ac_prog=`($CC -print-prog-name=ld) 2>&5` ;; + esac + case "$ac_prog" in + # Accept absolute paths. +changequote(,)dnl + [\\/]* | [A-Za-z]:[\\/]*) + re_direlt='/[^/][^/]*/\.\./' +changequote([,])dnl + # Canonicalize the path of ld + ac_prog=`echo $ac_prog| sed 's%\\\\%/%g'` + while echo $ac_prog | grep "$re_direlt" > /dev/null 2>&1; do + ac_prog=`echo $ac_prog| sed "s%$re_direlt%/%"` + done + test -z "$LD" && LD="$ac_prog" + ;; + "") + # If it fails, then pretend we aren't using GCC. + ac_prog=ld + ;; + *) + # If it is relative, then search for the first ld in PATH. + with_gnu_ld=unknown + ;; + esac +elif test "$with_gnu_ld" = yes; then + AC_MSG_CHECKING([for GNU ld]) +else + AC_MSG_CHECKING([for non-GNU ld]) +fi +AC_CACHE_VAL(ac_cv_path_LD, +[if test -z "$LD"; then + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}${PATH_SEPARATOR-:}" + for ac_dir in $PATH; do + test -z "$ac_dir" && ac_dir=. + if test -f "$ac_dir/$ac_prog" || test -f "$ac_dir/$ac_prog$ac_exeext"; then + ac_cv_path_LD="$ac_dir/$ac_prog" + # Check to see if the program is GNU ld. I'd rather use --version, + # but apparently some GNU ld's only accept -v. + # Break only if it was the GNU/non-GNU ld that we prefer. + if "$ac_cv_path_LD" -v 2>&1 < /dev/null | egrep '(GNU|with BFD)' > /dev/null; then + test "$with_gnu_ld" != no && break + else + test "$with_gnu_ld" != yes && break + fi + fi + done + IFS="$ac_save_ifs" +else + ac_cv_path_LD="$LD" # Let the user override the test with a path. +fi]) +LD="$ac_cv_path_LD" +if test -n "$LD"; then + AC_MSG_RESULT($LD) +else + AC_MSG_RESULT(no) +fi +test -z "$LD" && AC_MSG_ERROR([no acceptable ld found in \$PATH]) +AC_PROG_LD_GNU +]) + +AC_DEFUN(AC_PROG_LD_GNU, +[AC_CACHE_CHECK([if the linker ($LD) is GNU ld], ac_cv_prog_gnu_ld, +[# I'd rather use --version here, but apparently some GNU ld's only accept -v. +if $LD -v 2>&1 </dev/null | egrep '(GNU|with BFD)' 1>&5; then + ac_cv_prog_gnu_ld=yes +else + ac_cv_prog_gnu_ld=no +fi]) +with_gnu_ld=$ac_cv_prog_gnu_ld +]) + +# AC_PROG_LD_RELOAD_FLAG - find reload flag for linker +# -- PORTME Some linkers may need a different reload flag. +AC_DEFUN(AC_PROG_LD_RELOAD_FLAG, +[AC_CACHE_CHECK([for $LD option to reload object files], lt_cv_ld_reload_flag, +[lt_cv_ld_reload_flag='-r']) +reload_flag=$lt_cv_ld_reload_flag +test -n "$reload_flag" && reload_flag=" $reload_flag" +]) + +# AC_DEPLIBS_CHECK_METHOD - how to check for library dependencies +# -- PORTME fill in with the dynamic library characteristics +AC_DEFUN(AC_DEPLIBS_CHECK_METHOD, +[AC_CACHE_CHECK([how to recognise dependant libraries], +lt_cv_deplibs_check_method, +[lt_cv_file_magic_cmd='$MAGIC_CMD' +lt_cv_file_magic_test_file= +lt_cv_deplibs_check_method='unknown' +# Need to set the preceding variable on all platforms that support +# interlibrary dependencies. +# 'none' -- dependencies not supported. +# `unknown' -- same as none, but documents that we really don't know. +# 'pass_all' -- all dependencies passed with no checks. +# 'test_compile' -- check by making test program. +# 'file_magic [regex]' -- check by looking for files in library path +# which responds to the $file_magic_cmd with a given egrep regex. +# If you have `file' or equivalent on your system and you're not sure +# whether `pass_all' will *always* work, you probably want this one. + +case "$host_os" in +aix4*) + lt_cv_deplibs_check_method=pass_all + ;; + +beos*) + lt_cv_deplibs_check_method=pass_all + ;; + +bsdi4*) + changequote(,)dnl + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (shared object|dynamic lib)' + changequote([, ])dnl + lt_cv_file_magic_cmd='/usr/bin/file -L' + lt_cv_file_magic_test_file=/shlib/libc.so + ;; + +cygwin* | mingw* |pw32*) + lt_cv_deplibs_check_method='file_magic file format pei*-i386(.*architecture: i386)?' + lt_cv_file_magic_cmd='$OBJDUMP -f' + ;; + +freebsd* ) + if echo __ELF__ | $CC -E - | grep __ELF__ > /dev/null; then + case "$host_cpu" in + i*86 ) + # Not sure whether the presence of OpenBSD here was a mistake. + # Let's accept both of them until this is cleared up. + changequote(,)dnl + lt_cv_deplibs_check_method='file_magic (FreeBSD|OpenBSD)/i[3-9]86 (compact )?demand paged shared library' + changequote([, ])dnl + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*` + ;; + esac + else + lt_cv_deplibs_check_method=pass_all + fi + ;; + +gnu*) + lt_cv_deplibs_check_method=pass_all + ;; + +hpux10.20*) + # TODO: Does this work for hpux-11 too? + lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9].[0-9]) shared library' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=/usr/lib/libc.sl + ;; + +irix5* | irix6*) + case "$host_os" in + irix5*) + # this will be overridden with pass_all, but let us keep it just in case + lt_cv_deplibs_check_method="file_magic ELF 32-bit MSB dynamic lib MIPS - version 1" + ;; + *) + case "$LD" in + *-32|*"-32 ") libmagic=32-bit;; + *-n32|*"-n32 ") libmagic=N32;; + *-64|*"-64 ") libmagic=64-bit;; + *) libmagic=never-match;; + esac + # this will be overridden with pass_all, but let us keep it just in case + changequote(,)dnl + lt_cv_deplibs_check_method="file_magic ELF ${libmagic} MSB mips-[1234] dynamic lib MIPS - version 1" + changequote([, ])dnl + ;; + esac + lt_cv_file_magic_test_file=`echo /lib${libsuff}/libc.so*` + lt_cv_deplibs_check_method=pass_all + ;; + +# This must be Linux ELF. +linux-gnu*) + case "$host_cpu" in + alpha* | i*86 | powerpc* | sparc* | ia64* ) + lt_cv_deplibs_check_method=pass_all ;; + *) + # glibc up to 2.1.1 does not perform some relocations on ARM + changequote(,)dnl + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' ;; + changequote([, ])dnl + esac + lt_cv_file_magic_test_file=`echo /lib/libc.so* /lib/libc-*.so` + ;; + +netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ > /dev/null; then : + else + changequote(,)dnl + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB shared object' + changequote([, ])dnl + lt_cv_file_magic_cmd='/usr/bin/file -L' + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so*` + fi + ;; + +osf3* | osf4* | osf5*) + # this will be overridden with pass_all, but let us keep it just in case + lt_cv_deplibs_check_method='file_magic COFF format alpha shared library' + lt_cv_file_magic_test_file=/shlib/libc.so + lt_cv_deplibs_check_method=pass_all + ;; + +sco3.2v5*) + lt_cv_deplibs_check_method=pass_all + ;; + +solaris*) + lt_cv_deplibs_check_method=pass_all + lt_cv_file_magic_test_file=/lib/libc.so + ;; + +sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + case "$host_vendor" in + ncr) + lt_cv_deplibs_check_method=pass_all + ;; + motorola) + changequote(,)dnl + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (shared object|dynamic lib) M[0-9][0-9]* Version [0-9]' + changequote([, ])dnl + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so*` + ;; + esac + ;; +esac +]) +file_magic_cmd=$lt_cv_file_magic_cmd +deplibs_check_method=$lt_cv_deplibs_check_method +]) + + +# AC_PROG_NM - find the path to a BSD-compatible name lister +AC_DEFUN(AC_PROG_NM, +[AC_MSG_CHECKING([for BSD-compatible nm]) +AC_CACHE_VAL(ac_cv_path_NM, +[if test -n "$NM"; then + # Let the user override the test. + ac_cv_path_NM="$NM" +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}${PATH_SEPARATOR-:}" + for ac_dir in $PATH /usr/ccs/bin /usr/ucb /bin; do + test -z "$ac_dir" && ac_dir=. + tmp_nm=$ac_dir/${ac_tool_prefix}nm + if test -f $tmp_nm || test -f $tmp_nm$ac_exeext ; then + # Check to see if the nm accepts a BSD-compat flag. + # Adding the `sed 1q' prevents false positives on HP-UX, which says: + # nm: unknown option "B" ignored + # Tru64's nm complains that /dev/null is an invalid object file + if ($tmp_nm -B /dev/null 2>&1 | sed '1q'; exit 0) | egrep '(/dev/null|Invalid file or object type)' >/dev/null; then + ac_cv_path_NM="$tmp_nm -B" + break + elif ($tmp_nm -p /dev/null 2>&1 | sed '1q'; exit 0) | egrep /dev/null >/dev/null; then + ac_cv_path_NM="$tmp_nm -p" + break + else + ac_cv_path_NM=${ac_cv_path_NM="$tmp_nm"} # keep the first match, but + continue # so that we can try to find one that supports BSD flags + fi + fi + done + IFS="$ac_save_ifs" + test -z "$ac_cv_path_NM" && ac_cv_path_NM=nm +fi]) +NM="$ac_cv_path_NM" +AC_MSG_RESULT([$NM]) +]) + +# AC_CHECK_LIBM - check for math library +AC_DEFUN(AC_CHECK_LIBM, +[AC_REQUIRE([AC_CANONICAL_HOST])dnl +LIBM= +case "$host" in +*-*-beos* | *-*-cygwin* | *-*-pw32*) + # These system don't have libm + ;; +*-ncr-sysv4.3*) + AC_CHECK_LIB(mw, _mwvalidcheckl, LIBM="-lmw") + AC_CHECK_LIB(m, main, LIBM="$LIBM -lm") + ;; +*) + AC_CHECK_LIB(m, main, LIBM="-lm") + ;; +esac +]) + +# AC_LIBLTDL_CONVENIENCE[(dir)] - sets LIBLTDL to the link flags for +# the libltdl convenience library and INCLTDL to the include flags for +# the libltdl header and adds --enable-ltdl-convenience to the +# configure arguments. Note that LIBLTDL and INCLTDL are not +# AC_SUBSTed, nor is AC_CONFIG_SUBDIRS called. If DIR is not +# provided, it is assumed to be `libltdl'. LIBLTDL will be prefixed +# with '${top_builddir}/' and INCLTDL will be prefixed with +# '${top_srcdir}/' (note the single quotes!). If your package is not +# flat and you're not using automake, define top_builddir and +# top_srcdir appropriately in the Makefiles. +AC_DEFUN(AC_LIBLTDL_CONVENIENCE, [AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl + case "$enable_ltdl_convenience" in + no) AC_MSG_ERROR([this package needs a convenience libltdl]) ;; + "") enable_ltdl_convenience=yes + ac_configure_args="$ac_configure_args --enable-ltdl-convenience" ;; + esac + LIBLTDL='${top_builddir}/'ifelse($#,1,[$1],['libltdl'])/libltdlc.la + INCLTDL='-I${top_srcdir}/'ifelse($#,1,[$1],['libltdl']) +]) + +# AC_LIBLTDL_INSTALLABLE[(dir)] - sets LIBLTDL to the link flags for +# the libltdl installable library and INCLTDL to the include flags for +# the libltdl header and adds --enable-ltdl-install to the configure +# arguments. Note that LIBLTDL and INCLTDL are not AC_SUBSTed, nor is +# AC_CONFIG_SUBDIRS called. If DIR is not provided and an installed +# libltdl is not found, it is assumed to be `libltdl'. LIBLTDL will +# be prefixed with '${top_builddir}/' and INCLTDL will be prefixed +# with '${top_srcdir}/' (note the single quotes!). If your package is +# not flat and you're not using automake, define top_builddir and +# top_srcdir appropriately in the Makefiles. +# In the future, this macro may have to be called after AC_PROG_LIBTOOL. +AC_DEFUN(AC_LIBLTDL_INSTALLABLE, [AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl + AC_CHECK_LIB(ltdl, main, + [test x"$enable_ltdl_install" != xyes && enable_ltdl_install=no], + [if test x"$enable_ltdl_install" = xno; then + AC_MSG_WARN([libltdl not installed, but installation disabled]) + else + enable_ltdl_install=yes + fi + ]) + if test x"$enable_ltdl_install" = x"yes"; then + ac_configure_args="$ac_configure_args --enable-ltdl-install" + LIBLTDL='${top_builddir}/'ifelse($#,1,[$1],['libltdl'])/libltdl.la + INCLTDL='-I${top_srcdir}/'ifelse($#,1,[$1],['libltdl']) + else + ac_configure_args="$ac_configure_args --enable-ltdl-install=no" + LIBLTDL="-lltdl" + INCLTDL= + fi +]) + +# If this macro is not defined by Autoconf, define it here. +ifdef([AC_PROVIDE_IFELSE], + [], + [define([AC_PROVIDE_IFELSE], + [ifdef([AC_PROVIDE_$1], + [$2], [$3])])]) + +# AC_LIBTOOL_CXX - enable support for C++ libraries +AC_DEFUN(AC_LIBTOOL_CXX,[AC_REQUIRE([_AC_LIBTOOL_CXX])]) +AC_DEFUN(_AC_LIBTOOL_CXX, +[AC_REQUIRE([AC_PROG_LIBTOOL]) +AC_REQUIRE([AC_PROG_CXX]) +AC_REQUIRE([AC_PROG_CXXCPP]) +LIBTOOL_DEPS=$LIBTOOL_DEPS" $ac_aux_dir/ltcf-cxx.sh" +lt_save_CC="$CC" +lt_save_CFLAGS="$CFLAGS" +dnl Make sure LTCC is set to the C compiler, i.e. set LTCC before CC +dnl is set to the C++ compiler. +AR="$AR" LTCC="$CC" CC="$CXX" CXX="$CXX" CFLAGS="$CXXFLAGS" CPPFLAGS="$CPPFLAGS" \ +MAGIC_CMD="$MAGIC_CMD" LDFLAGS="$LDFLAGS" LIBS="$LIBS" \ +LN_S="$LN_S" NM="$NM" RANLIB="$RANLIB" STRIP="$STRIP" \ +AS="$AS" DLLTOOL="$DLLTOOL" OBJDUMP="$OBJDUMP" \ +objext="$OBJEXT" exeext="$EXEEXT" reload_flag="$reload_flag" \ +deplibs_check_method="$deplibs_check_method" \ +file_magic_cmd="$file_magic_cmd" \ +${CONFIG_SHELL-/bin/sh} $ac_aux_dir/ltconfig -o libtool $libtool_flags \ +--build="$build" --add-tag=CXX $ac_aux_dir/ltcf-cxx.sh $host \ +|| AC_MSG_ERROR([libtool tag configuration failed]) +CC="$lt_save_CC" +CFLAGS="$lt_save_CFLAGS" + +# Redirect the config.log output again, so that the ltconfig log is not +# clobbered by the next message. +exec 5>>./config.log +]) + +# AC_LIBTOOL_GCJ - enable support for GCJ libraries +AC_DEFUN(AC_LIBTOOL_GCJ,[AC_REQUIRE([_AC_LIBTOOL_GCJ])]) +AC_DEFUN(_AC_LIBTOOL_GCJ, +[AC_REQUIRE([AC_PROG_LIBTOOL]) +AC_PROVIDE_IFELSE([AC_PROG_GCJ],[], + [AC_PROVIDE_IFELSE([A][M_PROG_GCJ],[], + [AC_PROVIDE_IFELSE([LT_AC_PROG_GCJ],[], + [ifdef([AC_PROG_GCJ],[AC_REQUIRE([AC_PROG_GCJ])], + [ifdef([A][M_PROG_GCJ],[AC_REQUIRE([A][M_PROG_GCJ])], + [AC_REQUIRE([A][C_PROG_GCJ_OR_A][M_PROG_GCJ])])])])])]) +LIBTOOL_DEPS=$LIBTOOL_DEPS" $ac_aux_dir/ltcf-gcj.sh" +lt_save_CC="$CC" +lt_save_CFLAGS="$CFLAGS" +dnl Make sure LTCC is set to the C compiler, i.e. set LTCC before CC +dnl is set to the C++ compiler. +AR="$AR" LTCC="$CC" CC="$GCJ" CFLAGS="$GCJFLAGS" CPPFLAGS="$CPPFLAGS" \ +MAGIC_CMD="$MAGIC_CMD" LDFLAGS="$LDFLAGS" LIBS="$LIBS" \ +LN_S="$LN_S" NM="$NM" RANLIB="$RANLIB" STRIP="$STRIP" \ +AS="$AS" DLLTOOL="$DLLTOOL" OBJDUMP="$OBJDUMP" \ +objext="$OBJEXT" exeext="$EXEEXT" reload_flag="$reload_flag" \ +deplibs_check_method="$deplibs_check_method" \ +file_magic_cmd="$file_magic_cmd" \ +${CONFIG_SHELL-/bin/sh} $ac_aux_dir/ltconfig -o libtool $libtool_flags \ +--build="$build" --add-tag=GCJ $ac_aux_dir/ltcf-gcj.sh $host \ +|| AC_MSG_ERROR([libtool tag configuration failed]) +CC="$lt_save_CC" +CFLAGS="$lt_save_CFLAGS" + +# Redirect the config.log output again, so that the ltconfig log is not +# clobbered by the next message. +exec 5>>./config.log +]) + +dnl old names +AC_DEFUN(AM_PROG_LIBTOOL, [indir([AC_PROG_LIBTOOL])])dnl +AC_DEFUN(AM_ENABLE_SHARED, [indir([AC_ENABLE_SHARED], $@)])dnl +AC_DEFUN(AM_ENABLE_STATIC, [indir([AC_ENABLE_STATIC], $@)])dnl +AC_DEFUN(AM_DISABLE_SHARED, [indir([AC_DISABLE_SHARED], $@)])dnl +AC_DEFUN(AM_DISABLE_STATIC, [indir([AC_DISABLE_STATIC], $@)])dnl +AC_DEFUN(AM_PROG_LD, [indir([AC_PROG_LD])])dnl +AC_DEFUN(AM_PROG_NM, [indir([AC_PROG_NM])])dnl + +dnl This is just to silence aclocal about the macro not being used +ifelse([AC_DISABLE_FAST_INSTALL])dnl + +AC_DEFUN([LT_AC_PROG_GCJ],[ + AC_CHECK_TOOL(GCJ, gcj, no) + test "x${GCJFLAGS+set}" = xset || GCJFLAGS="-g -O2" + AC_SUBST(GCJFLAGS) +]) diff --git a/contrib/binutils/ltcf-cxx.sh b/contrib/binutils/ltcf-cxx.sh new file mode 100644 index 000000000000..cefa0085624a --- /dev/null +++ b/contrib/binutils/ltcf-cxx.sh @@ -0,0 +1,887 @@ +#### This script is meant to be sourced by ltconfig. + +# ltcf-cxx.sh - Create a C++ compiler specific configuration +# +# Copyright (C) 1996-1999,2000 Free Software Foundation, Inc. +# Originally by Gordon Matzigkeit <gord@gnu.ai.mit.edu>, 1996 +# +# Original C++ support by:Gary V. Vaughan <gvv@techie.com> +# Alexandre Oliva <oliva@lsd.ic.unicamp.br> +# Ossama Othman <ossama@debian.org> +# Thomas Thanner <tanner@gmx.de> +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + + +# Source file extension for C++ test sources. +ac_ext=cc + +# Object file extension for compiled C++ test sources. +objext=o + +# Code to be used in simple compile tests +lt_simple_compile_test_code="int some_variable = 0;" + +# Code to be used in simple link tests +lt_simple_link_test_code='int main(int, char *[]) { return (0); }' + +# C++ compiler +CXX=${CXX-c++} + +# ltmain only uses $CC for tagged configurations so make sure $CC is set. +CC=${CC-"$CXX"} +CFLAGS=${CFLAGS-"$CXXFLAGS"} + +# Allow CC to be a program name with arguments. +set dummy $CC +compiler=$2 +cc_basename=`$echo X"$compiler" | $Xsed -e 's%^.*/%%'` + +# Check if we are using GNU gcc (taken/adapted from configure script) +# We need to check here since "--with-gcc" is set at configure time, +# not ltconfig time! +cat > conftest.$ac_ext <<EOF +#ifdef __GNUC__ + yes; +#endif +EOF +if { ac_try='${CC-c++} -E conftest.$ac_ext'; { (eval echo \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then + with_gcc=yes + + # Set up default GNU C++ configuration + + # Check if GNU C++ uses GNU ld as the underlying linker, since the + # archiving commands below assume that GNU ld is being used. + if eval "`$CC -print-prog-name=ld` --version 2>&1" | \ + egrep 'GNU ld' > /dev/null; then + with_gnu_ld=yes + + archive_cmds='$CC -shared -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + + hardcode_libdir_flag_spec='${wl}--rpath ${wl}$libdir' + export_dynamic_flag_spec='${wl}--export-dynamic' + + # If archive_cmds runs LD, not CC, wlarc should be empty + # XXX I think wlarc can be eliminated in ltcf-cxx, but I need to + # investigate it a little bit more. (MM) + wlarc='${wl}' + + # ancient GNU ld didn't support --whole-archive et. al. + if eval "`$CC -print-prog-name=ld` --help 2>&1" | \ + egrep 'no-whole-archive' > /dev/null; then + whole_archive_flag_spec="$wlarc"'--whole-archive$convenience '"$wlarc"'--no-whole-archive' + else + whole_archive_flag_spec= + fi + else + with_gnu_ld=no + wlarc= + + # A generic and very simple default shared library creation + # command for GNU C++ for the case where it uses the native + # linker, instead of GNU ld. If possible, this setting should + # overridden to take advantage of the native linker features on + # the platform it is being used on. + archive_cmds='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -o $lib' + fi + + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + output_verbose_link_cmds='$CC -shared $CFLAGS -v conftest.$objext 2>&1 | egrep "\-L"' + +else + with_gcc=no + with_gnu_ld=no + wlarc= +fi + +# In general, the C++ compiler should always link C++ objects. +case $target in +*aix3* | *aix4*) + # AIX just has to be different, doesn't it? :-\ + LD=makeC++SharedLib_r + LDFLAGS="$LDFLAGS -p 0" + ;; +*) + LD="$CC" + LDFLAGS="$LDFLAGS" + ;; +esac + + +# PORTME: fill in a description of your system's C++ link characteristics +case "$host_os" in + aix3*) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + aix4*) + archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs $compiler_flags ${wl}-bE:$export_symbols ${wl}-bnoentry${allow_undefined_flag}~$AR $AR_FLAGS $output_objdir/$libname$release.a $output_objdir/$soname' + # -bexpall does not export symbols beginning with underscore (_) + always_export_symbols=yes + # Exported symbols can be pulled into shared objects from archives + whole_archive_flag_spec=' ' + build_libtool_need_lc=yes + ;; + chorus*) + case "$cc_basename" in + *) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + esac + ;; + dgux*) + case "$cc_basename" in + ec++) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + ghcx) + # Green Hills C++ Compiler + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + *) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + esac + ;; + freebsd*) + # FreeBSD uses GNU C++ and GNU ld + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + hpux*) + case "$cc_basename" in + CC) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + aCC) + case "$host_os" in + hpux9*) archive_cmds='$rm $output_objdir/$soname~$CC -b ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib' ;; + *) archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags' ;; + esac + hardcode_libdir_flag_spec='${wl}+b ${wl}$libdir' + hardcode_libdir_separator=: + hardcode_direct=yes + hardcode_minus_L=yes # Not in the search PATH, but as the default + # location of the library. + export_dynamic_flag_spec='${wl}-E' + + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + # + # There doesn't appear to be a way to prevent this compiler from + # explicitly linking system object files so we need to strip them + # from the output so that they don't get included in the library + # dependencies. + output_verbose_link_cmds='templist=`($CC -b $CFLAGS -v conftest.$objext 2>&1) | egrep "\-L"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; echo $list' + ;; + *) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + esac + ;; + irix5* | irix6*) + case "$cc_basename" in + CC) + # SGI C++ + archive_cmds='$CC -shared -all -multigot $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${objdir}/so_locations -o $lib' + + # Archives containing C++ object files must be created using + # "CC -ar", where "CC" is the IRIX C++ compiler. This is + # necessary to make sure instantiated templates are included + # in the archive. + old_archive_cmds='$CC -ar -WR,-u -o $oldlib $oldobjs' + ;; + *) + if test "$with_gcc" = yes; then + if test "$with_gnu_ld" = no; then + archive_cmds='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${objdir}/so_locations -o $lib' + else + archive_cmds='$LD -shared $predep_objects $libobjs $deplibs $postdep_objects $linker_flags -soname $soname `test -n "$verstring" && echo -set_version $verstring` -o $lib' + fi + fi + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + link_all_deplibs=yes + ;; + esac + ;; + linux*) + case "$cc_basename" in + KCC) + # Kuck and Associates, Inc. (KAI) C++ Compiler + + # KCC will only create a shared library if the output file + # ends with ".so" (or ".sl" for HP-UX), so rename the library + # to its proper name (with version) after linking. + archive_cmds='templib=`echo $lib | sed -e "s/\.so\..*/\.so/"`; $CC $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags --soname $soname -o \$templib; mv \$templib $lib' + archive_expsym_cmds='templib=`echo $lib | sed -e "s/\.so\..*/\.so/"`; $CC $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags --soname $soname -o \$templib ${wl}-retain-symbols-file,$export_symbols; mv \$templib $lib' + + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + # + # There doesn't appear to be a way to prevent this compiler from + # explicitly linking system object files so we need to strip them + # from the output so that they don't get included in the library + # dependencies. + output_verbose_link_cmds='templist=`$CC $CFLAGS -v conftest.$objext -o libconftest.so 2>&1 | egrep "ld"`; rm -f libconftest.so; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; echo $list' + + hardcode_libdir_flag_spec='${wl}--rpath,$libdir' + export_dynamic_flag_spec='${wl}--export-dynamic' + + # Archives containing C++ object files must be created using + # "CC -Bstatic", where "CC" is the KAI C++ compiler. + old_archive_cmds='$CC -Bstatic -o $oldlib $oldobjs' + ;; + cxx) + # Compaq C++ + archive_cmds='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname -o $lib ${wl}-retain-symbols-file $wl$export_symbols' + + runpath_var=LD_RUN_PATH + hardcode_libdir_flag_spec='-rpath $libdir' + hardcode_libdir_separator=: + + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + # + # There doesn't appear to be a way to prevent this compiler from + # explicitly linking system object files so we need to strip them + # from the output so that they don't get included in the library + # dependencies. + output_verbose_link_cmds='templist=`$CC -shared $CFLAGS -v conftest.$objext 2>&1 | grep "ld"`; templist=`echo $templist | sed "s/\(^.*ld.*\)\( .*ld .*$\)/\1/"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; echo $list' + ;; + esac + ;; + lynxos*) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + m88k*) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + mvs*) + case "$cc_basename" in + cxx) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + *) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + esac + ;; + netbsd*) + # NetBSD uses g++ - do we need to do anything? + ;; + osf3*) + if test "$with_gcc" = yes && test "$with_gnu_ld" = no; then + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared -nostdlib ${allow_undefined_flag} $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${objdir}/so_locations -o $lib' + + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + output_verbose_link_cmds='$CC -shared $CFLAGS -v conftest.$objext 2>&1 | egrep "\-L"' + fi + + case "$cc_basename" in + KCC) + # Kuck and Associates, Inc. (KAI) C++ Compiler + + # KCC will only create a shared library if the output file + # ends with ".so" (or ".sl" for HP-UX), so rename the library + # to its proper name (with version) after linking. + archive_cmds='templib=`echo $lib | sed -e "s/\.so\..*/\.so/"`; $CC $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags --soname $soname -o \$templib; mv \$templib $lib' + + hardcode_libdir_flag_spec='${wl}-rpath,$libdir' + hardcode_libdir_separator=: + + # Archives containing C++ object files must be created using + # "CC -Bstatic", where "CC" is the KAI C++ compiler. + old_archive_cmds='$CC -Bstatic -o $oldlib $oldobjs' + + ;; + RCC) + # Rational C++ 2.4.1 + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + cxx) + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared${allow_undefined_flag} $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $soname `test -n "$verstring" && echo ${wl}-set_version $verstring` -update_registry ${objdir}/so_locations -o $lib' + + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + # + # There doesn't appear to be a way to prevent this compiler from + # explicitly linking system object files so we need to strip them + # from the output so that they don't get included in the library + # dependencies. + output_verbose_link_cmds='templist=`$CC -shared $CFLAGS -v conftest.$objext 2>&1 | grep "ld" | grep -v "ld:"`; templist=`echo $templist | sed "s/\(^.*ld.*\)\( .*ld.*$\)/\1/"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; echo $list' + ;; + *) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + esac + ;; + osf4* | osf5*) + if test "$with_gcc" = yes && test "$with_gnu_ld" = no; then + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared -nostdlib ${allow_undefined_flag} $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${objdir}/so_locations -o $lib' + + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + output_verbose_link_cmds='$CC -shared $CFLAGS -v conftest.$objext 2>&1 | egrep "\-L"' + fi + + case "$cc_basename" in + KCC) + # Kuck and Associates, Inc. (KAI) C++ Compiler + + # KCC will only create a shared library if the output file + # ends with ".so" (or ".sl" for HP-UX), so rename the library + # to its proper name (with version) after linking. + archive_cmds='templib=`echo $lib | sed -e "s/\.so\..*/\.so/"`; $CC $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags --soname $soname -o \$templib; mv \$templib $lib' + + hardcode_libdir_flag_spec='${wl}-rpath,$libdir' + hardcode_libdir_separator=: + + # Archives containing C++ object files must be created using + # the KAI C++ compiler. + old_archive_cmds='$CC -o $oldlib $oldobjs' + ;; + RCC) + # Rational C++ 2.4.1 + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + cxx) + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared${allow_undefined_flag} $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-msym ${wl}-soname $soname `test -n "$verstring" && echo ${wl}-set_version $verstring` -update_registry ${objdir}/so_locations -o $lib' + + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + # + # There doesn't appear to be a way to prevent this compiler from + # explicitly linking system object files so we need to strip them + # from the output so that they don't get included in the library + # dependencies. + output_verbose_link_cmds='templist=`$CC -shared $CFLAGS -v conftest.$objext 2>&1 | grep "ld" | grep -v "ld:"`; templist=`echo $templist | sed "s/\(^.*ld.*\)\( .*ld.*$\)/\1/"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; echo $list' + ;; + *) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + esac + ;; + psos*) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + sco*) + case "$cc_basename" in + CC) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + *) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + esac + ;; + sunos4*) + case "$cc_basename" in + CC) + # Sun C++ 4.x + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + lcc) + # Lucid + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + *) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + esac + ;; + solaris*) + case "$cc_basename" in + CC) + # Sun C++ 4.2, 5.x and Centerline C++ + no_undefined_flag=' -ztext' + archive_cmds='$CC -G${allow_undefined_flag} -nolib -h$soname -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags' + archive_expsym_cmds='$echo "{ global:" > $lib.exp~cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~ + $CC -G${allow_undefined_flag} -nolib ${wl}-M ${wl}$lib.exp -h$soname -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags~$rm $lib.exp' + + hardcode_libdir_flag_spec='-R$libdir' + hardcode_shlibpath_var=no + case "$host_os" in + solaris2.[0-5] | solaris2.[0-5].*) ;; + *) + # The C++ compiler is used as linker so we must use $wl + # flag to pass the commands to the underlying system + # linker. + # Supported since Solaris 2.6 (maybe 2.5.1?) + whole_archive_flag_spec='${wl}-z ${wl}allextract$convenience ${wl}-z ${wl}defaultextract' + ;; + esac + link_all_deplibs=yes + + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + # + # There doesn't appear to be a way to prevent this compiler from + # explicitly linking system object files so we need to strip them + # from the output so that they don't get included in the library + # dependencies. + output_verbose_link_cmds='templist=`$CC -G $CFLAGS -v conftest.$objext 2>&1 | egrep "\-R|\-L"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; echo $list' + + # Archives containing C++ object files must be created using + # "CC -xar", where "CC" is the Sun C++ compiler. This is + # necessary to make sure instantiated templates are included + # in the archive. + old_archive_cmds='$CC -xar -o $oldlib $oldobjs' + ;; + gcx) + # Green Hills C++ Compiler + archive_cmds='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-h $wl$soname -o $lib' + + # The C++ compiler must be used to create the archive. + old_archive_cmds='$CC $LDFLAGS -archive -o $oldlib $oldobjs' + ;; + *) + # GNU C++ compiler with Solaris linker + if test "$with_gcc" = yes && test "$with_gnu_ld" = no; then + if $CC --version | egrep -v '^2\.7' > /dev/null; then + archive_cmds='$LD -shared -nostdlib $LDFLAGS $predep_objects $libobjs $deplibs $postdep_objects $linker_flags ${wl}-h $wl$soname -o $lib' + archive_expsym_cmds='$echo "{ global:" > $lib.exp~cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~ + $LD -shared -nostdlib ${wl}-M $wl$lib.exp -o $lib $predep_objects $libobjs $deplibs $postdep_objects $linker_flags~$rm $lib.exp' + + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + output_verbose_link_cmds="$CC -shared $CFLAGS -v conftest.$objext 2>&1 | egrep \"\-L\"" + else + # g++ 2.7 appears to require `-G' NOT `-shared' on this + # platform. + archive_cmds='$LD -G -nostdlib $LDFLAGS $predep_objects $libobjs $deplibs $postdep_objects $linker_flags ${wl}-h $wl$soname -o $lib' + archive_expsym_cmds='$echo "{ global:" > $lib.exp~cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~ + $LD -G -nostdlib ${wl}-M $wl$lib.exp -o $lib $predep_objects $libobjs $deplibs $postdep_objects $linker_flags~$rm $lib.exp' + + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + output_verbose_link_cmds="$CC -G $CFLAGS -v conftest.$objext 2>&1 | egrep \"\-L\"" + fi + + hardcode_libdir_flag_spec='${wl}-R $wl$libdir' + fi + ;; + esac + ;; + tandem*) + case "$cc_basename" in + NCC) + # NonStop-UX NCC 3.20 + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + *) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + esac + ;; + unixware*) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + vxworks*) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; + *) + # FIXME: insert proper C++ library support + ld_shlibs=no + ;; +esac + + +## Compiler Characteristics: PIC flags, static flags, etc + +# We don't use cached values here since only the C compiler +# characteristics should be cached. +ac_cv_prog_cc_pic= +ac_cv_prog_cc_shlib= +ac_cv_prog_cc_wl= +ac_cv_prog_cc_static= +ac_cv_prog_cc_no_builtin= +ac_cv_prog_cc_can_build_shared=$can_build_shared + +# It is not enough to reset these cached values, they must be unset. +unset ac_cv_prog_cc_pic_works +unset ac_cv_prog_cc_static_works + +if test "$with_gcc" = yes; then + ac_cv_prog_cc_wl='-Wl,' + ac_cv_prog_cc_static='-static' + + case "$host_os" in + beos* | irix5* | irix6* | osf3* | osf4* | osf5*) + # PIC is the default for these OSes. + ;; + aix*) + # Below there is a dirty hack to force normal static linking with -ldl + # The problem is because libdl dynamically linked with both libc and + # libC (AIX C++ library), which obviously doesn't included in libraries + # list by gcc. This cause undefined symbols with -static flags. + # This hack allows C programs to be linked with "-static -ldl", but + # we not sure about C++ programs. + ac_cv_prog_cc_static="$ac_cv_prog_cc_static ${ac_cv_prog_cc_wl}-lC" + ;; + cygwin* | mingw* | os2*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + ac_cv_prog_cc_pic='-DDLL_EXPORT' + ;; + amigaos*) + # FIXME: we need at least 68020 code to build shared libraries, but + # adding the `-m68020' flag to GCC prevents building anything better, + # like `-m68040'. + ac_cv_prog_cc_pic='-m68020 -resident32 -malways-restore-a4' + ;; + sysv4*MP*) + if test -d /usr/nec; then + ac_cv_prog_cc_pic=-Kconform_pic + fi + ;; + *) + ac_cv_prog_cc_pic='-fPIC' + ;; + esac +else + case "$host_os" in + aix4*) + # All AIX code is PIC. + ;; + chorus*) + case "$cc_basename" in + cxch68) + # Green Hills C++ Compiler + # ac_cv_prog_cc_static="--no_auto_instantiation -u __main -u __premain -u _abort -r $COOL_DIR/lib/libOrb.a $MVME_DIR/lib/CC/libC.a $MVME_DIR/lib/classix/libcx.s.a" + ;; + esac + ;; + dgux*) + case "$cc_basename" in + ec++) + ac_cv_prog_cc_pic='-KPIC' + ;; + ghcx) + # Green Hills C++ Compiler + ac_cv_prog_cc_pic='-pic' + ;; + *) + ;; + esac + ;; + freebsd*) + # FreeBSD uses GNU C++ + ;; + hpux9* | hpux10* | hpux11*) + case "$cc_basename" in + CC) + ac_cv_prog_cc_wl='-Wl,' + ac_cv_prog_cc_static="${ac_cv_prog_cc_wl}-a ${ac_cv_prog_cc_wl}archive" + ac_cv_prog_cc_pic='+Z' + ;; + aCC) + ac_cv_prog_cc_wl='-Wl,' + ac_cv_prog_cc_static="${ac_cv_prog_cc_wl}-a ${ac_cv_prog_cc_wl}archive" + ac_cv_prog_cc_pic='+Z' + ;; + *) + ;; + esac + ;; + irix5* | irix6*) + case "$cc_basename" in + CC) + ac_cv_prog_cc_wl='-Wl,' + ac_cv_prog_cc_static='-non_shared' + ac_cv_prog_cc_pic='-KPIC' + ;; + *) + ;; + esac + ;; + linux*) + case "$cc_basename" in + KCC) + # KAI C++ Compiler + ac_cv_prog_cc_wl='--backend -Wl,' + ac_cv_prog_cc_pic='-fPIC' + ;; + cxx) + # Compaq C++ + # Make sure the PIC flag is empty. It appears that all Alpha + # Linux and Compaq Tru64 Unix objects are PIC. + ac_cv_prog_cc_pic= + ac_cv_prog_cc_static='-non_shared' + ;; + *) + ;; + esac + ;; + lynxos*) + ;; + m88k*) + ;; + mvs*) + case "$cc_basename" in + cxx) + ac_cv_prog_cc_pic='-W c,exportall' + ;; + *) + ;; + esac + ;; + netbsd*) + ;; + osf3* | osf4* | osf5*) + case "$cc_basename" in + KCC) + ac_cv_prog_cc_wl='--backend -Wl,' + ;; + RCC) + # Rational C++ 2.4.1 + ac_cv_prog_cc_pic='-pic' + ;; + cxx) + # Digital/Compaq C++ + ac_cv_prog_cc_wl='-Wl,' + # Make sure the PIC flag is empty. It appears that all Alpha + # Linux and Compaq Tru64 Unix objects are PIC. + ac_cv_prog_cc_pic= + ac_cv_prog_cc_static='-non_shared' + ;; + *) + ;; + esac + ;; + psos*) + ;; + sco*) + case "$cc_basename" in + CC) + ac_cv_prog_cc_pic='-fPIC' + ;; + *) + ;; + esac + ;; + solaris*) + case "$cc_basename" in + CC) + # Sun C++ 4.2, 5.x and Centerline C++ + ac_cv_prog_cc_pic='-KPIC' + ac_cv_prog_cc_static='-Bstatic' + ac_cv_prog_cc_wl='-Qoption ld ' + ;; + gcx) + # Green Hills C++ Compiler + ac_cv_prog_cc_pic='-PIC' + ;; + *) + ;; + esac + ;; + sunos4*) + case "$cc_basename" in + CC) + # Sun C++ 4.x + ac_cv_prog_cc_pic='-pic' + ac_cv_prog_cc_static='-Bstatic' + ;; + lcc) + # Lucid + ac_cv_prog_cc_pic='-pic' + ;; + *) + ;; + esac + ;; + tandem*) + case "$cc_basename" in + NCC) + # NonStop-UX NCC 3.20 + ac_cv_prog_cc_pic='-KPIC' + ;; + *) + ;; + esac + ;; + unixware*) + ;; + vxworks*) + ;; + *) + ac_cv_prog_cc_can_build_shared=no + ;; + esac +fi +ac_cv_prog_cc_pic="$ac_cv_prog_cc_pic -DPIC" + + +# Figure out "hidden" C++ library dependencies from verbose +# compiler output whening linking a shared library. +cat > conftest.$ac_ext <<EOF +class Foo +{ +public: + Foo (void) { a = 0; } +private: + int a; +}; +EOF + + +if eval $ac_compile 2>&5; then + # Parse the compiler output and extract the necessary + # objects, libraries and library flags. + + # Sentinel used to keep track of whether or not we are before + # the conftest object file. + pre_test_object_deps_done=no + + for p in `eval $output_verbose_link_cmds`; do + + case $p in + + -L* | -R* | -l*) + # Some compilers place space between "-{L,R}" and the path. + # Remove the space. + if test $p = "-L" \ + || test $p = "-R"; then + prev=$p + continue + else + prev= + fi + + if test "$pre_test_object_deps_done" = no; then + case $p in + -L* | -R*) + # Internal compiler library paths should come after those + # provided the user. The postdeps already come after the + # user supplied libs so there is no need to process them. + if test -z "$compiler_lib_search_path"; then + compiler_lib_search_path="${prev}${p}" + else + compiler_lib_search_path="${compiler_lib_search_path} ${prev}${p}" + fi + ;; + # The "-l" case would never come before the object being + # linked, so don't bother handling this case. + esac + else + if test -z "$postdeps"; then + postdeps="${prev}${p}" + else + postdeps="${postdeps} ${prev}${p}" + fi + fi + ;; + + *.$objext) + # This assumes that the test object file only shows up + # once in the compiler output. + if test "$p" = "conftest.$objext"; then + pre_test_object_deps_done=yes + continue + fi + + if test "$pre_test_object_deps_done" = no; then + if test -z "$predep_objects"; then + predep_objects="$p" + else + predep_objects="$predep_objects $p" + fi + else + if test -z "$postdep_objects"; then + postdep_objects="$p" + else + postdep_objects="$postdep_objects $p" + fi + fi + ;; + + *) ;; # Ignore the rest. + + esac + done + + # Clean up. + rm -f a.out +else + echo "ltcf-cxx.sh: error: problem compiling test program" +fi + +$rm -f confest.$objext + +case " $postdeps " in +*" -lc "*) need_lc=no ;; +*) need_lc=yes ;; +esac diff --git a/contrib/binutils/ltcf-gcj.sh b/contrib/binutils/ltcf-gcj.sh new file mode 100644 index 000000000000..f82163dc1472 --- /dev/null +++ b/contrib/binutils/ltcf-gcj.sh @@ -0,0 +1,571 @@ +#### This script is meant to be sourced by ltconfig. + +# ltcf-gcj.sh - Create a GCJ compiler specific configuration +# +# Copyright (C) 1996-1999, 2000, 2001 Free Software Foundation, Inc. +# Originally by Gordon Matzigkeit <gord@gnu.ai.mit.edu>, 1996 +# +# Original GCJ support by: +# Alexandre Oliva <oliva@lsd.ic.unicamp.br> +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + + +# Source file extension for Java test sources. +ac_ext=java + +# Object file extension for compiled Java test sources. +objext=o + +# Code to be used in simple compile tests +lt_simple_compile_test_code="class foo {}" + +# Code to be used in simple link tests +lt_simple_link_test_code='public class conftest { public static void main(String[] argv) {}; }' + +## Linker Characteristics +case "$host_os" in +cygwin* | mingw*) + # FIXME: the MSVC++ port hasn't been tested in a loooong time + # When not using gcc, we currently assume that we are using + # Microsoft Visual C++. + if test "$with_gcc" != yes; then + with_gnu_ld=no + fi + ;; + +esac + +ld_shlibs=yes +if test "$with_gnu_ld" = yes; then + # If archive_cmds runs LD, not CC, wlarc should be empty + wlarc='${wl}' + + # See if GNU ld supports shared libraries. + case "$host_os" in + aix3* | aix4*) + # On AIX, the GNU linker is very broken + ld_shlibs=no + cat <<EOF 1>&2 + +*** Warning: the GNU linker, at least up to release 2.9.1, is reported +*** to be unable to reliably create shared libraries on AIX. +*** Therefore, libtool is disabling shared libraries support. If you +*** really care for shared libraries, you may want to modify your PATH +*** so that a non-GNU linker is found, and then restart. + +EOF + ;; + + amigaos*) + archive_cmds='$rm $output_objdir/a2ixlibrary.data~$echo "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$echo "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$echo "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$echo "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + + # Samuel A. Falvo II <kc5tja@dolphin.openprojects.net> reports + # that the semantics of dynamic libraries on AmigaOS, at least up + # to version 4, is to share data among multiple programs linked + # with the same dynamic library. Since this doesn't match the + # behavior of shared libraries on other platforms, we can use + # them. + ld_shlibs=no + ;; + + beos*) + if $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + allow_undefined_flag=unsupported + # Joseph Beckenbach <jrb3@best.com> says some releases of gcc + # support --undefined. This deserves some investigation. FIXME + archive_cmds='$CC -nostart $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + else + ld_shlibs=no + fi + ;; + + cygwin* | mingw*) + # hardcode_libdir_flag_spec is actually meaningless, as there is + # no search path for DLLs. + hardcode_libdir_flag_spec='-L$libdir' + allow_undefined_flag=unsupported + always_export_symbols=yes + + extract_expsyms_cmds='test -f $output_objdir/impgen.c || \ + sed -e "/^# \/\* impgen\.c starts here \*\//,/^# \/\* impgen.c ends here \*\// { s/^# //; p; }" -e d < $0 > $output_objdir/impgen.c~ + test -f $output_objdir/impgen.exe || (cd $output_objdir && \ + if test "x$HOST_CC" != "x" ; then $HOST_CC -o impgen impgen.c ; \ + else $CC -o impgen impgen.c ; fi)~ + $output_objdir/impgen $dir/$soname > $output_objdir/$soname-def' + + old_archive_from_expsyms_cmds='$DLLTOOL --as=$AS --dllname $soname --def $output_objdir/$soname-def --output-lib $output_objdir/$newlib' + + # cygwin and mingw dlls have different entry points and sets of symbols + # to exclude. + # FIXME: what about values for MSVC? + dll_entry=__cygwin_dll_entry@12 + dll_exclude_symbols=DllMain@12,_cygwin_dll_entry@12,_cygwin_noncygwin_dll_entry@12~ + case "$host_os" in + mingw*) + # mingw values + dll_entry=_DllMainCRTStartup@12 + dll_exclude_symbols=DllMain@12,DllMainCRTStartup@12,DllEntryPoint@12~ + ;; + esac + + # mingw and cygwin differ, and it's simplest to just exclude the union + # of the two symbol sets. + dll_exclude_symbols=DllMain@12,_cygwin_dll_entry@12,_cygwin_noncygwin_dll_entry@12,DllMainCRTStartup@12,DllEntryPoint@12 + + # recent cygwin and mingw systems supply a stub DllMain which the user + # can override, but on older systems we have to supply one (in ltdll.c) + if test "x$lt_cv_need_dllmain" = "xyes"; then + ltdll_obj='$output_objdir/$soname-ltdll.'"$objext " + ltdll_cmds='test -f $output_objdir/$soname-ltdll.c || sed -e "/^# \/\* ltdll\.c starts here \*\//,/^# \/\* ltdll.c ends here \*\// { s/^# //; p; }" -e d < $0 > $output_objdir/$soname-ltdll.c~ + test -f $output_objdir/$soname-ltdll.$objext || (cd $output_objdir && $CC -c $soname-ltdll.c)~' + else + ltdll_obj= + ltdll_cmds= + fi + + # Extract the symbol export list from an `--export-all' def file, + # then regenerate the def file from the symbol export list, so that + # the compiled dll only exports the symbol export list. + # Be careful not to strip the DATA tag left be newer dlltools. + export_symbols_cmds="$ltdll_cmds"' + $DLLTOOL --export-all --exclude-symbols '$dll_exclude_symbols' --output-def $output_objdir/$soname-def '$ltdll_obj'$libobjs $convenience~ + sed -e "1,/EXPORTS/d" -e "s/ @ [0-9]*//" -e "s/ *;.*$//" < $output_objdir/$soname-def > $export_symbols' + + # If DATA tags from a recent dlltool are present, honour them! + archive_expsym_cmds='echo EXPORTS > $output_objdir/$soname-def~ + _lt_hint=1; + cat $export_symbols | while read symbol; do + set dummy \$symbol; + case \$# in + 2) echo " \$2 @ \$_lt_hint ; " >> $output_objdir/$soname-def;; + *) echo " \$2 @ \$_lt_hint \$3 ; " >> $output_objdir/$soname-def;; + esac; + _lt_hint=`expr 1 + \$_lt_hint`; + done~ + '"$ltdll_cmds"' + $CC -Wl,--base-file,$output_objdir/$soname-base '$lt_cv_gcj_dll_switch' -Wl,-e,'$dll_entry' -o $lib '$ltdll_obj'$libobjs $deplibs $compiler_flags~ + $DLLTOOL --as=$AS --dllname $soname --exclude-symbols '$dll_exclude_symbols' --def $output_objdir/$soname-def --base-file $output_objdir/$soname-base --output-exp $output_objdir/$soname-exp~ + $CC -Wl,--base-file,$output_objdir/$soname-base $output_objdir/$soname-exp '$lt_cv_gcj_dll_switch' -Wl,-e,'$dll_entry' -o $lib '$ltdll_obj'$libobjs $deplibs $compiler_flags~ + $DLLTOOL --as=$AS --dllname $soname --exclude-symbols '$dll_exclude_symbols' --def $output_objdir/$soname-def --base-file $output_objdir/$soname-base --output-exp $output_objdir/$soname-exp~ + $CC $output_objdir/$soname-exp '$lt_cv_gcj_dll_switch' -Wl,-e,'$dll_entry' -o $lib '$ltdll_obj'$libobjs $deplibs $compiler_flags' + ;; + + netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then + archive_cmds='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib' + wlarc= + else + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + fi + ;; + + solaris* | sysv5*) + if $LD -v 2>&1 | egrep 'BFD 2\.8' > /dev/null; then + ld_shlibs=no + cat <<EOF 1>&2 + +*** Warning: The releases 2.8.* of the GNU linker cannot reliably +*** create shared libraries on Solaris systems. Therefore, libtool +*** is disabling shared libraries support. We urge you to upgrade GNU +*** binutils to release 2.9.1 or newer. Another option is to modify +*** your PATH or compiler configuration so that the native linker is +*** used, and then restart. + +EOF + elif $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + ld_shlibs=no + fi + ;; + + sunos4*) + archive_cmds='$LD -assert pure-text -Bshareable -o $lib $libobjs $deplibs $linker_flags' + wlarc= + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + *) + if $LD --help 2>&1 | egrep ': supported targets:.* elf' > /dev/null; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + ld_shlibs=no + fi + ;; + esac + + if test "$ld_shlibs" = yes; then + runpath_var=LD_RUN_PATH + hardcode_libdir_flag_spec='${wl}--rpath ${wl}$libdir' + export_dynamic_flag_spec='${wl}--export-dynamic' + case $host_os in + cygwin* | mingw*) + # dlltool doesn't understand --whole-archive et. al. + whole_archive_flag_spec= + ;; + *) + # ancient GNU ld didn't support --whole-archive et. al. + if $LD --help 2>&1 | egrep 'no-whole-archive' > /dev/null; then + whole_archive_flag_spec="$wlarc"'--whole-archive$convenience '"$wlarc"'--no-whole-archive' + else + whole_archive_flag_spec= + fi + ;; + esac + fi +else + # PORTME fill in a description of your system's linker (not GNU ld) + case "$host_os" in + aix3*) + allow_undefined_flag=unsupported + always_export_symbols=yes + archive_expsym_cmds='$LD -o $output_objdir/$soname $libobjs $deplibs $linker_flags -bE:$export_symbols -T512 -H512 -bM:SRE~$AR $AR_FLAGS $lib $output_objdir/$soname' + # Note: this linker hardcodes the directories in LIBPATH if there + # are no directories specified by -L. + hardcode_minus_L=yes + if test "$with_gcc" = yes && test -z "$link_static_flag"; then + # Neither direct hardcoding nor static linking is supported with a + # broken collect2. + hardcode_direct=unsupported + fi + ;; + + aix4*) + hardcode_libdir_flag_spec='${wl}-b ${wl}nolibpath ${wl}-b ${wl}libpath:$libdir:/usr/lib:/lib' + hardcode_libdir_separator=':' + if test "$with_gcc" = yes; then + collect2name=`${CC} -print-prog-name=collect2` + if test -f "$collect2name" && \ + strings "$collect2name" | grep resolve_lib_name >/dev/null + then + # We have reworked collect2 + hardcode_direct=yes + else + # We have old collect2 + hardcode_direct=unsupported + # It fails to find uninstalled libraries when the uninstalled + # path is not listed in the libpath. Setting hardcode_minus_L + # to unsupported forces relinking + hardcode_minus_L=yes + hardcode_libdir_flag_spec='-L$libdir' + hardcode_libdir_separator= + fi + shared_flag='-shared' + else + shared_flag='${wl}-bM:SRE' + hardcode_direct=yes + fi + allow_undefined_flag=' ${wl}-berok' + archive_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs $compiler_flags ${wl}-bexpall ${wl}-bnoentry${allow_undefined_flag}' + archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs $compiler_flags ${wl}-bE:$export_symbols ${wl}-bnoentry${allow_undefined_flag}' + case "$host_os" in aix4.[01]|aix4.[01].*) + # According to Greg Wooledge, -bexpall is only supported from AIX 4.2 on + always_export_symbols=yes ;; + esac + ;; + + amigaos*) + archive_cmds='$rm $output_objdir/a2ixlibrary.data~$echo "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$echo "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$echo "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$echo "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + # see comment about different semantics on the GNU ld section + ld_shlibs=no + ;; + + cygwin* | mingw*) + # When not using gcc, we currently assume that we are using + # Microsoft Visual C++. + # hardcode_libdir_flag_spec is actually meaningless, as there is + # no search path for DLLs. + hardcode_libdir_flag_spec=' ' + allow_undefined_flag=unsupported + # Tell ltmain to make .lib files, not .a files. + libext=lib + # FIXME: Setting linknames here is a bad hack. + archive_cmds='$CC -o $lib $libobjs $compiler_flags `echo "$deplibs" | sed -e '\''s/ -lc$//'\''` -link -dll~linknames=' + # The linker will automatically build a .lib file if we build a DLL. + old_archive_from_new_cmds='true' + # FIXME: Should let the user specify the lib program. + old_archive_cmds='lib /OUT:$oldlib$oldobjs$old_deplibs' + fix_srcfile_path='`cygpath -w $srcfile`' + ;; + + freebsd1*) + ld_shlibs=no + ;; + + # FreeBSD 2.2.[012] allows us to include c++rt0.o to get C++ constructor + # support. Future versions do this automatically, but an explicit c++rt0.o + # does not break anything, and helps significantly (at the cost of a little + # extra space). + freebsd2.2*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags /usr/lib/c++rt0.o' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + # Unfortunately, older versions of FreeBSD 2 do not have this feature. + freebsd2*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_minus_L=yes + hardcode_shlibpath_var=no + ;; + + # FreeBSD 3 and greater uses gcc -shared to do shared libraries. + freebsd*) + archive_cmds='$CC -shared -o $lib $libobjs $deplibs $compiler_flags' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + hpux9* | hpux10* | hpux11*) + case "$host_os" in + hpux9*) archive_cmds='$rm $output_objdir/$soname~$LD -b +b $install_libdir -o $output_objdir/$soname $libobjs $deplibs $linker_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib' ;; + *) archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags' ;; + esac + hardcode_libdir_flag_spec='${wl}+b ${wl}$libdir' + hardcode_libdir_separator=: + hardcode_direct=yes + hardcode_minus_L=yes # Not in the search PATH, but as the default + # location of the library. + export_dynamic_flag_spec='${wl}-E' + ;; + + irix5* | irix6*) + if test "$with_gcc" = yes; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${objdir}/so_locations -o $lib' + else + archive_cmds='$LD -shared $libobjs $deplibs $linker_flags -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${objdir}/so_locations -o $lib' + fi + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + link_all_deplibs=yes + ;; + + netbsd*) + if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' # a.out + else + archive_cmds='$LD -shared -o $lib $libobjs $deplibs $linker_flags' # ELF + fi + hardcode_libdir_flag_spec='${wl}-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + openbsd*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + os2*) + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + allow_undefined_flag=unsupported + archive_cmds='$echo "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$echo "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~$echo DATA >> $output_objdir/$libname.def~$echo " SINGLE NONSHARED" >> $output_objdir/$libname.def~$echo EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def' + old_archive_from_new_cmds='emximp -o $output_objdir/$libname.a $output_objdir/$libname.def' + ;; + + osf3*) + if test "$with_gcc" = yes; then + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${objdir}/so_locations -o $lib' + else + allow_undefined_flag=' -expect_unresolved \*' + archive_cmds='$LD -shared${allow_undefined_flag} $libobjs $deplibs $linker_flags -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${objdir}/so_locations -o $lib' + fi + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + ;; + + osf4* | osf5*) # as osf3* with the addition of -msym flag + if test "$with_gcc" = yes; then + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${objdir}/so_locations -o $lib' + else + allow_undefined_flag=' -expect_unresolved \*' + archive_cmds='$LD -shared${allow_undefined_flag} $libobjs $deplibs $linker_flags -msym -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${objdir}/so_locations -o $lib' + fi + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + ;; + + sco3.2v5*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + runpath_var=LD_RUN_PATH + hardcode_runpath_var=yes + ;; + + solaris*) + no_undefined_flag=' -z text' + # $CC -shared without GNU ld will not create a library from C++ + # object files and a static libstdc++, better avoid it by now + archive_cmds='$LD -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $linker_flags' + archive_expsym_cmds='$echo "{ global:" > $lib.exp~cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~ + $LD -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$rm $lib.exp' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_shlibpath_var=no + case "$host_os" in + solaris2.[0-5] | solaris2.[0-5].*) ;; + *) # Supported since Solaris 2.6 (maybe 2.5.1?) + whole_archive_flag_spec='-z allextract$convenience -z defaultextract' ;; + esac + link_all_deplibs=yes + ;; + + sunos4*) + archive_cmds='$LD -assert pure-text -Bstatic -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_direct=yes + hardcode_minus_L=yes + hardcode_shlibpath_var=no + ;; + + sysv4) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + runpath_var='LD_RUN_PATH' + hardcode_shlibpath_var=no + hardcode_direct=no #Motorola manual says yes, but my tests say they lie + ;; + + sysv4.3*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + export_dynamic_flag_spec='-Bexport' + ;; + + sysv5*) + no_undefined_flag=' -z text' + # $CC -shared without GNU ld will not create a library from C++ + # object files and a static libstdc++, better avoid it by now + archive_cmds='$LD -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $linker_flags' + archive_expsym_cmds='$echo "{ global:" > $lib.exp~cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~ + $LD -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$rm $lib.exp' + hardcode_libdir_flag_spec= + hardcode_shlibpath_var=no + runpath_var='LD_RUN_PATH' + ;; + + uts4*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_shlibpath_var=no + ;; + + dgux*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_shlibpath_var=no + ;; + + sysv4*MP*) + if test -d /usr/nec; then + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + runpath_var=LD_RUN_PATH + hardcode_runpath_var=yes + ld_shlibs=yes + fi + ;; + + sysv4.2uw2*) + archive_cmds='$LD -G -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_minus_L=no + hardcode_shlibpath_var=no + hardcode_runpath_var=yes + runpath_var=LD_RUN_PATH + ;; + + unixware7*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + runpath_var='LD_RUN_PATH' + hardcode_shlibpath_var=no + ;; + + *) + ld_shlibs=no + ;; + esac +fi + +## Compiler Characteristics: PIC flags, static flags, etc + +# We don't use cached values here since only the C compiler +# characteristics should be cached. + ac_cv_prog_cc_pic= + ac_cv_prog_cc_shlib= + ac_cv_prog_cc_wl= + ac_cv_prog_cc_static= + ac_cv_prog_cc_no_builtin= + ac_cv_prog_cc_can_build_shared=$can_build_shared + + ac_cv_prog_cc_wl='-Wl,' + ac_cv_prog_cc_static='-static' + + case "$host_os" in + beos* | irix5* | irix6* | osf3* | osf4* | osf5*) + # PIC is the default for these OSes. + ;; + aix*) + # Below there is a dirty hack to force normal static linking with -ldl + # The problem is because libdl dynamically linked with both libc and + # libC (AIX C++ library), which obviously doesn't included in libraries + # list by gcc. This cause undefined symbols with -static flags. + # This hack allows C programs to be linked with "-static -ldl", but + # we not sure about C++ programs. + ac_cv_prog_cc_static="$ac_cv_prog_cc_static ${ac_cv_prog_cc_wl}-lC" + ;; + cygwin* | mingw* | os2*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + ac_cv_prog_cc_pic='-DDLL_EXPORT' + ;; + amigaos*) + # FIXME: we need at least 68020 code to build shared libraries, but + # adding the `-m68020' flag to GCC prevents building anything better, + # like `-m68040'. + ac_cv_prog_cc_pic='-m68020 -resident32 -malways-restore-a4' + ;; + sysv4*MP*) + if test -d /usr/nec; then + ac_cv_prog_cc_pic=-Kconform_pic + fi + ;; + *) + ac_cv_prog_cc_pic='-fPIC' + ;; + esac + +# GCJ did not exist at the time GCC didn't implicitly link libc in. +need_lc=no diff --git a/contrib/binutils/opcodes/ChangeLog b/contrib/binutils/opcodes/ChangeLog index a3bacf99688d..ad0dc07d6033 100644 --- a/contrib/binutils/opcodes/ChangeLog +++ b/contrib/binutils/opcodes/ChangeLog @@ -1,3 +1,78 @@ +2001-10-24 Richard Henderson <rth@redhat.com> + + * ia64-asmtab.c: Regenerate. + +2001-10-09 Nick Clifton <nickc@cambridge.redhat.com> + + * sh-opc.h: Fix encoding of least significant nibble of the + DSP single data transfer instructions. + + * sh-dis.c (print_insn_shx): Fix decoding of As opcode in DSP + instructions. + +2001-09-04 Alan Modra <amodra@bigpond.net.au> + + * i386-dis.c (grps): Don't print the implicit al/ax/eax register + for opcode 0xf6 or 0xf7 forms of mul, imul, div, idiv insns. + + Merge from mainline. + 2001-07-28 Kazu Hirata <kazu@hxi.com> + * i386-dis.c: Fix formatting. + + 2001-07-28 Matthias Kramm <kramm@quiss.org> + * i386-dis.c: Change formatting conventions for architecture + i386:intel to better match the format of various intel i386 + assemblers, like nasm, tasm or masm. + + 2001-07-18 Alan Modra <amodra@bigpond.net.au> + * i386-dis.c (grps): Print l or w suffix, and require mem modrm + for lgdt, lidt, sgdt, sidt. + + 2001-07-09 Andreas Jaeger <aj@suse.de>, Karsten Keil <kkeil@suse.de> + * i386-dis.c (set_op): Handle 64 bit and 32 bit mode. + (OP_J): Use bfd_vma for mask to work properly with 64 bits. + (op_address,op_riprel): Use bfd_vma to handle 64 bits. + + 2001-06-11 Alan Modra <amodra@bigpond.net.au> + * i386-dis.c: Group function prototypes in one place. + (FLOATCODE): Redefine as 1. + (USE_GROUPS): Redefine as 2. + (USE_PREFIX_USER_TABLE): Redefine as 3. + (X86_64_SPECIAL): Define as 4. + (GRP1b..GRPAMD): Move USE_GROUPS to bytecode1, index to bytecode2. + (PREGRP0..PREGRP26): Similarly with USE_PREFIX_USER_TABLE. + (dis386_att, dis386_intel, disx86_64_att, disx86_64_intel): Delete. + (dis386): New table combining above four tables. + (dis386_twobyte_att, dis386_twobyte_intel): Delete. + (dis386_twobyte): New table combining above two tables. + (x86_64_table): New table to handle x86_64. + (X86_64_0): Define. + (float_mem_att, float_mem_intel): Delet. + (float_mem): New table combining above two tables. + (print_insn_i386): Modify for above. + (dofloat): Likewise. + (putop): Handle '{', '|' and '}' to select alternative mnemonics. + Return 0 on success, 1 if no valid alternative. + (putop <case 'F'>, <case 'H'>): Print nothing for intel_syntax. + (putop <case 'T'>): Move to case 'U', and share case 'Q' code. + (putop <case 'I'>): Move to case 'T', and share case 'P' code. + (OP_REG <case rAX_reg .. rDI_reg>): Handle as for eAX_reg .. eDI_reg + if not 64-bit mode. + (OP_I <case q_mode>): Handle as for v_mode if not 64-bit mode. + (OP_I64): If not 64-bit mode, call OP_I. + OP_OFF64): If not 64-bit mode, call OP_OFF. + (OP_ST, OP_STi, OP_SEG, OP_DIR, OP_OFF, OP_OFF64, OP_MMX): Rename + 'ignore'/'ignored' to 'bytemode'. + + 2001-06-10 Alan Modra <amodra@bigpond.net.au> + * i386-dis.c (dis386_att): Add 'H' to conditional branch and + loop,jcxz insns. + (disx86_64_att): Likewise. + (dis386_twobyte_att): Likewise. + (print_insn_i386): Don't print branch hints as a prefix. + (putop): 'H' macro prints branch hints. + (get64): Kill compile warnings. + 2001-07-16 Philip Blundell <philb@gnu.org> * arm-dis.c (print_insn_arm): Use decimal for offsets in LDR/STR. diff --git a/contrib/binutils/opcodes/arc-dis.c b/contrib/binutils/opcodes/arc-dis.c index 03f13795275e..18325a927780 100644 --- a/contrib/binutils/opcodes/arc-dis.c +++ b/contrib/binutils/opcodes/arc-dis.c @@ -1,268 +1,1221 @@ /* Instruction printing code for the ARC. - Copyright (C) 1994, 1995, 1997, 1998 Free Software Foundation, Inc. + Copyright 1994, 1995, 1997, 1998, 2000, 2001 + Free Software Foundation, Inc. Contributed by Doug Evans (dje@cygnus.com). -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#include "sysdep.h" +#include <ansidecl.h> +#include <libiberty.h> #include "dis-asm.h" #include "opcode/arc.h" #include "elf-bfd.h" #include "elf/arc.h" +#include <string.h> #include "opintl.h" -static int print_insn_arc_base_little PARAMS ((bfd_vma, disassemble_info *)); -static int print_insn_arc_base_big PARAMS ((bfd_vma, disassemble_info *)); +#include <ctype.h> +#include <stdarg.h> +#include "arc-dis.h" +#include "arc-ext.h" -static int print_insn PARAMS ((bfd_vma, disassemble_info *, int, int)); +#ifndef dbg +#define dbg (0) +#endif -/* Print one instruction from PC on INFO->STREAM. - Return the size of the instruction (4 or 8 for the ARC). */ +#define BIT(word,n) ((word) & (1 << n)) +#define BITS(word,s,e) (((word) << (31 - e)) >> (s + (31 - e))) +#define OPCODE(word) (BITS ((word), 27, 31)) +#define FIELDA(word) (BITS ((word), 21, 26)) +#define FIELDB(word) (BITS ((word), 15, 20)) +#define FIELDC(word) (BITS ((word), 9, 14)) -static int -print_insn (pc, info, mach, big_p) - bfd_vma pc; - disassemble_info *info; - int mach; - int big_p; +/* FIELD D is signed in all of its uses, so we make sure argument is + treated as signed for bit shifting purposes: */ +#define FIELDD(word) (BITS (((signed int)word), 0, 8)) + +#define PUT_NEXT_WORD_IN(a) \ + do \ + { \ + if (is_limm == 1 && !NEXT_WORD (1)) \ + mwerror (state, _("Illegal limm reference in last instruction!\n")); \ + a = state->words[1]; \ + } \ + while (0) + +#define CHECK_FLAG_COND_NULLIFY() \ + do \ + { \ + if (is_shimm == 0) \ + { \ + flag = BIT (state->words[0], 8); \ + state->nullifyMode = BITS (state->words[0], 5, 6); \ + cond = BITS (state->words[0], 0, 4); \ + } \ + } \ + while (0) + +#define CHECK_COND() \ + do \ + { \ + if (is_shimm == 0) \ + cond = BITS (state->words[0], 0, 4); \ + } \ + while (0) + +#define CHECK_FIELD(field) \ + do \ + { \ + if (field == 62) \ + { \ + is_limm++; \ + field##isReg = 0; \ + PUT_NEXT_WORD_IN (field); \ + limm_value = field; \ + } \ + else if (field > 60) \ + { \ + field##isReg = 0; \ + is_shimm++; \ + flag = (field == 61); \ + field = FIELDD (state->words[0]); \ + } \ + } \ + while (0) + +#define CHECK_FIELD_A() \ + do \ + { \ + fieldA = FIELDA(state->words[0]); \ + if (fieldA > 60) \ + { \ + fieldAisReg = 0; \ + fieldA = 0; \ + } \ + } \ + while (0) + +#define CHECK_FIELD_B() \ + do \ + { \ + fieldB = FIELDB (state->words[0]); \ + CHECK_FIELD (fieldB); \ + } \ + while (0) + +#define CHECK_FIELD_C() \ + do \ + { \ + fieldC = FIELDC (state->words[0]); \ + CHECK_FIELD (fieldC); \ + } \ + while (0) + +#define IS_SMALL(x) (((field##x) < 256) && ((field##x) > -257)) +#define IS_REG(x) (field##x##isReg) +#define WRITE_FORMAT_LB_Rx_RB(x) WRITE_FORMAT(x,"[","]","","") +#define WRITE_FORMAT_x_COMMA_LB(x) WRITE_FORMAT(x,"",",[","",",[") +#define WRITE_FORMAT_COMMA_x_RB(x) WRITE_FORMAT(x,",","]",",","]") +#define WRITE_FORMAT_x_RB(x) WRITE_FORMAT(x,"","]","","]") +#define WRITE_FORMAT_COMMA_x(x) WRITE_FORMAT(x,",","",",","") +#define WRITE_FORMAT_x_COMMA(x) WRITE_FORMAT(x,"",",","",",") +#define WRITE_FORMAT_x(x) WRITE_FORMAT(x,"","","","") +#define WRITE_FORMAT(x,cb1,ca1,cb,ca) strcat (formatString, \ + (IS_REG (x) ? cb1"%r"ca1 : \ + usesAuxReg ? cb"%a"ca : \ + IS_SMALL (x) ? cb"%d"ca : cb"%h"ca)) +#define WRITE_FORMAT_RB() strcat (formatString, "]") +#define WRITE_COMMENT(str) (state->comm[state->commNum++] = (str)) +#define WRITE_NOP_COMMENT() if (!fieldAisReg && !flag) WRITE_COMMENT ("nop"); + +#define NEXT_WORD(x) (offset += 4, state->words[x]) + +#define add_target(x) (state->targets[state->tcnt++] = (x)) + +static char comment_prefix[] = "\t; "; + +static const char * +core_reg_name (state, val) + struct arcDisState * state; + int val; { - const struct arc_opcode *opcode; - bfd_byte buffer[4]; - void *stream = info->stream; - fprintf_ftype func = info->fprintf_func; - int status; - /* First element is insn, second element is limm (if present). */ - arc_insn insn[2]; - int got_limm_p = 0; - static int initialized = 0; - static int current_mach = 0; + if (state->coreRegName) + return (*state->coreRegName)(state->_this, val); + return 0; +} - if (!initialized || mach != current_mach) - { - initialized = 1; - current_mach = arc_get_opcode_mach (mach, big_p); - arc_opcode_init_tables (current_mach); - } +static const char * +aux_reg_name (state, val) + struct arcDisState * state; + int val; +{ + if (state->auxRegName) + return (*state->auxRegName)(state->_this, val); + return 0; +} - status = (*info->read_memory_func) (pc, buffer, 4, info); - if (status != 0) +static const char * +cond_code_name (state, val) + struct arcDisState * state; + int val; +{ + if (state->condCodeName) + return (*state->condCodeName)(state->_this, val); + return 0; +} + +static const char * +instruction_name (state, op1, op2, flags) + struct arcDisState * state; + int op1; + int op2; + int * flags; +{ + if (state->instName) + return (*state->instName)(state->_this, op1, op2, flags); + return 0; +} + +static void +mwerror (state, msg) + struct arcDisState * state; + const char * msg; +{ + if (state->err != 0) + (*state->err)(state->_this, (msg)); +} + +static const char * +post_address (state, addr) + struct arcDisState * state; + int addr; +{ + static char id[3 * ARRAY_SIZE (state->addresses)]; + int j, i = state->acnt; + + if (i < ((int) ARRAY_SIZE (state->addresses))) { - (*info->memory_error_func) (status, pc, info); - return -1; + state->addresses[i] = addr; + ++state->acnt; + j = i*3; + id[j+0] = '@'; + id[j+1] = '0'+i; + id[j+2] = 0; + + return id + j; } - if (big_p) - insn[0] = bfd_getb32 (buffer); - else - insn[0] = bfd_getl32 (buffer); + return ""; +} - (*func) (stream, "%08lx\t", insn[0]); +static void +my_sprintf ( + struct arcDisState * state, + char * buf, + const char * format, + ...) +{ + char *bp; + const char *p; + int size, leading_zero, regMap[2]; + long auxNum; + va_list ap; + + va_start (ap, format); + + bp = buf; + *bp = 0; + p = format; + auxNum = -1; + regMap[0] = 0; + regMap[1] = 0; + + while (1) + switch (*p++) + { + case 0: + goto DOCOMM; /* (return) */ + default: + *bp++ = p[-1]; + break; + case '%': + size = 0; + leading_zero = 0; + RETRY: ; + switch (*p++) + { + case '0': + case '1': + case '2': + case '3': + case '4': + case '5': + case '6': + case '7': + case '8': + case '9': + { + /* size. */ + size = p[-1] - '0'; + if (size == 0) + leading_zero = 1; /* e.g. %08x */ + while (*p >= '0' && *p <= '9') + { + size = size * 10 + *p - '0'; + p++; + } + goto RETRY; + } +#define inc_bp() bp = bp + strlen (bp) - /* The instructions are stored in lists hashed by the insn code - (though we needn't care how they're hashed). */ + case 'h': + { + unsigned u = va_arg (ap, int); - opcode = arc_opcode_lookup_dis (insn[0]); - for ( ; opcode != NULL; opcode = ARC_OPCODE_NEXT_DIS (opcode)) - { - char *syn; - int mods,invalid; - long value; - const struct arc_operand *operand; - const struct arc_operand_value *opval; - - /* Basic bit mask must be correct. */ - if ((insn[0] & opcode->mask) != opcode->value) - continue; - - /* Supported by this cpu? */ - if (! arc_opcode_supported (opcode)) - continue; - - /* Make two passes over the operands. First see if any of them - have extraction functions, and, if they do, make sure the - instruction is valid. */ - - arc_opcode_init_extract (); - invalid = 0; - - /* ??? Granted, this is slower than the `ppc' way. Maybe when this is - done it'll be clear what the right way to do this is. */ - /* Instructions like "add.f r0,r1,1" are tricky because the ".f" gets - printed first, but we don't know how to print it until we've processed - the regs. Since we're scanning all the args before printing the insn - anyways, it's actually quite easy. */ - - for (syn = opcode->syntax; *syn; ++syn) - { - int c; + /* Hex. We can change the format to 0x%08x in + one place, here, if we wish. + We add underscores for easy reading. */ + if (u > 65536) + sprintf (bp, "0x%x_%04x", u >> 16, u & 0xffff); + else + sprintf (bp, "0x%x", u); + inc_bp (); + } + break; + case 'X': case 'x': + { + int val = va_arg (ap, int); - if (*syn != '%' || *++syn == '%') - continue; - mods = 0; - c = *syn; - while (ARC_MOD_P (arc_operands[arc_operand_map[c]].flags)) + if (size != 0) + if (leading_zero) + sprintf (bp, "%0*x", size, val); + else + sprintf (bp, "%*x", size, val); + else + sprintf (bp, "%x", val); + inc_bp (); + } + break; + case 'd': { - mods |= arc_operands[arc_operand_map[c]].flags & ARC_MOD_BITS; - ++syn; - c = *syn; + int val = va_arg (ap, int); + + if (size != 0) + sprintf (bp, "%*d", size, val); + else + sprintf (bp, "%d", val); + inc_bp (); } - operand = arc_operands + arc_operand_map[c]; - if (operand->extract) - (*operand->extract) (insn, operand, mods, - (const struct arc_operand_value **) NULL, - &invalid); - } - if (invalid) - continue; + break; + case 'r': + { + /* Register. */ + int val = va_arg (ap, int); + +#define REG2NAME(num, name) case num: sprintf (bp, ""name); \ + regMap[(num < 32) ? 0 : 1] |= 1 << (num - ((num < 32) ? 0 : 32)); break; + + switch (val) + { + REG2NAME (26, "gp"); + REG2NAME (27, "fp"); + REG2NAME (28, "sp"); + REG2NAME (29, "ilink1"); + REG2NAME (30, "ilink2"); + REG2NAME (31, "blink"); + REG2NAME (60, "lp_count"); + default: + { + const char * ext; + + ext = core_reg_name (state, val); + if (ext) + sprintf (bp, "%s", ext); + else + sprintf (bp,"r%d",val); + } + break; + } + inc_bp (); + } break; + + case 'a': + { + /* Aux Register. */ + int val = va_arg (ap, int); - /* The instruction is valid. */ +#define AUXREG2NAME(num, name) case num: sprintf (bp,name); break; - /* If we have an insn with a limm, fetch it now. Scanning the insns - twice lets us do this. */ - if (arc_opcode_limm_p (NULL)) - { - status = (*info->read_memory_func) (pc + 4, buffer, 4, info); - if (status != 0) + switch (val) + { + AUXREG2NAME (0x0, "status"); + AUXREG2NAME (0x1, "semaphore"); + AUXREG2NAME (0x2, "lp_start"); + AUXREG2NAME (0x3, "lp_end"); + AUXREG2NAME (0x4, "identity"); + AUXREG2NAME (0x5, "debug"); + default: + { + const char *ext; + + ext = aux_reg_name (state, val); + if (ext) + sprintf (bp, "%s", ext); + else + my_sprintf (state, bp, "%h", val); + } + break; + } + inc_bp (); + } + break; + + case 's': { - (*info->memory_error_func) (status, pc, info); - return -1; + sprintf (bp, "%s", va_arg (ap, char *)); + inc_bp (); } - if (big_p) - insn[1] = bfd_getb32 (buffer); + break; + + default: + fprintf (stderr, "?? format %c\n", p[-1]); + break; + } + } + + DOCOMM: *bp = 0; +} + +static void +write_comments_(state, shimm, is_limm, limm_value) + struct arcDisState * state; + int shimm; + int is_limm; + long limm_value; +{ + if (state->commentBuffer != 0) + { + int i; + + if (is_limm) + { + const char *name = post_address (state, limm_value + shimm); + + if (*name != 0) + WRITE_COMMENT (name); + } + for (i = 0; i < state->commNum; i++) + { + if (i == 0) + strcpy (state->commentBuffer, comment_prefix); else - insn[1] = bfd_getl32 (buffer); - got_limm_p = 1; + strcat (state->commentBuffer, ", "); + strncat (state->commentBuffer, state->comm[i], sizeof (state->commentBuffer)); } + } +} - for (syn = opcode->syntax; *syn; ++syn) - { - int c; +#define write_comments2(x) write_comments_(state, x, is_limm, limm_value) +#define write_comments() write_comments2(0) + +static const char *condName[] = { + /* 0..15. */ + "" , "z" , "nz" , "p" , "n" , "c" , "nc" , "v" , + "nv" , "gt" , "ge" , "lt" , "le" , "hi" , "ls" , "pnz" +}; + +static void +write_instr_name_(state, instrName, cond, condCodeIsPartOfName, flag, signExtend, addrWriteBack, directMem) + struct arcDisState * state; + const char * instrName; + int cond; + int condCodeIsPartOfName; + int flag; + int signExtend; + int addrWriteBack; + int directMem; +{ + strcpy (state->instrBuffer, instrName); + + if (cond > 0) + { + const char *cc = 0; + + if (!condCodeIsPartOfName) + strcat (state->instrBuffer, "."); + + if (cond < 16) + cc = condName[cond]; + else + cc = cond_code_name (state, cond); + + if (!cc) + cc = "???"; + + strcat (state->instrBuffer, cc); + } + + if (flag) + strcat (state->instrBuffer, ".f"); + + switch (state->nullifyMode) + { + case BR_exec_always: + strcat (state->instrBuffer, ".d"); + break; + case BR_exec_when_jump: + strcat (state->instrBuffer, ".jd"); + break; + } + + if (signExtend) + strcat (state->instrBuffer, ".x"); + + if (addrWriteBack) + strcat (state->instrBuffer, ".a"); + + if (directMem) + strcat (state->instrBuffer, ".di"); +} + +#define write_instr_name() \ + do \ + { \ + write_instr_name_(state, instrName,cond, condCodeIsPartOfName, \ + flag, signExtend, addrWriteBack, directMem); \ + formatString[0] = '\0'; \ + } \ + while (0) + +enum { + op_LD0 = 0, op_LD1 = 1, op_ST = 2, op_3 = 3, + op_BC = 4, op_BLC = 5, op_LPC = 6, op_JC = 7, + op_ADD = 8, op_ADC = 9, op_SUB = 10, op_SBC = 11, + op_AND = 12, op_OR = 13, op_BIC = 14, op_XOR = 15 +}; + +extern disassemble_info tm_print_insn_info; - if (*syn != '%' || *++syn == '%') +static int +dsmOneArcInst (addr, state) + bfd_vma addr; + struct arcDisState * state; +{ + int condCodeIsPartOfName = 0; + int decodingClass; + const char * instrName; + int repeatsOp = 0; + int fieldAisReg = 1; + int fieldBisReg = 1; + int fieldCisReg = 1; + int fieldA; + int fieldB; + int fieldC = 0; + int flag = 0; + int cond = 0; + int is_shimm = 0; + int is_limm = 0; + long limm_value = 0; + int signExtend = 0; + int addrWriteBack = 0; + int directMem = 0; + int is_linked = 0; + int offset = 0; + int usesAuxReg = 0; + int flags; + int ignoreFirstOpd; + char formatString[60]; + + state->instructionLen = 4; + state->nullifyMode = BR_exec_when_no_jump; + state->opWidth = 12; + state->isBranch = 0; + + state->_mem_load = 0; + state->_ea_present = 0; + state->_load_len = 0; + state->ea_reg1 = no_reg; + state->ea_reg2 = no_reg; + state->_offset = 0; + + if (! NEXT_WORD (0)) + return 0; + + state->_opcode = OPCODE (state->words[0]); + instrName = 0; + decodingClass = 0; /* default! */ + repeatsOp = 0; + condCodeIsPartOfName=0; + state->commNum = 0; + state->tcnt = 0; + state->acnt = 0; + state->flow = noflow; + ignoreFirstOpd = 0; + + if (state->commentBuffer) + state->commentBuffer[0] = '\0'; + + switch (state->_opcode) + { + case op_LD0: + switch (BITS (state->words[0],1,2)) + { + case 0: + instrName = "ld"; + state->_load_len = 4; + break; + case 1: + instrName = "ldb"; + state->_load_len = 1; + break; + case 2: + instrName = "ldw"; + state->_load_len = 2; + break; + default: + instrName = "??? (0[3])"; + state->flow = invalid_instr; + break; + } + decodingClass = 5; + break; + + case op_LD1: + if (BIT (state->words[0],13)) + { + instrName = "lr"; + decodingClass = 10; + } + else + { + switch (BITS (state->words[0],10,11)) { - (*func) (stream, "%c", *syn); - continue; + case 0: + instrName = "ld"; + state->_load_len = 4; + break; + case 1: + instrName = "ldb"; + state->_load_len = 1; + break; + case 2: + instrName = "ldw"; + state->_load_len = 2; + break; + default: + instrName = "??? (1[3])"; + state->flow = invalid_instr; + break; } - - /* We have an operand. Fetch any special modifiers. */ - mods = 0; - c = *syn; - while (ARC_MOD_P (arc_operands[arc_operand_map[c]].flags)) + decodingClass = 6; + } + break; + + case op_ST: + if (BIT (state->words[0],25)) + { + instrName = "sr"; + decodingClass = 8; + } + else + { + switch (BITS (state->words[0],22,23)) + { + case 0: + instrName = "st"; + break; + case 1: + instrName = "stb"; + break; + case 2: + instrName = "stw"; + break; + default: + instrName = "??? (2[3])"; + state->flow = invalid_instr; + break; + } + decodingClass = 7; + } + break; + + case op_3: + decodingClass = 1; /* default for opcode 3... */ + switch (FIELDC (state->words[0])) + { + case 0: + instrName = "flag"; + decodingClass = 2; + break; + case 1: + instrName = "asr"; + break; + case 2: + instrName = "lsr"; + break; + case 3: + instrName = "ror"; + break; + case 4: + instrName = "rrc"; + break; + case 5: + instrName = "sexb"; + break; + case 6: + instrName = "sexw"; + break; + case 7: + instrName = "extb"; + break; + case 8: + instrName = "extw"; + break; + case 0x3f: + { + decodingClass = 9; + switch( FIELDD (state->words[0]) ) + { + case 0: + instrName = "brk"; + break; + case 1: + instrName = "sleep"; + break; + case 2: + instrName = "swi"; + break; + default: + instrName = "???"; + state->flow=invalid_instr; + break; + } + } + break; + + /* ARC Extension Library Instructions + NOTE: We assume that extension codes are these instrs. */ + default: + instrName = instruction_name (state, + state->_opcode, + FIELDC (state->words[0]), + & flags); + if (!instrName) { - mods |= arc_operands[arc_operand_map[c]].flags & ARC_MOD_BITS; - ++syn; - c = *syn; + instrName = "???"; + state->flow = invalid_instr; } - operand = arc_operands + arc_operand_map[c]; + if (flags & IGNORE_FIRST_OPD) + ignoreFirstOpd = 1; + break; + } + break; - /* Extract the value from the instruction. */ - opval = NULL; - if (operand->extract) + case op_BC: + instrName = "b"; + case op_BLC: + if (!instrName) + instrName = "bl"; + case op_LPC: + if (!instrName) + instrName = "lp"; + case op_JC: + if (!instrName) + { + if (BITS (state->words[0],9,9)) { - value = (*operand->extract) (insn, operand, mods, - &opval, (int *) NULL); + instrName = "jl"; + is_linked = 1; } - else + else { - value = (insn[0] >> operand->shift) & ((1 << operand->bits) - 1); - if ((operand->flags & ARC_OPERAND_SIGNED) - && (value & (1 << (operand->bits - 1)))) - value -= 1 << operand->bits; - - /* If this is a suffix operand, set `opval'. */ - if (operand->flags & ARC_OPERAND_SUFFIX) - opval = arc_opcode_lookup_suffix (operand, value); + instrName = "j"; + is_linked = 0; } + } + condCodeIsPartOfName = 1; + decodingClass = ((state->_opcode == op_JC) ? 4 : 3); + state->isBranch = 1; + break; + + case op_ADD: + case op_ADC: + case op_AND: + repeatsOp = (FIELDC (state->words[0]) == FIELDB (state->words[0])); + decodingClass = 0; - /* Print the operand as directed by the flags. */ - if (operand->flags & ARC_OPERAND_FAKE) - ; /* nothing to do (??? at least not yet) */ - else if (operand->flags & ARC_OPERAND_SUFFIX) - { - /* Default suffixes aren't printed. Fortunately, they all have - zero values. Also, zero values for boolean suffixes are - represented by the absence of text. */ + switch (state->_opcode) + { + case op_ADD: + instrName = (repeatsOp ? "asl" : "add"); + break; + case op_ADC: + instrName = (repeatsOp ? "rlc" : "adc"); + break; + case op_AND: + instrName = (repeatsOp ? "mov" : "and"); + break; + } + break; + + case op_SUB: instrName = "sub"; + break; + case op_SBC: instrName = "sbc"; + break; + case op_OR: instrName = "or"; + break; + case op_BIC: instrName = "bic"; + break; - if (value != 0) - { - /* ??? OPVAL should have a value. If it doesn't just cope - as we want disassembly to be reasonably robust. - Also remember that several condition code values (16-31) - aren't defined yet. For these cases just print the - number suitably decorated. */ - if (opval) - (*func) (stream, "%s%s", - mods & ARC_MOD_DOT ? "." : "", - opval->name); - else - (*func) (stream, "%s%c%d", - mods & ARC_MOD_DOT ? "." : "", - operand->fmt, value); - } + case op_XOR: + if (state->words[0] == 0x7fffffff) + { + /* nop encoded as xor -1, -1, -1 */ + instrName = "nop"; + decodingClass = 9; + } + else + instrName = "xor"; + break; + + default: + instrName = instruction_name (state,state->_opcode,0,&flags); + /* if (instrName) printf("FLAGS=0x%x\n", flags); */ + if (!instrName) + { + instrName = "???"; + state->flow=invalid_instr; + } + if (flags & IGNORE_FIRST_OPD) + ignoreFirstOpd = 1; + break; + } + + fieldAisReg = fieldBisReg = fieldCisReg = 1; /* Assume regs for now. */ + flag = cond = is_shimm = is_limm = 0; + state->nullifyMode = BR_exec_when_no_jump; /* 0 */ + signExtend = addrWriteBack = directMem = 0; + usesAuxReg = 0; + + switch (decodingClass) + { + case 0: + CHECK_FIELD_A (); + CHECK_FIELD_B (); + if (!repeatsOp) + CHECK_FIELD_C (); + CHECK_FLAG_COND_NULLIFY (); + + write_instr_name (); + if (!ignoreFirstOpd) + { + WRITE_FORMAT_x (A); + WRITE_FORMAT_COMMA_x (B); + if (!repeatsOp) + WRITE_FORMAT_COMMA_x (C); + WRITE_NOP_COMMENT (); + my_sprintf (state, state->operandBuffer, formatString, fieldA, fieldB, fieldC); + } + else + { + WRITE_FORMAT_x (B); + if (!repeatsOp) + WRITE_FORMAT_COMMA_x (C); + my_sprintf (state, state->operandBuffer, formatString, fieldB, fieldC); + } + write_comments (); + break; + + case 1: + CHECK_FIELD_A (); + CHECK_FIELD_B (); + CHECK_FLAG_COND_NULLIFY (); + + write_instr_name (); + if (!ignoreFirstOpd) + { + WRITE_FORMAT_x (A); + WRITE_FORMAT_COMMA_x (B); + WRITE_NOP_COMMENT (); + my_sprintf (state, state->operandBuffer, formatString, fieldA, fieldB); + } + else + { + WRITE_FORMAT_x (B); + my_sprintf (state, state->operandBuffer, formatString, fieldB); + } + write_comments (); + break; + + case 2: + CHECK_FIELD_B (); + CHECK_FLAG_COND_NULLIFY (); + flag = 0; /* this is the FLAG instruction -- it's redundant */ + + write_instr_name (); + WRITE_FORMAT_x (B); + my_sprintf (state, state->operandBuffer, formatString, fieldB); + write_comments (); + break; + + case 3: + fieldA = BITS (state->words[0],7,26) << 2; + fieldA = (fieldA << 10) >> 10; /* make it signed */ + fieldA += addr + 4; + CHECK_FLAG_COND_NULLIFY (); + flag = 0; + + write_instr_name (); + /* This address could be a label we know. Convert it. */ + if (state->_opcode != op_LPC /* LP */) + { + add_target (fieldA); /* For debugger. */ + state->flow = state->_opcode == op_BLC /* BL */ + ? direct_call + : direct_jump; + /* indirect calls are achieved by "lr blink,[status]; + lr dest<- func addr; j [dest]" */ + } + + strcat (formatString, "%s"); /* address/label name */ + my_sprintf (state, state->operandBuffer, formatString, post_address (state, fieldA)); + write_comments (); + break; + + case 4: + /* For op_JC -- jump to address specified. + Also covers jump and link--bit 9 of the instr. word + selects whether linked, thus "is_linked" is set above. */ + fieldA = 0; + CHECK_FIELD_B (); + CHECK_FLAG_COND_NULLIFY (); + + if (!fieldBisReg) + { + fieldAisReg = 0; + fieldA = (fieldB >> 25) & 0x7F; /* flags */ + fieldB = (fieldB & 0xFFFFFF) << 2; + state->flow = is_linked ? direct_call : direct_jump; + add_target (fieldB); + /* screwy JLcc requires .jd mode to execute correctly + * but we pretend it is .nd (no delay slot). */ + if (is_linked && state->nullifyMode == BR_exec_when_jump) + state->nullifyMode = BR_exec_when_no_jump; + } + else + { + state->flow = is_linked ? indirect_call : indirect_jump; + /* We should also treat this as indirect call if NOT linked + * but the preceding instruction was a "lr blink,[status]" + * and we have a delay slot with "add blink,blink,2". + * For now we can't detect such. */ + state->register_for_indirect_jump = fieldB; + } + + write_instr_name (); + strcat (formatString, + IS_REG (B) ? "[%r]" : "%s"); /* address/label name */ + if (fieldA != 0) + { + fieldAisReg = 0; + WRITE_FORMAT_COMMA_x (A); + } + if (IS_REG (B)) + my_sprintf (state, state->operandBuffer, formatString, fieldB, fieldA); + else + my_sprintf (state, state->operandBuffer, formatString, + post_address (state, fieldB), fieldA); + write_comments (); + break; + + case 5: + /* LD instruction. + B and C can be regs, or one (both?) can be limm. */ + CHECK_FIELD_A (); + CHECK_FIELD_B (); + CHECK_FIELD_C (); + if (dbg) + printf ("5:b reg %d %d c reg %d %d \n", + fieldBisReg,fieldB,fieldCisReg,fieldC); + state->_offset = 0; + state->_ea_present = 1; + if (fieldBisReg) + state->ea_reg1 = fieldB; + else + state->_offset += fieldB; + if (fieldCisReg) + state->ea_reg2 = fieldC; + else + state->_offset += fieldC; + state->_mem_load = 1; + + directMem = BIT (state->words[0],5); + addrWriteBack = BIT (state->words[0],3); + signExtend = BIT (state->words[0],0); + + write_instr_name (); + WRITE_FORMAT_x_COMMA_LB(A); + if (fieldBisReg || fieldB != 0) + WRITE_FORMAT_x_COMMA (B); + else + fieldB = fieldC; + + WRITE_FORMAT_x_RB (C); + my_sprintf (state, state->operandBuffer, formatString, fieldA, fieldB, fieldC); + write_comments (); + break; + + case 6: + /* LD instruction. */ + CHECK_FIELD_B (); + CHECK_FIELD_A (); + fieldC = FIELDD (state->words[0]); + + if (dbg) + printf ("6:b reg %d %d c 0x%x \n", + fieldBisReg, fieldB, fieldC); + state->_ea_present = 1; + state->_offset = fieldC; + state->_mem_load = 1; + if (fieldBisReg) + state->ea_reg1 = fieldB; + /* field B is either a shimm (same as fieldC) or limm (different!) + Say ea is not present, so only one of us will do the name lookup. */ + else + state->_offset += fieldB, state->_ea_present = 0; + + directMem = BIT (state->words[0],14); + addrWriteBack = BIT (state->words[0],12); + signExtend = BIT (state->words[0],9); + + write_instr_name (); + WRITE_FORMAT_x_COMMA_LB (A); + if (!fieldBisReg) + { + fieldB = state->_offset; + WRITE_FORMAT_x_RB (B); + } + else + { + WRITE_FORMAT_x (B); + if (fieldC != 0 && !BIT (state->words[0],13)) + { + fieldCisReg = 0; + WRITE_FORMAT_COMMA_x_RB (C); } - else if (operand->flags & ARC_OPERAND_RELATIVE_BRANCH) - (*info->print_address_func) (pc + 4 + value, info); - /* ??? Not all cases of this are currently caught. */ - else if (operand->flags & ARC_OPERAND_ABSOLUTE_BRANCH) - (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info); - else if (operand->flags & ARC_OPERAND_ADDRESS) - (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info); - else if (opval) - /* Note that this case catches both normal and auxiliary regs. */ - (*func) (stream, "%s", opval->name); else - (*func) (stream, "%ld", value); + WRITE_FORMAT_RB (); } - - /* We have found and printed an instruction; return. */ - return got_limm_p ? 8 : 4; + my_sprintf (state, state->operandBuffer, formatString, fieldA, fieldB, fieldC); + write_comments (); + break; + + case 7: + /* ST instruction. */ + CHECK_FIELD_B(); + CHECK_FIELD_C(); + fieldA = FIELDD(state->words[0]); /* shimm */ + + /* [B,A offset] */ + if (dbg) printf("7:b reg %d %x off %x\n", + fieldBisReg,fieldB,fieldA); + state->_ea_present = 1; + state->_offset = fieldA; + if (fieldBisReg) + state->ea_reg1 = fieldB; + /* field B is either a shimm (same as fieldA) or limm (different!) + Say ea is not present, so only one of us will do the name lookup. + (for is_limm we do the name translation here). */ + else + state->_offset += fieldB, state->_ea_present = 0; + + directMem = BIT(state->words[0],26); + addrWriteBack = BIT(state->words[0],24); + + write_instr_name(); + WRITE_FORMAT_x_COMMA_LB(C); + + if (!fieldBisReg) + { + fieldB = state->_offset; + WRITE_FORMAT_x_RB(B); + } + else + { + WRITE_FORMAT_x(B); + if (fieldBisReg && fieldA != 0) + { + fieldAisReg = 0; + WRITE_FORMAT_COMMA_x_RB(A); + } + else + WRITE_FORMAT_RB(); + } + my_sprintf (state, state->operandBuffer, formatString, fieldC, fieldB, fieldA); + write_comments2(fieldA); + break; + case 8: + /* SR instruction */ + CHECK_FIELD_B(); + CHECK_FIELD_C(); + + write_instr_name(); + WRITE_FORMAT_x_COMMA_LB(C); + /* Try to print B as an aux reg if it is not a core reg. */ + usesAuxReg = 1; + WRITE_FORMAT_x(B); + WRITE_FORMAT_RB(); + my_sprintf (state, state->operandBuffer, formatString, fieldC, fieldB); + write_comments(); + break; + + case 9: + write_instr_name(); + state->operandBuffer[0] = '\0'; + break; + + case 10: + /* LR instruction */ + CHECK_FIELD_A(); + CHECK_FIELD_B(); + + write_instr_name(); + WRITE_FORMAT_x_COMMA_LB(A); + /* Try to print B as an aux reg if it is not a core reg. */ + usesAuxReg = 1; + WRITE_FORMAT_x(B); + WRITE_FORMAT_RB(); + my_sprintf (state, state->operandBuffer, formatString, fieldA, fieldB); + write_comments(); + break; + + case 11: + CHECK_COND(); + write_instr_name(); + state->operandBuffer[0] = '\0'; + break; + + default: + mwerror (state, "Bad decoding class in ARC disassembler"); + break; } + + state->_cond = cond; + return state->instructionLen = offset; +} + - (*func) (stream, _("*unknown*")); - return 4; +/* Returns the name the user specified core extension register. */ +static const char * +_coreRegName(arg, regval) + void * arg ATTRIBUTE_UNUSED; + int regval; +{ + return arcExtMap_coreRegName (regval); } -/* Given MACH, one of bfd_mach_arc_xxx, return the print_insn function to use. - This does things a non-standard way (the "standard" way would be to copy - this code into disassemble.c). Since there are more than a couple of - variants, hiding all this crud here seems cleaner. */ +/* Returns the name the user specified AUX extension register. */ +static const char * +_auxRegName(void *_this ATTRIBUTE_UNUSED, int regval) +{ + return arcExtMap_auxRegName(regval); +} -disassembler_ftype -arc_get_disassembler (mach, big_p) - int mach; - int big_p; + +/* Returns the name the user specified condition code name. */ +static const char * +_condCodeName(void *_this ATTRIBUTE_UNUSED, int regval) { - switch (mach) - { - case bfd_mach_arc_base: - return big_p ? print_insn_arc_base_big : print_insn_arc_base_little; - } - return print_insn_arc_base_little; + return arcExtMap_condCodeName(regval); } -static int -print_insn_arc_base_little (pc, info) - bfd_vma pc; - disassemble_info *info; +/* Returns the name the user specified extension instruction. */ +static const char * +_instName (void *_this ATTRIBUTE_UNUSED, int majop, int minop, int *flags) { - return print_insn (pc, info, bfd_mach_arc_base, 0); + return arcExtMap_instName(majop, minop, flags); } +/* Decode an instruction returning the size of the instruction + in bytes or zero if unrecognized. */ static int -print_insn_arc_base_big (pc, info) - bfd_vma pc; - disassemble_info *info; +decodeInstr (address, info) + bfd_vma address; /* Address of this instruction. */ + disassemble_info * info; +{ + int status; + bfd_byte buffer[4]; + struct arcDisState s; /* ARC Disassembler state */ + void *stream = info->stream; /* output stream */ + fprintf_ftype func = info->fprintf_func; + int bytes; + + memset (&s, 0, sizeof(struct arcDisState)); + + /* read first instruction */ + status = (*info->read_memory_func) (address, buffer, 4, info); + if (status != 0) + { + (*info->memory_error_func) (status, address, info); + return 0; + } + if (info->endian == BFD_ENDIAN_LITTLE) + s.words[0] = bfd_getl32(buffer); + else + s.words[0] = bfd_getb32(buffer); + /* always read second word in case of limm */ + + /* we ignore the result since last insn may not have a limm */ + status = (*info->read_memory_func) (address + 4, buffer, 4, info); + if (info->endian == BFD_ENDIAN_LITTLE) + s.words[1] = bfd_getl32(buffer); + else + s.words[1] = bfd_getb32(buffer); + + s._this = &s; + s.coreRegName = _coreRegName; + s.auxRegName = _auxRegName; + s.condCodeName = _condCodeName; + s.instName = _instName; + + /* disassemble */ + bytes = dsmOneArcInst(address, (void *)&s); + + /* display the disassembly instruction */ + (*func) (stream, "%08x ", s.words[0]); + (*func) (stream, " "); + + (*func) (stream, "%-10s ", s.instrBuffer); + + if (__TRANSLATION_REQUIRED(s)) + { + bfd_vma addr = s.addresses[s.operandBuffer[1] - '0']; + (*info->print_address_func) ((bfd_vma) addr, info); + (*func) (stream, "\n"); + } + else + (*func) (stream, "%s",s.operandBuffer); + return s.instructionLen; +} + +/* Return the print_insn function to use. + Side effect: load (possibly empty) extension section */ + +disassembler_ftype +arc_get_disassembler (void *ptr) { - return print_insn (pc, info, bfd_mach_arc_base, 1); + if (ptr) + build_ARC_extmap (ptr); + return decodeInstr; } diff --git a/contrib/binutils/opcodes/arc-dis.h b/contrib/binutils/opcodes/arc-dis.h new file mode 100644 index 000000000000..04bfbbb00fe8 --- /dev/null +++ b/contrib/binutils/opcodes/arc-dis.h @@ -0,0 +1,81 @@ +/* Disassembler structures definitions for the ARC. + Copyright 1994, 1995, 1997, 1998, 2000, 2001 + Free Software Foundation, Inc. + Contributed by Doug Evans (dje@cygnus.com). + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software Foundation, + Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef ARCDIS_H +#define ARCDIS_H + +enum +{ + BR_exec_when_no_jump, + BR_exec_always, + BR_exec_when_jump +}; + +enum Flow +{ + noflow, + direct_jump, + direct_call, + indirect_jump, + indirect_call, + invalid_instr +}; + +enum { no_reg = 99 }; +enum { allOperandsSize = 256 }; + +struct arcDisState +{ + void *_this; + int instructionLen; + void (*err)(void*, const char*); + const char *(*coreRegName)(void*, int); + const char *(*auxRegName)(void*, int); + const char *(*condCodeName)(void*, int); + const char *(*instName)(void*, int, int, int*); + + unsigned char* instruction; + unsigned index; + const char *comm[6]; /* instr name, cond, NOP, 3 operands */ + int opWidth; + int targets[4]; + int addresses[4]; + /* Set as a side-effect of calling the disassembler. + Used only by the debugger. */ + enum Flow flow; + int register_for_indirect_jump; + int ea_reg1, ea_reg2, _offset; + int _cond, _opcode; + unsigned long words[2]; + char *commentBuffer; + char instrBuffer[40]; + char operandBuffer[allOperandsSize]; + char _ea_present; + char _mem_load; + char _load_len; + char nullifyMode; + unsigned char commNum; + unsigned char isBranch; + unsigned char tcnt; + unsigned char acnt; +}; + +#define __TRANSLATION_REQUIRED(state) ((state).acnt != 0) + +#endif diff --git a/contrib/binutils/opcodes/arc-ext.c b/contrib/binutils/opcodes/arc-ext.c new file mode 100644 index 000000000000..1a53da936033 --- /dev/null +++ b/contrib/binutils/opcodes/arc-ext.c @@ -0,0 +1,259 @@ +/* ARC target-dependent stuff. Extension structure access functions + Copyright 1995, 1997, 2000, 2001 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include <stdlib.h> +#include <stdio.h> +#include "bfd.h" +#include "arc-ext.h" +#include "libiberty.h" + +/* Extension structure */ +static struct arcExtMap arc_extension_map; + +/* Get the name of an extension instruction. */ + +const char * +arcExtMap_instName(int opcode, int minor, int *flags) +{ + if (opcode == 3) + { + /* FIXME: ??? need to also check 0/1/2 in bit0 for (3f) brk/sleep/swi */ + if (minor < 0x09 || minor == 0x3f) + return 0; + else + opcode = 0x1f - 0x10 + minor - 0x09 + 1; + } + else + if (opcode < 0x10) + return 0; + else + opcode -= 0x10; + if (!arc_extension_map.instructions[opcode]) + return 0; + *flags = arc_extension_map.instructions[opcode]->flags; + return arc_extension_map.instructions[opcode]->name; +} + +/* Get the name of an extension core register. */ + +const char * +arcExtMap_coreRegName(int value) +{ + if (value < 32) + return 0; + return (const char *) arc_extension_map.coreRegisters[value-32]; +} + +/* Get the name of an extension condition code. */ + +const char * +arcExtMap_condCodeName(int value) +{ + if (value < 16) + return 0; + return (const char *) arc_extension_map.condCodes[value-16]; +} + +/* Get the name of an extension aux register. */ + +const char * +arcExtMap_auxRegName(long address) +{ + /* walk the list of aux reg names and find the name */ + struct ExtAuxRegister *r; + + for (r = arc_extension_map.auxRegisters; r; r = r->next) { + if (r->address == address) + return (const char *) r->name; + } + return 0; +} + +/* Recursively free auxilliary register strcture pointers until + the list is empty. */ + +static void +clean_aux_registers(struct ExtAuxRegister *r) +{ + if (r -> next) + { + clean_aux_registers( r->next); + free(r -> name); + free(r -> next); + r ->next = NULL; + } + else + free(r -> name); +} + +/* Free memory that has been allocated for the extensions. */ + +static void +cleanup_ext_map(void) +{ + struct ExtAuxRegister *r; + struct ExtInstruction *insn; + int i; + + /* clean aux reg structure */ + r = arc_extension_map.auxRegisters; + if (r) + { + (clean_aux_registers(r)); + free(r); + } + + /* clean instructions */ + for (i = 0; i < NUM_EXT_INST; i++) + { + insn = arc_extension_map.instructions[i]; + if (insn) + free(insn->name); + } + + /* clean core reg struct */ + for (i = 0; i < NUM_EXT_CORE; i++) + { + if (arc_extension_map.coreRegisters[i]) + free(arc_extension_map.coreRegisters[i]); + } + + for (i = 0; i < NUM_EXT_COND; i++) { + if (arc_extension_map.condCodes[i]) + free(arc_extension_map.condCodes[i]); + } + + memset(&arc_extension_map, 0, sizeof(struct arcExtMap)); +} + +int +arcExtMap_add(void *base, unsigned long length) +{ + unsigned char *block = base; + unsigned char *p = block; + + /* Clean up and reset everything if needed. */ + cleanup_ext_map(); + + while (p && p < (block + length)) + { + /* p[0] == length of record + p[1] == type of record + For instructions: + p[2] = opcode + p[3] = minor opcode (if opcode == 3) + p[4] = flags + p[5]+ = name + For core regs and condition codes: + p[2] = value + p[3]+ = name + For aux regs: + p[2..5] = value + p[6]+ = name + (value is p[2]<<24|p[3]<<16|p[4]<<8|p[5]) */ + + if (p[0] == 0) + return -1; + + switch (p[1]) + { + case EXT_INSTRUCTION: + { + char opcode = p[2]; + char minor = p[3]; + char * insn_name = (char *) xmalloc(( (int)*p-5) * sizeof(char)); + struct ExtInstruction * insn = + (struct ExtInstruction *) xmalloc(sizeof(struct ExtInstruction)); + + if (opcode==3) + opcode = 0x1f - 0x10 + minor - 0x09 + 1; + else + opcode -= 0x10; + insn -> flags = (char) *(p+4); + strcpy(insn_name, (p+5)); + insn -> name = insn_name; + arc_extension_map.instructions[(int) opcode] = insn; + } + break; + + case EXT_CORE_REGISTER: + { + char * core_name = (char *) xmalloc(((int)*p-3) * sizeof(char)); + + strcpy(core_name, (p+3)); + arc_extension_map.coreRegisters[p[2]-32] = core_name; + } + break; + + case EXT_COND_CODE: + { + char * cc_name = (char *) xmalloc( ((int)*p-3) * sizeof(char)); + strcpy(cc_name, (p+3)); + arc_extension_map.condCodes[p[2]-16] = cc_name; + } + break; + + case EXT_AUX_REGISTER: + { + /* trickier -- need to store linked list to these */ + struct ExtAuxRegister *newAuxRegister = + (struct ExtAuxRegister *)malloc(sizeof(struct ExtAuxRegister)); + char * aux_name = (char *) xmalloc ( ((int)*p-6) * sizeof(char)); + + strcpy (aux_name, (p+6)); + newAuxRegister->name = aux_name; + newAuxRegister->address = p[2]<<24 | p[3]<<16 | p[4]<<8 | p[5]; + newAuxRegister->next = arc_extension_map.auxRegisters; + arc_extension_map.auxRegisters = newAuxRegister; + } + break; + + default: + return -1; + + } + p += p[0]; /* move to next record */ + } + + return 0; +} + +/* Load hw extension descibed in .extArcMap ELF section. */ + +void +build_ARC_extmap (text_bfd) + bfd *text_bfd; +{ + char *arcExtMap; + bfd_size_type count; + asection *p; + + for (p = text_bfd->sections; p != NULL; p = p->next) + if (!strcmp (p->name, ".arcextmap")) + { + count = p->_raw_size; + arcExtMap = (char *) xmalloc (count); + if (bfd_get_section_contents (text_bfd, p, (PTR) arcExtMap, 0, count)) + { + arcExtMap_add ((PTR) arcExtMap, count); + break; + } + free ((PTR) arcExtMap); + } +} diff --git a/contrib/binutils/opcodes/arc-ext.h b/contrib/binutils/opcodes/arc-ext.h new file mode 100644 index 000000000000..bfe9750b60c3 --- /dev/null +++ b/contrib/binutils/opcodes/arc-ext.h @@ -0,0 +1,62 @@ +/* ARC target-dependent stuff. Extension data structures. + Copyright 1995, 1997, 2000, 2001 Free Software Foundation, Inc. + +This file is part of GDB. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef ARCEXT_H +#define ARCEXT_H + +enum {EXT_INSTRUCTION = 0}; +enum {EXT_CORE_REGISTER = 1}; +enum {EXT_AUX_REGISTER = 2}; +enum {EXT_COND_CODE = 3}; + +enum {NUM_EXT_INST = (0x1f-0x10+1) + (0x3f-0x09+1)}; +enum {NUM_EXT_CORE = 59-32+1}; +enum {NUM_EXT_COND = 0x1f-0x10+1}; + +struct ExtInstruction +{ + char flags; + char *name; +}; + +struct ExtAuxRegister +{ + long address; + char *name; + struct ExtAuxRegister *next; +}; + +struct arcExtMap +{ + struct ExtAuxRegister *auxRegisters; + struct ExtInstruction *instructions[NUM_EXT_INST]; + unsigned char *coreRegisters[NUM_EXT_CORE]; + unsigned char *condCodes[NUM_EXT_COND]; +}; + +extern int arcExtMap_add(void*, unsigned long); +extern const char *arcExtMap_coreRegName(int); +extern const char *arcExtMap_auxRegName(long); +extern const char *arcExtMap_condCodeName(int); +extern const char *arcExtMap_instName(int, int, int*); +extern void build_ARC_extmap(bfd *); + +#define IGNORE_FIRST_OPD 1 + +#endif diff --git a/contrib/binutils/opcodes/arc-opc.c b/contrib/binutils/opcodes/arc-opc.c index f17ffc086fe9..c67cd8881a61 100644 --- a/contrib/binutils/opcodes/arc-opc.c +++ b/contrib/binutils/opcodes/arc-opc.c @@ -1,7 +1,8 @@ /* Opcode table for the ARC. - Copyright (c) 1994, 1995, 1997, 1998 Free Software Foundation, Inc. + Copyright 1994, 1995, 1997, 1998, 2000, 2001 + Free Software Foundation, Inc. Contributed by Doug Evans (dje@cygnus.com). - + This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) @@ -13,17 +14,12 @@ GNU General Public License for more details. You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + along with this program; if not, write to the Free Software Foundation, + Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include <stdio.h> -#include "sysdep.h" +#include "ansidecl.h" #include "opcode/arc.h" -#include "opintl.h" - -#ifndef NULL -#define NULL 0 -#endif #define INSERT_FN(fn) \ static arc_insn fn PARAMS ((arc_insn, const struct arc_operand *, \ @@ -36,22 +32,43 @@ static long fn PARAMS ((arc_insn *, const struct arc_operand *, \ INSERT_FN (insert_reg); INSERT_FN (insert_shimmfinish); INSERT_FN (insert_limmfinish); -INSERT_FN (insert_shimmoffset); -INSERT_FN (insert_shimmzero); +INSERT_FN (insert_offset); +INSERT_FN (insert_base); +INSERT_FN (insert_st_syntax); +INSERT_FN (insert_ld_syntax); +INSERT_FN (insert_addr_wb); INSERT_FN (insert_flag); +INSERT_FN (insert_nullify); INSERT_FN (insert_flagfinish); INSERT_FN (insert_cond); INSERT_FN (insert_forcelimm); INSERT_FN (insert_reladdr); INSERT_FN (insert_absaddr); +INSERT_FN (insert_jumpflags); INSERT_FN (insert_unopmacro); EXTRACT_FN (extract_reg); +EXTRACT_FN (extract_ld_offset); +EXTRACT_FN (extract_ld_syntax); +EXTRACT_FN (extract_st_offset); +EXTRACT_FN (extract_st_syntax); EXTRACT_FN (extract_flag); EXTRACT_FN (extract_cond); EXTRACT_FN (extract_reladdr); +EXTRACT_FN (extract_jumpflags); EXTRACT_FN (extract_unopmacro); +enum operand {OP_NONE,OP_REG,OP_SHIMM,OP_LIMM}; + +#define OPERANDS 3 + +enum operand ls_operand[OPERANDS]; + +#define LS_VALUE 0 +#define LS_DEST 0 +#define LS_BASE 1 +#define LS_OFFSET 2 + /* Various types of ARC operands, including insn suffixes. */ /* Insn format values: @@ -61,8 +78,13 @@ EXTRACT_FN (extract_unopmacro); 'c' REGC register C field 'S' SHIMMFINISH finish inserting a shimm value 'L' LIMMFINISH finish inserting a limm value - 'd' SHIMMOFFSET shimm offset in ld,st insns - '0' SHIMMZERO 0 shimm value in ld,st insns + 'o' OFFSET offset in st insns + 'O' OFFSET offset in ld insns + '0' SYNTAX_ST_NE enforce store insn syntax, no errors + '1' SYNTAX_LD_NE enforce load insn syntax, no errors + '2' SYNTAX_ST enforce store insn syntax, errors, last pattern only + '3' SYNTAX_LD enforce load insn syntax, errors, last pattern only + 's' BASE base in st insn 'f' FLAG F flag 'F' FLAGFINISH finish inserting the F flag 'G' FLAGINSN insert F flag in "flag" insn @@ -71,6 +93,7 @@ EXTRACT_FN (extract_unopmacro); 'Q' FORCELIMM set `cond_p' to 1 to ensure a constant is a limm 'B' BRANCH branch address (22 bit pc relative) 'J' JUMP jump address (26 bit absolute) + 'j' JUMPFLAGS optional high order bits of 'J' 'z' SIZE1 size field in ld a,[b,c] 'Z' SIZE10 size field in ld a,[b,shimm] 'y' SIZE22 size field in st c,[b,shimm] @@ -92,28 +115,27 @@ EXTRACT_FN (extract_unopmacro); Fields are: - CHAR BITS SHIFT FLAGS INSERT_FN EXTRACT_FN -*/ + CHAR BITS SHIFT FLAGS INSERT_FN EXTRACT_FN */ const struct arc_operand arc_operands[] = { -/* place holder (??? not sure if needed) */ +/* place holder (??? not sure if needed). */ #define UNUSED 0 - { 0 }, + { 0, 0, 0, 0, 0, 0 }, -/* register A or shimm/limm indicator */ +/* register A or shimm/limm indicator. */ #define REGA (UNUSED + 1) - { 'a', 6, ARC_SHIFT_REGA, ARC_OPERAND_SIGNED, insert_reg, extract_reg }, + { 'a', 6, ARC_SHIFT_REGA, ARC_OPERAND_SIGNED | ARC_OPERAND_ERROR, insert_reg, extract_reg }, -/* register B or shimm/limm indicator */ +/* register B or shimm/limm indicator. */ #define REGB (REGA + 1) - { 'b', 6, ARC_SHIFT_REGB, ARC_OPERAND_SIGNED, insert_reg, extract_reg }, + { 'b', 6, ARC_SHIFT_REGB, ARC_OPERAND_SIGNED | ARC_OPERAND_ERROR, insert_reg, extract_reg }, -/* register C or shimm/limm indicator */ +/* register C or shimm/limm indicator. */ #define REGC (REGB + 1) - { 'c', 6, ARC_SHIFT_REGC, ARC_OPERAND_SIGNED, insert_reg, extract_reg }, + { 'c', 6, ARC_SHIFT_REGC, ARC_OPERAND_SIGNED | ARC_OPERAND_ERROR, insert_reg, extract_reg }, -/* fake operand used to insert shimm value into most instructions */ +/* fake operand used to insert shimm value into most instructions. */ #define SHIMMFINISH (REGC + 1) { 'S', 9, 0, ARC_OPERAND_SIGNED + ARC_OPERAND_FAKE, insert_shimmfinish, 0 }, @@ -121,123 +143,141 @@ const struct arc_operand arc_operands[] = #define LIMMFINISH (SHIMMFINISH + 1) { 'L', 32, 32, ARC_OPERAND_ADDRESS + ARC_OPERAND_LIMM + ARC_OPERAND_FAKE, insert_limmfinish, 0 }, -/* shimm operand when there is no reg indicator (ld,st) */ -#define SHIMMOFFSET (LIMMFINISH + 1) - { 'd', 9, 0, ARC_OPERAND_SIGNED, insert_shimmoffset, 0 }, +/* shimm operand when there is no reg indicator (st). */ +#define ST_OFFSET (LIMMFINISH + 1) + { 'o', 9, 0, ARC_OPERAND_LIMM | ARC_OPERAND_SIGNED | ARC_OPERAND_STORE, insert_offset, extract_st_offset }, + +/* shimm operand when there is no reg indicator (ld). */ +#define LD_OFFSET (ST_OFFSET + 1) + { 'O', 9, 0,ARC_OPERAND_LIMM | ARC_OPERAND_SIGNED | ARC_OPERAND_LOAD, insert_offset, extract_ld_offset }, + +/* operand for base. */ +#define BASE (LD_OFFSET + 1) + { 's', 6, ARC_SHIFT_REGB, ARC_OPERAND_LIMM | ARC_OPERAND_SIGNED, insert_base, extract_reg}, + +/* 0 enforce syntax for st insns. */ +#define SYNTAX_ST_NE (BASE + 1) + { '0', 9, 0, ARC_OPERAND_FAKE, insert_st_syntax, extract_st_syntax }, + +/* 1 enforce syntax for ld insns. */ +#define SYNTAX_LD_NE (SYNTAX_ST_NE + 1) + { '1', 9, 0, ARC_OPERAND_FAKE, insert_ld_syntax, extract_ld_syntax }, -/* 0 shimm operand for ld,st insns */ -#define SHIMMZERO (SHIMMOFFSET + 1) - { '0', 9, 0, ARC_OPERAND_FAKE, insert_shimmzero, 0 }, +/* 0 enforce syntax for st insns. */ +#define SYNTAX_ST (SYNTAX_LD_NE + 1) + { '2', 9, 0, ARC_OPERAND_FAKE | ARC_OPERAND_ERROR, insert_st_syntax, extract_st_syntax }, -/* flag update bit (insertion is defered until we know how) */ -#define FLAG (SHIMMZERO + 1) +/* 0 enforce syntax for ld insns. */ +#define SYNTAX_LD (SYNTAX_ST + 1) + { '3', 9, 0, ARC_OPERAND_FAKE | ARC_OPERAND_ERROR, insert_ld_syntax, extract_ld_syntax }, + +/* flag update bit (insertion is defered until we know how). */ +#define FLAG (SYNTAX_LD + 1) { 'f', 1, 8, ARC_OPERAND_SUFFIX, insert_flag, extract_flag }, -/* fake utility operand to finish 'f' suffix handling */ +/* fake utility operand to finish 'f' suffix handling. */ #define FLAGFINISH (FLAG + 1) { 'F', 1, 8, ARC_OPERAND_FAKE, insert_flagfinish, 0 }, -/* fake utility operand to set the 'f' flag for the "flag" insn */ +/* fake utility operand to set the 'f' flag for the "flag" insn. */ #define FLAGINSN (FLAGFINISH + 1) { 'G', 1, 8, ARC_OPERAND_FAKE, insert_flag, 0 }, -/* branch delay types */ +/* branch delay types. */ #define DELAY (FLAGINSN + 1) - { 'n', 2, 5, ARC_OPERAND_SUFFIX }, + { 'n', 2, 5, ARC_OPERAND_SUFFIX , insert_nullify, 0 }, -/* conditions */ +/* conditions. */ #define COND (DELAY + 1) { 'q', 5, 0, ARC_OPERAND_SUFFIX, insert_cond, extract_cond }, -/* set `cond_p' to 1 to ensure a constant is treated as a limm */ +/* set `cond_p' to 1 to ensure a constant is treated as a limm. */ #define FORCELIMM (COND + 1) - { 'Q', 0, 0, ARC_OPERAND_FAKE, insert_forcelimm }, + { 'Q', 0, 0, ARC_OPERAND_FAKE, insert_forcelimm, 0 }, -/* branch address; b, bl, and lp insns */ +/* branch address; b, bl, and lp insns. */ #define BRANCH (FORCELIMM + 1) - { 'B', 20, 7, ARC_OPERAND_RELATIVE_BRANCH + ARC_OPERAND_SIGNED, insert_reladdr, extract_reladdr }, + { 'B', 20, 7, (ARC_OPERAND_RELATIVE_BRANCH + ARC_OPERAND_SIGNED) | ARC_OPERAND_ERROR, insert_reladdr, extract_reladdr }, /* jump address; j insn (this is basically the same as 'L' except that the - value is right shifted by 2) */ + value is right shifted by 2). */ #define JUMP (BRANCH + 1) - { 'J', 24, 32, ARC_OPERAND_ABSOLUTE_BRANCH + ARC_OPERAND_LIMM + ARC_OPERAND_FAKE, insert_absaddr }, + { 'J', 24, 32, ARC_OPERAND_ERROR | (ARC_OPERAND_ABSOLUTE_BRANCH + ARC_OPERAND_LIMM + ARC_OPERAND_FAKE), insert_absaddr, 0 }, + +/* jump flags; j{,l} insn value or'ed into 'J' addr for flag values. */ +#define JUMPFLAGS (JUMP + 1) + { 'j', 6, 26, ARC_OPERAND_JUMPFLAGS | ARC_OPERAND_ERROR, insert_jumpflags, extract_jumpflags }, -/* size field, stored in bit 1,2 */ -#define SIZE1 (JUMP + 1) - { 'z', 2, 1, ARC_OPERAND_SUFFIX }, +/* size field, stored in bit 1,2. */ +#define SIZE1 (JUMPFLAGS + 1) + { 'z', 2, 1, ARC_OPERAND_SUFFIX, 0, 0 }, -/* size field, stored in bit 10,11 */ +/* size field, stored in bit 10,11. */ #define SIZE10 (SIZE1 + 1) - { 'Z', 2, 10, ARC_OPERAND_SUFFIX, }, + { 'Z', 2, 10, ARC_OPERAND_SUFFIX, 0, 0 }, -/* size field, stored in bit 22,23 */ +/* size field, stored in bit 22,23. */ #define SIZE22 (SIZE10 + 1) - { 'y', 2, 22, ARC_OPERAND_SUFFIX, }, + { 'y', 2, 22, ARC_OPERAND_SUFFIX, 0, 0 }, -/* sign extend field, stored in bit 0 */ +/* sign extend field, stored in bit 0. */ #define SIGN0 (SIZE22 + 1) - { 'x', 1, 0, ARC_OPERAND_SUFFIX }, + { 'x', 1, 0, ARC_OPERAND_SUFFIX, 0, 0 }, -/* sign extend field, stored in bit 9 */ +/* sign extend field, stored in bit 9. */ #define SIGN9 (SIGN0 + 1) - { 'X', 1, 9, ARC_OPERAND_SUFFIX }, + { 'X', 1, 9, ARC_OPERAND_SUFFIX, 0, 0 }, -/* address write back, stored in bit 3 */ +/* address write back, stored in bit 3. */ #define ADDRESS3 (SIGN9 + 1) - { 'w', 1, 3, ARC_OPERAND_SUFFIX }, + { 'w', 1, 3, ARC_OPERAND_SUFFIX, insert_addr_wb, 0}, -/* address write back, stored in bit 12 */ +/* address write back, stored in bit 12. */ #define ADDRESS12 (ADDRESS3 + 1) - { 'W', 1, 12, ARC_OPERAND_SUFFIX }, + { 'W', 1, 12, ARC_OPERAND_SUFFIX, insert_addr_wb, 0}, -/* address write back, stored in bit 24 */ +/* address write back, stored in bit 24. */ #define ADDRESS24 (ADDRESS12 + 1) - { 'v', 1, 24, ARC_OPERAND_SUFFIX }, + { 'v', 1, 24, ARC_OPERAND_SUFFIX, insert_addr_wb, 0}, -/* cache bypass, stored in bit 5 */ +/* cache bypass, stored in bit 5. */ #define CACHEBYPASS5 (ADDRESS24 + 1) - { 'e', 1, 5, ARC_OPERAND_SUFFIX }, + { 'e', 1, 5, ARC_OPERAND_SUFFIX, 0, 0 }, -/* cache bypass, stored in bit 14 */ +/* cache bypass, stored in bit 14. */ #define CACHEBYPASS14 (CACHEBYPASS5 + 1) - { 'E', 1, 14, ARC_OPERAND_SUFFIX }, + { 'E', 1, 14, ARC_OPERAND_SUFFIX, 0, 0 }, -/* cache bypass, stored in bit 26 */ +/* cache bypass, stored in bit 26. */ #define CACHEBYPASS26 (CACHEBYPASS14 + 1) - { 'D', 1, 26, ARC_OPERAND_SUFFIX }, + { 'D', 1, 26, ARC_OPERAND_SUFFIX, 0, 0 }, -/* unop macro, used to copy REGB to REGC */ +/* unop macro, used to copy REGB to REGC. */ #define UNOPMACRO (CACHEBYPASS26 + 1) { 'U', 6, ARC_SHIFT_REGC, ARC_OPERAND_FAKE, insert_unopmacro, extract_unopmacro }, /* '.' modifier ('.' required). */ #define MODDOT (UNOPMACRO + 1) - { '.', 1, 0, ARC_MOD_DOT }, + { '.', 1, 0, ARC_MOD_DOT, 0, 0 }, /* Dummy 'r' modifier for the register table. It's called a "dummy" because there's no point in inserting an 'r' into all the %a/%b/%c occurrences in the insn table. */ #define REG (MODDOT + 1) - { 'r', 6, 0, ARC_MOD_REG }, + { 'r', 6, 0, ARC_MOD_REG, 0, 0 }, /* Known auxiliary register modifier (stored in shimm field). */ #define AUXREG (REG + 1) - { 'A', 9, 0, ARC_MOD_AUXREG }, + { 'A', 9, 0, ARC_MOD_AUXREG, 0, 0 }, -/* end of list place holder */ - { 0 } +/* end of list place holder. */ + { 0, 0, 0, 0, 0, 0 } }; /* Given a format letter, yields the index into `arc_operands'. eg: arc_operand_map['a'] = REGA. */ unsigned char arc_operand_map[256]; -#define I(x) (((x) & 31) << 27) -#define A(x) (((x) & ARC_MASK_REG) << ARC_SHIFT_REGA) -#define B(x) (((x) & ARC_MASK_REG) << ARC_SHIFT_REGB) -#define C(x) (((x) & ARC_MASK_REG) << ARC_SHIFT_REGC) -#define R(x,b,m) (((x) & (m)) << (b)) /* value X, mask M, at bit B */ - /* ARC instructions. Longer versions of insns must appear before shorter ones (if gas sees @@ -246,110 +286,141 @@ unsigned char arc_operand_map[256]; Instructions that are really macros based on other insns must appear before the real insn so they're chosen when disassembling. Eg: The `mov' - insn is really the `and' insn. - - This table is best viewed on a wide screen (161 columns). I'd prefer to - keep it this way. The rest of the file, however, should be viewable on an - 80 column terminal. */ - -/* ??? This table also includes macros: asl, lsl, and mov. The ppc port has - a more general facility for dealing with macros which could be used if - we need to. */ - -/* This table can't be `const' because members `next_asm' and `next_dis' are - computed at run-time. We could split this into two, but that doesn't seem - worth it. */ + insn is really the `and' insn. */ -struct arc_opcode arc_opcodes[] = { +struct arc_opcode arc_opcodes[] = +{ + /* Base case instruction set (core versions 5-8) */ - /* Macros appear first. */ /* "mov" is really an "and". */ - { "mov%.q%.f %a,%b%F%S%L%U", I(-1), I(12) }, + { "mov%.q%.f %a,%b%F%S%L%U", I(-1), I(12), ARC_MACH_5, 0, 0 }, /* "asl" is really an "add". */ - { "asl%.q%.f %a,%b%F%S%L%U", I(-1), I(8) }, + { "asl%.q%.f %a,%b%F%S%L%U", I(-1), I(8), ARC_MACH_5, 0, 0 }, /* "lsl" is really an "add". */ - { "lsl%.q%.f %a,%b%F%S%L%U", I(-1), I(8) }, + { "lsl%.q%.f %a,%b%F%S%L%U", I(-1), I(8), ARC_MACH_5, 0, 0 }, /* "nop" is really an "xor". */ - { "nop", 0xffffffff, 0x7fffffff }, + { "nop", 0x7fffffff, 0x7fffffff, ARC_MACH_5, 0, 0 }, /* "rlc" is really an "adc". */ - { "rlc%.q%.f %a,%b%F%S%L%U", I(-1), I(9) }, - - /* The rest of these needn't be sorted, but it helps to find them if they are. */ - { "adc%.q%.f %a,%b,%c%F%S%L", I(-1), I(9) }, - { "add%.q%.f %a,%b,%c%F%S%L", I(-1), I(8) }, - { "and%.q%.f %a,%b,%c%F%S%L", I(-1), I(12) }, - { "asr%.q%.f %a,%b%F%S%L", I(-1)+C(-1), I(3)+C(1) }, - { "bic%.q%.f %a,%b,%c%F%S%L", I(-1), I(14) }, - { "b%q%.n %B", I(-1), I(4), ARC_OPCODE_COND_BRANCH }, - { "bl%q%.n %B", I(-1), I(5), ARC_OPCODE_COND_BRANCH }, - { "extb%.q%.f %a,%b%F%S%L", I(-1)+C(-1), I(3)+C(7) }, - { "extw%.q%.f %a,%b%F%S%L", I(-1)+C(-1), I(3)+C(8) }, - { "flag%.q %b%G%S%L", I(-1)+A(-1)+C(-1), I(3)+A(ARC_REG_SHIMM_UPDATE)+C(0) }, - /* %Q: force cond_p=1 --> no shimm values */ - /* ??? This insn allows an optional flags spec. */ - { "j%q%Q%.n%.f %b%J", I(-1)+A(-1)+C(-1)+R(-1,7,1), I(7)+A(0)+C(0)+R(0,7,1) }, - /* Put opcode 1 ld insns first so shimm gets prefered over limm. */ - /* "[%b]" is before "[%b,%d]" so 0 offsets don't get printed. */ - { "ld%Z%.X%.W%.E %0%a,[%b]%L", I(-1)+R(-1,13,1)+R(-1,0,511), I(1)+R(0,13,1)+R(0,0,511) }, - { "ld%Z%.X%.W%.E %a,[%b,%d]%S%L", I(-1)+R(-1,13,1), I(1)+R(0,13,1) }, - { "ld%z%.x%.w%.e%Q %a,[%b,%c]%L", I(-1)+R(-1,4,1)+R(-1,6,7), I(0)+R(0,4,1)+R(0,6,7) }, - { "lp%q%.n %B", I(-1), I(6), }, - { "lr %a,[%Ab]%S%L", I(-1)+C(-1), I(1)+C(0x10) }, - { "lsr%.q%.f %a,%b%F%S%L", I(-1)+C(-1), I(3)+C(2) }, - { "or%.q%.f %a,%b,%c%F%S%L", I(-1), I(13) }, - { "ror%.q%.f %a,%b%F%S%L", I(-1)+C(-1), I(3)+C(3) }, - { "rrc%.q%.f %a,%b%F%S%L", I(-1)+C(-1), I(3)+C(4) }, - { "sbc%.q%.f %a,%b,%c%F%S%L", I(-1), I(11) }, - { "sexb%.q%.f %a,%b%F%S%L", I(-1)+C(-1), I(3)+C(5) }, - { "sexw%.q%.f %a,%b%F%S%L", I(-1)+C(-1), I(3)+C(6) }, - { "sr %c,[%Ab]%S%L", I(-1)+A(-1), I(2)+A(0x10) }, - /* "[%b]" is before "[%b,%d]" so 0 offsets don't get printed. */ - { "st%y%.v%.D%Q %0%c,[%b]%L", I(-1)+R(-1,25,1)+R(-1,21,1)+R(-1,0,511), I(2)+R(0,25,1)+R(0,21,1)+R(0,0,511) }, - { "st%y%.v%.D %c,[%b,%d]%S%L", I(-1)+R(-1,25,1)+R(-1,21,1), I(2)+R(0,25,1)+R(0,21,1) }, - { "sub%.q%.f %a,%b,%c%F%S%L", I(-1), I(10) }, - { "xor%.q%.f %a,%b,%c%F%S%L", I(-1), I(15) } + { "rlc%.q%.f %a,%b%F%S%L%U", I(-1), I(9), ARC_MACH_5, 0, 0 }, + { "adc%.q%.f %a,%b,%c%F%S%L", I(-1), I(9), ARC_MACH_5, 0, 0 }, + { "add%.q%.f %a,%b,%c%F%S%L", I(-1), I(8), ARC_MACH_5, 0, 0 }, + { "and%.q%.f %a,%b,%c%F%S%L", I(-1), I(12), ARC_MACH_5, 0, 0 }, + { "asr%.q%.f %a,%b%F%S%L", I(-1)|C(-1), I(3)|C(1), ARC_MACH_5, 0, 0 }, + { "bic%.q%.f %a,%b,%c%F%S%L", I(-1), I(14), ARC_MACH_5, 0, 0 }, + { "b%q%.n %B", I(-1), I(4), ARC_MACH_5 | ARC_OPCODE_COND_BRANCH, 0, 0 }, + { "bl%q%.n %B", I(-1), I(5), ARC_MACH_5 | ARC_OPCODE_COND_BRANCH, 0, 0 }, + { "extb%.q%.f %a,%b%F%S%L", I(-1)|C(-1), I(3)|C(7), ARC_MACH_5, 0, 0 }, + { "extw%.q%.f %a,%b%F%S%L", I(-1)|C(-1), I(3)|C(8), ARC_MACH_5, 0, 0 }, + { "flag%.q %b%G%S%L", I(-1)|A(-1)|C(-1), I(3)|A(ARC_REG_SHIMM_UPDATE)|C(0), ARC_MACH_5, 0, 0 }, + { "brk", 0x1ffffe00, 0x1ffffe00, ARC_MACH_7, 0, 0 }, + { "sleep", 0x1ffffe01, 0x1ffffe01, ARC_MACH_7, 0, 0 }, + { "swi", 0x1ffffe02, 0x1ffffe02, ARC_MACH_8, 0, 0 }, + /* %Q: force cond_p=1 -> no shimm values. This insn allows an + optional flags spec. */ + { "j%q%Q%.n%.f %b%F%J,%j", I(-1)|A(-1)|C(-1)|R(-1,7,1), I(7)|A(0)|C(0)|R(0,7,1), ARC_MACH_5 | ARC_OPCODE_COND_BRANCH, 0, 0 }, + { "j%q%Q%.n%.f %b%F%J", I(-1)|A(-1)|C(-1)|R(-1,7,1), I(7)|A(0)|C(0)|R(0,7,1), ARC_MACH_5 | ARC_OPCODE_COND_BRANCH, 0, 0 }, + /* This insn allows an optional flags spec. */ + { "jl%q%Q%.n%.f %b%F%J,%j", I(-1)|A(-1)|C(-1)|R(-1,7,1)|R(-1,9,1), I(7)|A(0)|C(0)|R(0,7,1)|R(1,9,1), ARC_MACH_6 | ARC_OPCODE_COND_BRANCH, 0, 0 }, + { "jl%q%Q%.n%.f %b%F%J", I(-1)|A(-1)|C(-1)|R(-1,7,1)|R(-1,9,1), I(7)|A(0)|C(0)|R(0,7,1)|R(1,9,1), ARC_MACH_6 | ARC_OPCODE_COND_BRANCH, 0, 0 }, + /* Put opcode 1 ld insns first so shimm gets prefered over limm. + "[%b]" is before "[%b,%o]" so 0 offsets don't get printed. */ + { "ld%Z%.X%.W%.E %a,[%s]%S%L%1", I(-1)|R(-1,13,1)|R(-1,0,511), I(1)|R(0,13,1)|R(0,0,511), ARC_MACH_5, 0, 0 }, + { "ld%z%.x%.w%.e %a,[%s]%S%L%1", I(-1)|R(-1,4,1)|R(-1,6,7), I(0)|R(0,4,1)|R(0,6,7), ARC_MACH_5, 0, 0 }, + { "ld%z%.x%.w%.e %a,[%s,%O]%S%L%1", I(-1)|R(-1,4,1)|R(-1,6,7), I(0)|R(0,4,1)|R(0,6,7), ARC_MACH_5, 0, 0 }, + { "ld%Z%.X%.W%.E %a,[%s,%O]%S%L%3", I(-1)|R(-1,13,1), I(1)|R(0,13,1), ARC_MACH_5, 0, 0 }, + { "lp%q%.n %B", I(-1), I(6), ARC_MACH_5, 0, 0 }, + { "lr %a,[%Ab]%S%L", I(-1)|C(-1), I(1)|C(0x10), ARC_MACH_5, 0, 0 }, + { "lsr%.q%.f %a,%b%F%S%L", I(-1)|C(-1), I(3)|C(2), ARC_MACH_5, 0, 0 }, + { "or%.q%.f %a,%b,%c%F%S%L", I(-1), I(13), ARC_MACH_5, 0, 0 }, + { "ror%.q%.f %a,%b%F%S%L", I(-1)|C(-1), I(3)|C(3), ARC_MACH_5, 0, 0 }, + { "rrc%.q%.f %a,%b%F%S%L", I(-1)|C(-1), I(3)|C(4), ARC_MACH_5, 0, 0 }, + { "sbc%.q%.f %a,%b,%c%F%S%L", I(-1), I(11), ARC_MACH_5, 0, 0 }, + { "sexb%.q%.f %a,%b%F%S%L", I(-1)|C(-1), I(3)|C(5), ARC_MACH_5, 0, 0 }, + { "sexw%.q%.f %a,%b%F%S%L", I(-1)|C(-1), I(3)|C(6), ARC_MACH_5, 0, 0 }, + { "sr %c,[%Ab]%S%L", I(-1)|A(-1), I(2)|A(0x10), ARC_MACH_5, 0, 0 }, + /* "[%b]" is before "[%b,%o]" so 0 offsets don't get printed. */ + { "st%y%.v%.D %c,[%s]%L%S%0", I(-1)|R(-1,25,1)|R(-1,21,1), I(2)|R(0,25,1)|R(0,21,1), ARC_MACH_5, 0, 0 }, + { "st%y%.v%.D %c,[%s,%o]%S%L%2", I(-1)|R(-1,25,1)|R(-1,21,1), I(2)|R(0,25,1)|R(0,21,1), ARC_MACH_5, 0, 0 }, + { "sub%.q%.f %a,%b,%c%F%S%L", I(-1), I(10), ARC_MACH_5, 0, 0 }, + { "xor%.q%.f %a,%b,%c%F%S%L", I(-1), I(15), ARC_MACH_5, 0, 0 } }; + const int arc_opcodes_count = sizeof (arc_opcodes) / sizeof (arc_opcodes[0]); const struct arc_operand_value arc_reg_names[] = { - /* Sort this so that the first 61 entries are sequential. - IE: For each i (i<61), arc_reg_names[i].value == i. */ - - { "r0", 0, REG }, { "r1", 1, REG }, { "r2", 2, REG }, { "r3", 3, REG }, - { "r4", 4, REG }, { "r5", 5, REG }, { "r6", 6, REG }, { "r7", 7, REG }, - { "r8", 8, REG }, { "r9", 9, REG }, { "r10", 10, REG }, { "r11", 11, REG }, - { "r12", 12, REG }, { "r13", 13, REG }, { "r14", 14, REG }, { "r15", 15, REG }, - { "r16", 16, REG }, { "r17", 17, REG }, { "r18", 18, REG }, { "r19", 19, REG }, - { "r20", 20, REG }, { "r21", 21, REG }, { "r22", 22, REG }, { "r23", 23, REG }, - { "r24", 24, REG }, { "r25", 25, REG }, { "r26", 26, REG }, { "fp", 27, REG }, - { "sp", 28, REG }, { "ilink1", 29, REG }, { "ilink2", 30, REG }, { "blink", 31, REG }, - { "r32", 32, REG }, { "r33", 33, REG }, { "r34", 34, REG }, { "r35", 35, REG }, - { "r36", 36, REG }, { "r37", 37, REG }, { "r38", 38, REG }, { "r39", 39, REG }, - { "r40", 40, REG }, { "r41", 41, REG }, { "r42", 42, REG }, { "r43", 43, REG }, - { "r44", 44, REG }, { "r45", 45, REG }, { "r46", 46, REG }, { "r47", 47, REG }, - { "r48", 48, REG }, { "r49", 49, REG }, { "r50", 50, REG }, { "r51", 51, REG }, - { "r52", 52, REG }, { "r53", 53, REG }, { "r54", 54, REG }, { "r55", 55, REG }, - { "r56", 56, REG }, { "r57", 57, REG }, { "r58", 58, REG }, { "r59", 59, REG }, - { "lp_count", 60, REG }, - - /* I'd prefer to output these as "fp" and "sp" by default, but we still need - to recognize the canonical values. */ - { "r27", 27, REG }, { "r28", 28, REG }, - - /* Someone may wish to refer to these in this way, and it's probably a - good idea to reserve them as such anyway. */ - { "r29", 29, REG }, { "r30", 30, REG }, { "r31", 31, REG }, { "r60", 60, REG }, - - /* Standard auxiliary registers. */ - { "status", 0, AUXREG }, - { "semaphore", 1, AUXREG }, - { "lp_start", 2, AUXREG }, - { "lp_end", 3, AUXREG }, - { "identity", 4, AUXREG }, - { "debug", 5, AUXREG }, + /* Core register set r0-r63. */ + + /* r0-r28 - general purpose registers. */ + { "r0", 0, REG, 0 }, { "r1", 1, REG, 0 }, { "r2", 2, REG, 0 }, + { "r3", 3, REG, 0 }, { "r4", 4, REG, 0 }, { "r5", 5, REG, 0 }, + { "r6", 6, REG, 0 }, { "r7", 7, REG, 0 }, { "r8", 8, REG, 0 }, + { "r9", 9, REG, 0 }, { "r10", 10, REG, 0 }, { "r11", 11, REG, 0 }, + { "r12", 12, REG, 0 }, { "r13", 13, REG, 0 }, { "r14", 14, REG, 0 }, + { "r15", 15, REG, 0 }, { "r16", 16, REG, 0 }, { "r17", 17, REG, 0 }, + { "r18", 18, REG, 0 }, { "r19", 19, REG, 0 }, { "r20", 20, REG, 0 }, + { "r21", 21, REG, 0 }, { "r22", 22, REG, 0 }, { "r23", 23, REG, 0 }, + { "r24", 24, REG, 0 }, { "r25", 25, REG, 0 }, { "r26", 26, REG, 0 }, + { "r27", 27, REG, 0 }, { "r28", 28, REG, 0 }, + /* Maskable interrupt link register. */ + { "ilink1", 29, REG, 0 }, + /* Maskable interrupt link register. */ + { "ilink2", 30, REG, 0 }, + /* Branch-link register. */ + { "blink", 31, REG, 0 }, + + /* r32-r59 reserved for extensions. */ + { "r32", 32, REG, 0 }, { "r33", 33, REG, 0 }, { "r34", 34, REG, 0 }, + { "r35", 35, REG, 0 }, { "r36", 36, REG, 0 }, { "r37", 37, REG, 0 }, + { "r38", 38, REG, 0 }, { "r39", 39, REG, 0 }, { "r40", 40, REG, 0 }, + { "r41", 41, REG, 0 }, { "r42", 42, REG, 0 }, { "r43", 43, REG, 0 }, + { "r44", 44, REG, 0 }, { "r45", 45, REG, 0 }, { "r46", 46, REG, 0 }, + { "r47", 47, REG, 0 }, { "r48", 48, REG, 0 }, { "r49", 49, REG, 0 }, + { "r50", 50, REG, 0 }, { "r51", 51, REG, 0 }, { "r52", 52, REG, 0 }, + { "r53", 53, REG, 0 }, { "r54", 54, REG, 0 }, { "r55", 55, REG, 0 }, + { "r56", 56, REG, 0 }, { "r57", 57, REG, 0 }, { "r58", 58, REG, 0 }, + { "r59", 59, REG, 0 }, + + /* Loop count register (24 bits). */ + { "lp_count", 60, REG, 0 }, + /* Short immediate data indicator setting flags. */ + { "r61", 61, REG, ARC_REGISTER_READONLY }, + /* Long immediate data indicator setting flags. */ + { "r62", 62, REG, ARC_REGISTER_READONLY }, + /* Short immediate data indicator not setting flags. */ + { "r63", 63, REG, ARC_REGISTER_READONLY }, + + /* Small-data base register. */ + { "gp", 26, REG, 0 }, + /* Frame pointer. */ + { "fp", 27, REG, 0 }, + /* Stack pointer. */ + { "sp", 28, REG, 0 }, + + { "r29", 29, REG, 0 }, + { "r30", 30, REG, 0 }, + { "r31", 31, REG, 0 }, + { "r60", 60, REG, 0 }, + + /* Auxiliary register set. */ + + /* Auxiliary register address map: + 0xffffffff-0xffffff00 (-1..-256) - customer shimm allocation + 0xfffffeff-0x80000000 - customer limm allocation + 0x7fffffff-0x00000100 - ARC limm allocation + 0x000000ff-0x00000000 - ARC shimm allocation */ + + /* Base case auxiliary registers (shimm address). */ + { "status", 0x00, AUXREG, 0 }, + { "semaphore", 0x01, AUXREG, 0 }, + { "lp_start", 0x02, AUXREG, 0 }, + { "lp_end", 0x03, AUXREG, 0 }, + { "identity", 0x04, AUXREG, ARC_REGISTER_READONLY }, + { "debug", 0x05, AUXREG, 0 }, }; -const int arc_reg_names_count = sizeof (arc_reg_names) / sizeof (arc_reg_names[0]); + +const int arc_reg_names_count = + sizeof (arc_reg_names) / sizeof (arc_reg_names[0]); /* The suffix table. Operands with the same name must be stored together. */ @@ -357,58 +428,64 @@ const int arc_reg_names_count = sizeof (arc_reg_names) / sizeof (arc_reg_names[0 const struct arc_operand_value arc_suffixes[] = { /* Entry 0 is special, default values aren't printed by the disassembler. */ - { "", 0, -1 }, - { "al", 0, COND }, - { "ra", 0, COND }, - { "eq", 1, COND }, - { "z", 1, COND }, - { "ne", 2, COND }, - { "nz", 2, COND }, - { "p", 3, COND }, - { "pl", 3, COND }, - { "n", 4, COND }, - { "mi", 4, COND }, - { "c", 5, COND }, - { "cs", 5, COND }, - { "lo", 5, COND }, - { "nc", 6, COND }, - { "cc", 6, COND }, - { "hs", 6, COND }, - { "v", 7, COND }, - { "vs", 7, COND }, - { "nv", 8, COND }, - { "vc", 8, COND }, - { "gt", 9, COND }, - { "ge", 10, COND }, - { "lt", 11, COND }, - { "le", 12, COND }, - { "hi", 13, COND }, - { "ls", 14, COND }, - { "pnz", 15, COND }, - { "f", 1, FLAG }, - { "nd", ARC_DELAY_NONE, DELAY }, - { "d", ARC_DELAY_NORMAL, DELAY }, - { "jd", ARC_DELAY_JUMP, DELAY }, -/*{ "b", 7, SIZEEXT },*/ -/*{ "b", 5, SIZESEX },*/ - { "b", 1, SIZE1 }, - { "b", 1, SIZE10 }, - { "b", 1, SIZE22 }, -/*{ "w", 8, SIZEEXT },*/ -/*{ "w", 6, SIZESEX },*/ - { "w", 2, SIZE1 }, - { "w", 2, SIZE10 }, - { "w", 2, SIZE22 }, - { "x", 1, SIGN0 }, - { "x", 1, SIGN9 }, - { "a", 1, ADDRESS3 }, - { "a", 1, ADDRESS12 }, - { "a", 1, ADDRESS24 }, - { "di", 1, CACHEBYPASS5 }, - { "di", 1, CACHEBYPASS14 }, - { "di", 1, CACHEBYPASS26 }, + { "", 0, -1, 0 }, + + /* Base case condition codes. */ + { "al", 0, COND, 0 }, + { "ra", 0, COND, 0 }, + { "eq", 1, COND, 0 }, + { "z", 1, COND, 0 }, + { "ne", 2, COND, 0 }, + { "nz", 2, COND, 0 }, + { "pl", 3, COND, 0 }, + { "p", 3, COND, 0 }, + { "mi", 4, COND, 0 }, + { "n", 4, COND, 0 }, + { "cs", 5, COND, 0 }, + { "c", 5, COND, 0 }, + { "lo", 5, COND, 0 }, + { "cc", 6, COND, 0 }, + { "nc", 6, COND, 0 }, + { "hs", 6, COND, 0 }, + { "vs", 7, COND, 0 }, + { "v", 7, COND, 0 }, + { "vc", 8, COND, 0 }, + { "nv", 8, COND, 0 }, + { "gt", 9, COND, 0 }, + { "ge", 10, COND, 0 }, + { "lt", 11, COND, 0 }, + { "le", 12, COND, 0 }, + { "hi", 13, COND, 0 }, + { "ls", 14, COND, 0 }, + { "pnz", 15, COND, 0 }, + + /* Condition codes 16-31 reserved for extensions. */ + + { "f", 1, FLAG, 0 }, + + { "nd", ARC_DELAY_NONE, DELAY, 0 }, + { "d", ARC_DELAY_NORMAL, DELAY, 0 }, + { "jd", ARC_DELAY_JUMP, DELAY, 0 }, + + { "b", 1, SIZE1, 0 }, + { "b", 1, SIZE10, 0 }, + { "b", 1, SIZE22, 0 }, + { "w", 2, SIZE1, 0 }, + { "w", 2, SIZE10, 0 }, + { "w", 2, SIZE22, 0 }, + { "x", 1, SIGN0, 0 }, + { "x", 1, SIGN9, 0 }, + { "a", 1, ADDRESS3, 0 }, + { "a", 1, ADDRESS12, 0 }, + { "a", 1, ADDRESS24, 0 }, + + { "di", 1, CACHEBYPASS5, 0 }, + { "di", 1, CACHEBYPASS14, 0 }, + { "di", 1, CACHEBYPASS26, 0 }, }; -const int arc_suffixes_count = sizeof (arc_suffixes) / sizeof (arc_suffixes[0]); + +const int arc_suffixes_count = + sizeof (arc_suffixes) / sizeof (arc_suffixes[0]); /* Indexed by first letter of opcode. Points to chain of opcodes with same first letter. */ @@ -429,10 +506,12 @@ arc_get_opcode_mach (bfd_mach, big_p) int bfd_mach, big_p; { static int mach_type_map[] = - { - ARC_MACH_BASE - }; - + { + ARC_MACH_5, + ARC_MACH_6, + ARC_MACH_7, + ARC_MACH_8 + }; return mach_type_map[bfd_mach] | (big_p ? ARC_MACH_BIG : 0); } @@ -453,8 +532,6 @@ arc_opcode_init_tables (flags) /* We may be intentionally called more than once (for example gdb will call us each time the user switches cpu). These tables only need to be init'd once though. */ - /* ??? We can remove the need for arc_opcode_supported by taking it into - account here, but I'm not sure I want to do that yet (if ever). */ if (!init_p) { register int i,n; @@ -490,23 +567,7 @@ int arc_opcode_supported (opcode) const struct arc_opcode *opcode; { - if (ARC_OPCODE_CPU (opcode->flags) == 0) - return 1; - if (ARC_OPCODE_CPU (opcode->flags) & ARC_HAVE_CPU (cpu_type)) - return 1; - return 0; -} - -/* Return non-zero if OPVAL is supported on the specified cpu. - Cpu selection is made when calling `arc_opcode_init_tables'. */ - -int -arc_opval_supported (opval) - const struct arc_operand_value *opval; -{ - if (ARC_OPVAL_CPU (opval->flags) == 0) - return 1; - if (ARC_OPVAL_CPU (opval->flags) & ARC_HAVE_CPU (cpu_type)) + if (ARC_OPCODE_CPU (opcode->flags) <= cpu_type) return 1; return 0; } @@ -535,14 +596,26 @@ static int flag_p; /* Nonzero if we've finished processing the 'f' suffix. */ static int flagshimm_handled_p; +/* Nonzero if we've seen a 'a' suffix (address writeback). */ +static int addrwb_p; + /* Nonzero if we've seen a 'q' suffix (condition code). */ static int cond_p; +/* Nonzero if we've inserted a nullify condition. */ +static int nullify_p; + +/* The value of the a nullify condition we inserted. */ +static int nullify; + +/* Nonzero if we've inserted jumpflags. */ +static int jumpflags_p; + /* Nonzero if we've inserted a shimm. */ static int shimm_p; /* The value of the shimm we inserted (each insn only gets one but it can - appear multiple times. */ + appear multiple times). */ static int shimm; /* Nonzero if we've inserted a limm (during assembly) or seen a limm @@ -560,11 +633,20 @@ static long limm; void arc_opcode_init_insert () { + int i; + + for(i = 0; i < OPERANDS; i++) + ls_operand[i] = OP_NONE; + flag_p = 0; flagshimm_handled_p = 0; cond_p = 0; + addrwb_p = 0; shimm_p = 0; limm_p = 0; + jumpflags_p = 0; + nullify_p = 0; + nullify = 0; /* the default is important. */ } /* Called by the assembler to see if the insn has a limm operand. @@ -594,6 +676,7 @@ insert_reg (insn, operand, mods, reg, value, errmsg) const char **errmsg; { static char buf[100]; + enum operand op_type = OP_NONE; if (reg == NULL) { @@ -609,16 +692,30 @@ insert_reg (insn, operand, mods, reg, value, errmsg) we have to use a limm. */ && (!shimm_p || shimm == value)) { - int marker = flag_p ? ARC_REG_SHIMM_UPDATE : ARC_REG_SHIMM; - flagshimm_handled_p = 1; - shimm_p = 1; - shimm = value; + int marker; + + op_type = OP_SHIMM; + /* forget about shimm as dest mlm. */ + + if ('a' != operand->fmt) + { + shimm_p = 1; + shimm = value; + flagshimm_handled_p = 1; + marker = flag_p ? ARC_REG_SHIMM_UPDATE : ARC_REG_SHIMM; + } + else + { + /* don't request flag setting on shimm as dest. */ + marker = ARC_REG_SHIMM; + } insn |= marker << operand->shift; - /* insn |= value & 511; - done later */ + /* insn |= value & 511; - done later. */ } /* We have to use a limm. If we've already seen one they must match. */ else if (!limm_p || limm == value) { + op_type = OP_LIMM; limm_p = 1; limm = value; insn |= ARC_REG_LIMM << operand->shift; @@ -626,7 +723,7 @@ insert_reg (insn, operand, mods, reg, value, errmsg) } else { - *errmsg = _("unable to fit different valued constants into instruction"); + *errmsg = "unable to fit different valued constants into instruction"; } } else @@ -636,27 +733,66 @@ insert_reg (insn, operand, mods, reg, value, errmsg) if (reg->type == AUXREG) { if (!(mods & ARC_MOD_AUXREG)) - *errmsg = _("auxiliary register not allowed here"); + *errmsg = "auxiliary register not allowed here"; else { + if ((insn & I(-1)) == I(2)) /* check for use validity. */ + { + if (reg->flags & ARC_REGISTER_READONLY) + *errmsg = "attempt to set readonly register"; + } + else + { + if (reg->flags & ARC_REGISTER_WRITEONLY) + *errmsg = "attempt to read writeonly register"; + } insn |= ARC_REG_SHIMM << operand->shift; insn |= reg->value << arc_operands[reg->type].shift; } } else { + /* check for use validity. */ + if ('a' == operand->fmt || ((insn & I(-1)) < I(2))) + { + if (reg->flags & ARC_REGISTER_READONLY) + *errmsg = "attempt to set readonly register"; + } + if ('a' != operand->fmt) + { + if (reg->flags & ARC_REGISTER_WRITEONLY) + *errmsg = "attempt to read writeonly register"; + } /* We should never get an invalid register number here. */ if ((unsigned int) reg->value > 60) { - /* xgettext:c-format */ - sprintf (buf, _("invalid register number `%d'"), reg->value); + sprintf (buf, "invalid register number `%d'", reg->value); *errmsg = buf; } - else - insn |= reg->value << operand->shift; + insn |= reg->value << operand->shift; + op_type = OP_REG; } } + switch (operand->fmt) + { + case 'a': + ls_operand[LS_DEST] = op_type; + break; + case 's': + ls_operand[LS_BASE] = op_type; + break; + case 'c': + if ((insn & I(-1)) == I(2)) + ls_operand[LS_VALUE] = op_type; + else + ls_operand[LS_OFFSET] = op_type; + break; + case 'o': case 'O': + ls_operand[LS_OFFSET] = op_type; + break; + } + return insn; } @@ -665,17 +801,33 @@ insert_reg (insn, operand, mods, reg, value, errmsg) static arc_insn insert_flag (insn, operand, mods, reg, value, errmsg) arc_insn insn; - const struct arc_operand *operand; - int mods; - const struct arc_operand_value *reg; - long value; - const char **errmsg; + const struct arc_operand *operand ATTRIBUTE_UNUSED; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value *reg ATTRIBUTE_UNUSED; + long value ATTRIBUTE_UNUSED; + const char **errmsg ATTRIBUTE_UNUSED; { /* We can't store anything in the insn until we've parsed the registers. Just record the fact that we've got this flag. `insert_reg' will use it to store the correct value (ARC_REG_SHIMM_UPDATE or bit 0x100). */ flag_p = 1; + return insn; +} +/* Called when we see an nullify condition. */ + +static arc_insn +insert_nullify (insn, operand, mods, reg, value, errmsg) + arc_insn insn; + const struct arc_operand *operand; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value *reg ATTRIBUTE_UNUSED; + long value; + const char **errmsg ATTRIBUTE_UNUSED; +{ + nullify_p = 1; + insn |= (value & ((1 << operand->bits) - 1)) << operand->shift; + nullify = value; return insn; } @@ -687,10 +839,10 @@ static arc_insn insert_flagfinish (insn, operand, mods, reg, value, errmsg) arc_insn insn; const struct arc_operand *operand; - int mods; - const struct arc_operand_value *reg; - long value; - const char **errmsg; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value *reg ATTRIBUTE_UNUSED; + long value ATTRIBUTE_UNUSED; + const char **errmsg ATTRIBUTE_UNUSED; { if (flag_p && !flagshimm_handled_p) { @@ -708,10 +860,10 @@ static arc_insn insert_cond (insn, operand, mods, reg, value, errmsg) arc_insn insn; const struct arc_operand *operand; - int mods; - const struct arc_operand_value *reg; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value *reg ATTRIBUTE_UNUSED; long value; - const char **errmsg; + const char **errmsg ATTRIBUTE_UNUSED; { cond_p = 1; insn |= (value & ((1 << operand->bits) - 1)) << operand->shift; @@ -727,20 +879,82 @@ insert_cond (insn, operand, mods, reg, value, errmsg) static arc_insn insert_forcelimm (insn, operand, mods, reg, value, errmsg) arc_insn insn; + const struct arc_operand *operand ATTRIBUTE_UNUSED; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value *reg ATTRIBUTE_UNUSED; + long value ATTRIBUTE_UNUSED; + const char **errmsg ATTRIBUTE_UNUSED; +{ + cond_p = 1; + return insn; +} + +static arc_insn +insert_addr_wb (insn, operand, mods, reg, value, errmsg) + arc_insn insn; + const struct arc_operand *operand; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value *reg ATTRIBUTE_UNUSED; + long value ATTRIBUTE_UNUSED; + const char **errmsg ATTRIBUTE_UNUSED; +{ + addrwb_p = 1 << operand->shift; + return insn; +} + +static arc_insn +insert_base (insn, operand, mods, reg, value, errmsg) + arc_insn insn; const struct arc_operand *operand; int mods; const struct arc_operand_value *reg; long value; const char **errmsg; { - cond_p = 1; + if (reg != NULL) + { + arc_insn myinsn; + myinsn = insert_reg (0, operand,mods, reg, value, errmsg) >> operand->shift; + insn |= B(myinsn); + ls_operand[LS_BASE] = OP_REG; + } + else if (ARC_SHIMM_CONST_P (value) && !cond_p) + { + if (shimm_p && value != shimm) + { + /* convert the previous shimm operand to a limm. */ + limm_p = 1; + limm = shimm; + insn &= ~C(-1); /* we know where the value is in insn. */ + insn |= C(ARC_REG_LIMM); + ls_operand[LS_VALUE] = OP_LIMM; + } + insn |= ARC_REG_SHIMM << operand->shift; + shimm_p = 1; + shimm = value; + ls_operand[LS_BASE] = OP_SHIMM; + } + else + { + if (limm_p && value != limm) + { + *errmsg = "too many long constants"; + return insn; + } + limm_p = 1; + limm = value; + insn |= B(ARC_REG_LIMM); + ls_operand[LS_BASE] = OP_LIMM; + } + return insn; } -/* Used in ld/st insns to handle the shimm offset field. */ +/* Used in ld/st insns to handle the offset field. We don't try to + match operand syntax here. we catch bad combinations later. */ static arc_insn -insert_shimmoffset (insn, operand, mods, reg, value, errmsg) +insert_offset (insn, operand, mods, reg, value, errmsg) arc_insn insn; const struct arc_operand *operand; int mods; @@ -749,11 +963,15 @@ insert_shimmoffset (insn, operand, mods, reg, value, errmsg) const char **errmsg; { long minval, maxval; - static char buf[100]; if (reg != NULL) { - *errmsg = "register appears where shimm value expected"; + arc_insn myinsn; + myinsn = insert_reg (0,operand,mods,reg,value,errmsg) >> operand->shift; + ls_operand[LS_OFFSET] = OP_REG; + if (operand->flags & ARC_OPERAND_LOAD) /* not if store, catch it later. */ + if ((insn & I(-1)) != I(1)) /* not if opcode == 1, catch it later. */ + insn |= C(myinsn); } else { @@ -769,35 +987,271 @@ insert_shimmoffset (insn, operand, mods, reg, value, errmsg) minval = 0; maxval = (1 << operand->bits) - 1; } - if (value < minval || value > maxval) + if ((cond_p && !limm_p) || (value < minval || value > maxval)) { - /* xgettext:c-format */ - sprintf (buf, _("value won't fit in range %ld - %ld"), - minval, maxval); - *errmsg = buf; + if (limm_p && value != limm) + { + *errmsg = "too many long constants"; + } + else + { + limm_p = 1; + limm = value; + if (operand->flags & ARC_OPERAND_STORE) + insn |= B(ARC_REG_LIMM); + if (operand->flags & ARC_OPERAND_LOAD) + insn |= C(ARC_REG_LIMM); + ls_operand[LS_OFFSET] = OP_LIMM; + } } else - insn |= (value & ((1 << operand->bits) - 1)) << operand->shift; + { + if ((value < minval || value > maxval)) + *errmsg = "need too many limms"; + else if (shimm_p && value != shimm) + { + /* check for bad operand combinations before we lose info about them. */ + if ((insn & I(-1)) == I(1)) + { + *errmsg = "to many shimms in load"; + goto out; + } + if (limm_p && operand->flags & ARC_OPERAND_LOAD) + { + *errmsg = "too many long constants"; + goto out; + } + /* convert what we thought was a shimm to a limm. */ + limm_p = 1; + limm = shimm; + if (ls_operand[LS_VALUE] == OP_SHIMM && operand->flags & ARC_OPERAND_STORE) + { + insn &= ~C(-1); + insn |= C(ARC_REG_LIMM); + ls_operand[LS_VALUE] = OP_LIMM; + } + if (ls_operand[LS_BASE] == OP_SHIMM && operand->flags & ARC_OPERAND_STORE) + { + insn &= ~B(-1); + insn |= B(ARC_REG_LIMM); + ls_operand[LS_BASE] = OP_LIMM; + } + } + shimm = value; + shimm_p = 1; + ls_operand[LS_OFFSET] = OP_SHIMM; + } } + out: return insn; } -/* Used in ld/st insns when the shimm offset is 0. */ +/* Used in st insns to do final disasemble syntax check. */ + +static long +extract_st_syntax (insn, operand, mods, opval, invalid) + arc_insn *insn; + const struct arc_operand *operand ATTRIBUTE_UNUSED; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value **opval ATTRIBUTE_UNUSED; + int *invalid; +{ +#define ST_SYNTAX(V,B,O) \ +((ls_operand[LS_VALUE] == (V) && \ + ls_operand[LS_BASE] == (B) && \ + ls_operand[LS_OFFSET] == (O))) + + if (!((ST_SYNTAX(OP_REG,OP_REG,OP_NONE) && (insn[0] & 511) == 0) + || ST_SYNTAX(OP_REG,OP_LIMM,OP_NONE) + || (ST_SYNTAX(OP_SHIMM,OP_REG,OP_NONE) && (insn[0] & 511) == 0) + || (ST_SYNTAX(OP_SHIMM,OP_SHIMM,OP_NONE) && (insn[0] & 511) == 0) + || ST_SYNTAX(OP_SHIMM,OP_LIMM,OP_NONE) + || ST_SYNTAX(OP_SHIMM,OP_LIMM,OP_SHIMM) + || ST_SYNTAX(OP_SHIMM,OP_SHIMM,OP_SHIMM) + || (ST_SYNTAX(OP_LIMM,OP_REG,OP_NONE) && (insn[0] & 511) == 0) + || ST_SYNTAX(OP_REG,OP_REG,OP_SHIMM) + || ST_SYNTAX(OP_REG,OP_SHIMM,OP_SHIMM) + || ST_SYNTAX(OP_SHIMM,OP_REG,OP_SHIMM) + || ST_SYNTAX(OP_LIMM,OP_SHIMM,OP_SHIMM) + || ST_SYNTAX(OP_LIMM,OP_SHIMM,OP_NONE) + || ST_SYNTAX(OP_LIMM,OP_REG,OP_SHIMM))) + *invalid = 1; + return 0; +} + +int +arc_limm_fixup_adjust(insn) + arc_insn insn; +{ + int retval = 0; + + /* check for st shimm,[limm]. */ + if ((insn & (I(-1) | C(-1) | B(-1))) == + (I(2) | C(ARC_REG_SHIMM) | B(ARC_REG_LIMM))) + { + retval = insn & 0x1ff; + if (retval & 0x100) /* sign extend 9 bit offset. */ + retval |= ~0x1ff; + } + return -retval; /* negate offset for return. */ +} + +/* Used in st insns to do final syntax check. */ static arc_insn -insert_shimmzero (insn, operand, mods, reg, value, errmsg) +insert_st_syntax (insn, operand, mods, reg, value, errmsg) arc_insn insn; - const struct arc_operand *operand; - int mods; - const struct arc_operand_value *reg; - long value; + const struct arc_operand *operand ATTRIBUTE_UNUSED; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value *reg ATTRIBUTE_UNUSED; + long value ATTRIBUTE_UNUSED; const char **errmsg; { - shimm_p = 1; - shimm = 0; + if (ST_SYNTAX(OP_SHIMM,OP_REG,OP_NONE) && shimm != 0) + { + /* change an illegal insn into a legal one, it's easier to + do it here than to try to handle it during operand scan. */ + limm_p = 1; + limm = shimm; + shimm_p = 0; + shimm = 0; + insn = insn & ~(C(-1) | 511); + insn |= ARC_REG_LIMM << ARC_SHIFT_REGC; + ls_operand[LS_VALUE] = OP_LIMM; + } + + if (ST_SYNTAX(OP_REG,OP_SHIMM,OP_NONE) || ST_SYNTAX(OP_LIMM,OP_SHIMM,OP_NONE)) + { + /* try to salvage this syntax. */ + if (shimm & 0x1) /* odd shimms won't work. */ + { + if (limm_p) /* do we have a limm already? */ + { + *errmsg = "impossible store"; + } + limm_p = 1; + limm = shimm; + shimm = 0; + shimm_p = 0; + insn = insn & ~(B(-1) | 511); + insn |= B(ARC_REG_LIMM); + ls_operand[LS_BASE] = OP_LIMM; + } + else + { + shimm >>= 1; + insn = insn & ~511; + insn |= shimm; + ls_operand[LS_OFFSET] = OP_SHIMM; + } + } + if (ST_SYNTAX(OP_SHIMM,OP_LIMM,OP_NONE)) + { + limm += arc_limm_fixup_adjust(insn); + } + if (ST_SYNTAX(OP_LIMM,OP_SHIMM,OP_SHIMM) && (shimm * 2 == limm)) + { + insn &= ~C(-1); + limm_p = 0; + limm = 0; + insn |= C(ARC_REG_SHIMM); + ls_operand[LS_VALUE] = OP_SHIMM; + } + if (!(ST_SYNTAX(OP_REG,OP_REG,OP_NONE) + || ST_SYNTAX(OP_REG,OP_LIMM,OP_NONE) + || ST_SYNTAX(OP_REG,OP_REG,OP_SHIMM) + || ST_SYNTAX(OP_REG,OP_SHIMM,OP_SHIMM) + || (ST_SYNTAX(OP_SHIMM,OP_SHIMM,OP_NONE) && (shimm == 0)) + || ST_SYNTAX(OP_SHIMM,OP_LIMM,OP_NONE) + || ST_SYNTAX(OP_SHIMM,OP_REG,OP_NONE) + || ST_SYNTAX(OP_SHIMM,OP_REG,OP_SHIMM) + || ST_SYNTAX(OP_SHIMM,OP_SHIMM,OP_SHIMM) + || ST_SYNTAX(OP_LIMM,OP_SHIMM,OP_SHIMM) + || ST_SYNTAX(OP_LIMM,OP_REG,OP_NONE) + || ST_SYNTAX(OP_LIMM,OP_REG,OP_SHIMM))) + *errmsg = "st operand error"; + if (addrwb_p) + { + if (ls_operand[LS_BASE] != OP_REG) + *errmsg = "address writeback not allowed"; + insn |= addrwb_p; + } + if (ST_SYNTAX(OP_SHIMM,OP_REG,OP_NONE) && shimm) + *errmsg = "store value must be zero"; + return insn; +} + +/* Used in ld insns to do final syntax check. */ + +static arc_insn +insert_ld_syntax (insn, operand, mods, reg, value, errmsg) + arc_insn insn; + const struct arc_operand *operand ATTRIBUTE_UNUSED; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value *reg ATTRIBUTE_UNUSED; + long value ATTRIBUTE_UNUSED; + const char **errmsg; +{ +#define LD_SYNTAX(D,B,O) \ +((ls_operand[LS_DEST] == (D) && \ + ls_operand[LS_BASE] == (B) && \ + ls_operand[LS_OFFSET] == (O))) + + int test = insn & I(-1); + + if (!(test == I(1))) + { + if ((ls_operand[LS_DEST] == OP_SHIMM || ls_operand[LS_BASE] == OP_SHIMM + || ls_operand[LS_OFFSET] == OP_SHIMM)) + *errmsg = "invalid load/shimm insn"; + } + if (!(LD_SYNTAX(OP_REG,OP_REG,OP_NONE) + || LD_SYNTAX(OP_REG,OP_REG,OP_REG) + || LD_SYNTAX(OP_REG,OP_REG,OP_SHIMM) + || (LD_SYNTAX(OP_REG,OP_LIMM,OP_REG) && !(test == I(1))) + || (LD_SYNTAX(OP_REG,OP_REG,OP_LIMM) && !(test == I(1))) + || LD_SYNTAX(OP_REG,OP_SHIMM,OP_SHIMM) + || (LD_SYNTAX(OP_REG,OP_LIMM,OP_NONE) && (test == I(1))))) + *errmsg = "ld operand error"; + if (addrwb_p) + { + if (ls_operand[LS_BASE] != OP_REG) + *errmsg = "address writeback not allowed"; + insn |= addrwb_p; + } return insn; } +/* Used in ld insns to do final syntax check. */ + +static long +extract_ld_syntax (insn, operand, mods, opval, invalid) + arc_insn *insn; + const struct arc_operand *operand ATTRIBUTE_UNUSED; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value **opval ATTRIBUTE_UNUSED; + int *invalid; +{ + int test = insn[0] & I(-1); + + if (!(test == I(1))) + { + if ((ls_operand[LS_DEST] == OP_SHIMM || ls_operand[LS_BASE] == OP_SHIMM + || ls_operand[LS_OFFSET] == OP_SHIMM)) + *invalid = 1; + } + if (!((LD_SYNTAX(OP_REG,OP_REG,OP_NONE) && (test == I(1))) + || LD_SYNTAX(OP_REG,OP_REG,OP_REG) + || LD_SYNTAX(OP_REG,OP_REG,OP_SHIMM) + || (LD_SYNTAX(OP_REG,OP_REG,OP_LIMM) && !(test == I(1))) + || (LD_SYNTAX(OP_REG,OP_LIMM,OP_REG) && !(test == I(1))) + || (LD_SYNTAX(OP_REG,OP_SHIMM,OP_NONE) && (shimm == 0)) + || LD_SYNTAX(OP_REG,OP_SHIMM,OP_SHIMM) + || (LD_SYNTAX(OP_REG,OP_LIMM,OP_NONE) && (test == I(1))))) + *invalid = 1; + return 0; +} + /* Called at the end of processing normal insns (eg: add) to insert a shimm value (if present) into the insn. */ @@ -805,10 +1259,10 @@ static arc_insn insert_shimmfinish (insn, operand, mods, reg, value, errmsg) arc_insn insn; const struct arc_operand *operand; - int mods; - const struct arc_operand_value *reg; - long value; - const char **errmsg; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value *reg ATTRIBUTE_UNUSED; + long value ATTRIBUTE_UNUSED; + const char **errmsg ATTRIBUTE_UNUSED; { if (shimm_p) insn |= (shimm & ((1 << operand->bits) - 1)) << operand->shift; @@ -830,14 +1284,51 @@ insert_shimmfinish (insn, operand, mods, reg, value, errmsg) static arc_insn insert_limmfinish (insn, operand, mods, reg, value, errmsg) arc_insn insn; + const struct arc_operand *operand ATTRIBUTE_UNUSED; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value *reg ATTRIBUTE_UNUSED; + long value ATTRIBUTE_UNUSED; + const char **errmsg ATTRIBUTE_UNUSED; +{ +#if 0 + if (limm_p) + ; /* nothing to do, gas does it. */ +#endif + return insn; +} + +static arc_insn +insert_jumpflags (insn, operand, mods, reg, value, errmsg) + arc_insn insn; const struct arc_operand *operand; - int mods; - const struct arc_operand_value *reg; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value *reg ATTRIBUTE_UNUSED; long value; const char **errmsg; { - if (limm_p) - ; /* nothing to do, gas does it */ + if (!flag_p) + { + *errmsg = "jump flags, but no .f seen"; + } + if (!limm_p) + { + *errmsg = "jump flags, but no limm addr"; + } + if (limm & 0xfc000000) + { + *errmsg = "flag bits of jump address limm lost"; + } + if (limm & 0x03000000) + { + *errmsg = "attempt to set HR bits"; + } + if ((value & ((1 << operand->bits) - 1)) != value) + { + *errmsg = "bad jump flags value"; + } + jumpflags_p = 1; + limm = ((limm & ((1 << operand->shift) - 1)) + | ((value & ((1 << operand->bits) - 1)) << operand->shift)); return insn; } @@ -847,10 +1338,10 @@ static arc_insn insert_unopmacro (insn, operand, mods, reg, value, errmsg) arc_insn insn; const struct arc_operand *operand; - int mods; - const struct arc_operand_value *reg; - long value; - const char **errmsg; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value *reg ATTRIBUTE_UNUSED; + long value ATTRIBUTE_UNUSED; + const char **errmsg ATTRIBUTE_UNUSED; { insn |= ((insn >> ARC_SHIFT_REGB) & ARC_MASK_REG) << operand->shift; return insn; @@ -862,13 +1353,13 @@ static arc_insn insert_reladdr (insn, operand, mods, reg, value, errmsg) arc_insn insn; const struct arc_operand *operand; - int mods; - const struct arc_operand_value *reg; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value *reg ATTRIBUTE_UNUSED; long value; const char **errmsg; { if (value & 3) - *errmsg = _("branch address not on 4 byte boundary"); + *errmsg = "branch address not on 4 byte boundary"; insn |= ((value >> 2) & ((1 << operand->bits) - 1)) << operand->shift; return insn; } @@ -878,23 +1369,42 @@ insert_reladdr (insn, operand, mods, reg, value, errmsg) Note that this function is only intended to handle instructions (with 4 byte immediate operands). It is not intended to handle data. */ -/* ??? Actually, there's nothing for us to do as we can't call frag_more, the +/* ??? Actually, there's little for us to do as we can't call frag_more, the caller must do that. The extract fns take a pointer to two words. The insert fns could be converted and then we could do something useful, but then the reloc handlers would have to know to work on the second word of - a 2 word quantity. That's too much so we don't handle them. */ + a 2 word quantity. That's too much so we don't handle them. + + We do check for correct usage of the nullify suffix, or we + set the default correctly, though. */ static arc_insn insert_absaddr (insn, operand, mods, reg, value, errmsg) arc_insn insn; - const struct arc_operand *operand; - int mods; - const struct arc_operand_value *reg; - long value; + const struct arc_operand *operand ATTRIBUTE_UNUSED; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value *reg ATTRIBUTE_UNUSED; + long value ATTRIBUTE_UNUSED; const char **errmsg; { if (limm_p) - ; /* nothing to do */ + { + /* if it is a jump and link, .jd must be specified. */ + if (insn & R(-1,9,1)) + { + if (!nullify_p) + { + insn |= 0x02 << 5; /* default nullify to .jd. */ + } + else + { + if (nullify != 0x02) + { + *errmsg = "must specify .jd or no nullify suffix"; + } + } + } + } return insn; } @@ -912,10 +1422,7 @@ static const struct arc_operand_value *lookup_register (int type, long regno); void arc_opcode_init_extract () { - flag_p = 0; - flagshimm_handled_p = 0; - shimm_p = 0; - limm_p = 0; + arc_opcode_init_insert(); } /* As we're extracting registers, keep an eye out for the 'f' indicator @@ -931,42 +1438,72 @@ extract_reg (insn, operand, mods, opval, invalid) const struct arc_operand *operand; int mods; const struct arc_operand_value **opval; - int *invalid; + int *invalid ATTRIBUTE_UNUSED; { int regno; long value; + enum operand op_type; /* Get the register number. */ - regno = (insn[0] >> operand->shift) & ((1 << operand->bits) - 1); + regno = (*insn >> operand->shift) & ((1 << operand->bits) - 1); /* Is it a constant marker? */ if (regno == ARC_REG_SHIMM) { - value = insn[0] & 511; - if ((operand->flags & ARC_OPERAND_SIGNED) - && (value & 256)) - value -= 512; - flagshimm_handled_p = 1; + op_type = OP_SHIMM; + /* always return zero if dest is a shimm mlm. */ + + if ('a' != operand->fmt) + { + value = *insn & 511; + if ((operand->flags & ARC_OPERAND_SIGNED) + && (value & 256)) + value -= 512; + if (!flagshimm_handled_p) + flag_p = 0; + flagshimm_handled_p = 1; + } + else + { + value = 0; + } } else if (regno == ARC_REG_SHIMM_UPDATE) { - value = insn[0] & 511; - if ((operand->flags & ARC_OPERAND_SIGNED) - && (value & 256)) - value -= 512; + op_type = OP_SHIMM; + + /* always return zero if dest is a shimm mlm. */ + + if ('a' != operand->fmt) + { + value = *insn & 511; + if ((operand->flags & ARC_OPERAND_SIGNED) && (value & 256)) + value -= 512; + } + else + { + value = 0; + } flag_p = 1; flagshimm_handled_p = 1; } else if (regno == ARC_REG_LIMM) { + op_type = OP_LIMM; value = insn[1]; limm_p = 1; + /* if this is a jump instruction (j,jl), show new pc correctly. */ + if (0x07 == ((*insn & I(-1)) >> 27)) + { + value = (value & 0xffffff); + } } /* It's a register, set OPVAL (that's the only way we distinguish registers from constants here). */ else { const struct arc_operand_value *reg = lookup_register (REG, regno); + op_type = OP_REG; if (reg == NULL) abort (); @@ -986,6 +1523,24 @@ extract_reg (insn, operand, mods, opval, invalid) if (reg != NULL && opval != NULL) *opval = reg; } + switch(operand->fmt) + { + case 'a': + ls_operand[LS_DEST] = op_type; + break; + case 's': + ls_operand[LS_BASE] = op_type; + break; + case 'c': + if ((insn[0]& I(-1)) == I(2)) + ls_operand[LS_VALUE] = op_type; + else + ls_operand[LS_OFFSET] = op_type; + break; + case 'o': case 'O': + ls_operand[LS_OFFSET] = op_type; + break; + } return value; } @@ -997,9 +1552,9 @@ static long extract_flag (insn, operand, mods, opval, invalid) arc_insn *insn; const struct arc_operand *operand; - int mods; + int mods ATTRIBUTE_UNUSED; const struct arc_operand_value **opval; - int *invalid; + int *invalid ATTRIBUTE_UNUSED; { int f; const struct arc_operand_value *val; @@ -1007,12 +1562,12 @@ extract_flag (insn, operand, mods, opval, invalid) if (flagshimm_handled_p) f = flag_p != 0; else - f = (insn[0] & (1 << operand->shift)) != 0; + f = (*insn & (1 << operand->shift)) != 0; /* There is no text for zero values. */ if (f == 0) return 0; - + flag_p = 1; val = arc_opcode_lookup_suffix (operand, 1); if (opval != NULL && val != NULL) *opval = val; @@ -1028,9 +1583,9 @@ static long extract_cond (insn, operand, mods, opval, invalid) arc_insn *insn; const struct arc_operand *operand; - int mods; + int mods ATTRIBUTE_UNUSED; const struct arc_operand_value **opval; - int *invalid; + int *invalid ATTRIBUTE_UNUSED; { long cond; const struct arc_operand_value *val; @@ -1038,7 +1593,7 @@ extract_cond (insn, operand, mods, opval, invalid) if (flagshimm_handled_p) return 0; - cond = (insn[0] >> operand->shift) & ((1 << operand->bits) - 1); + cond = (*insn >> operand->shift) & ((1 << operand->bits) - 1); val = arc_opcode_lookup_suffix (operand, cond); /* Ignore NULL values of `val'. Several condition code values are @@ -1055,20 +1610,88 @@ static long extract_reladdr (insn, operand, mods, opval, invalid) arc_insn *insn; const struct arc_operand *operand; - int mods; - const struct arc_operand_value **opval; - int *invalid; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value **opval ATTRIBUTE_UNUSED; + int *invalid ATTRIBUTE_UNUSED; { long addr; - addr = (insn[0] >> operand->shift) & ((1 << operand->bits) - 1); + addr = (*insn >> operand->shift) & ((1 << operand->bits) - 1); if ((operand->flags & ARC_OPERAND_SIGNED) && (addr & (1 << (operand->bits - 1)))) addr -= 1 << operand->bits; - return addr << 2; } +/* extract the flags bits from a j or jl long immediate. */ +static long +extract_jumpflags(insn, operand, mods, opval, invalid) + arc_insn *insn; + const struct arc_operand *operand; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value **opval ATTRIBUTE_UNUSED; + int *invalid; +{ + if (!flag_p || !limm_p) + *invalid = 1; + return ((flag_p && limm_p) + ? (insn[1] >> operand->shift) & ((1 << operand->bits) -1): 0); +} + +/* extract st insn's offset. */ + +static long +extract_st_offset (insn, operand, mods, opval, invalid) + arc_insn *insn; + const struct arc_operand *operand; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value **opval ATTRIBUTE_UNUSED; + int *invalid; +{ + int value = 0; + + if (ls_operand[LS_VALUE] != OP_SHIMM || ls_operand[LS_BASE] != OP_LIMM) + { + value = insn[0] & 511; + if ((operand->flags & ARC_OPERAND_SIGNED) && (value & 256)) + value -= 512; + if (value) + ls_operand[LS_OFFSET] = OP_SHIMM; + } + else + { + *invalid = 1; + } + return(value); +} + +/* extract ld insn's offset. */ + +static long +extract_ld_offset (insn, operand, mods, opval, invalid) + arc_insn *insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value **opval; + int *invalid; +{ + int test = insn[0] & I(-1); + int value; + + if (test) + { + value = insn[0] & 511; + if ((operand->flags & ARC_OPERAND_SIGNED) && (value & 256)) + value -= 512; + if (value) + ls_operand[LS_OFFSET] = OP_SHIMM; + return(value); + } + /* if it isn't in the insn, it's concealed behind reg 'c'. */ + return extract_reg (insn, &arc_operands[arc_operand_map['c']], + mods, opval, invalid); +} + /* The only thing this does is set the `invalid' flag if B != C. This is needed because the "mov" macro appears before it's real insn "and" and we don't want the disassembler to confuse them. */ @@ -1076,19 +1699,18 @@ extract_reladdr (insn, operand, mods, opval, invalid) static long extract_unopmacro (insn, operand, mods, opval, invalid) arc_insn *insn; - const struct arc_operand *operand; - int mods; - const struct arc_operand_value **opval; + const struct arc_operand *operand ATTRIBUTE_UNUSED; + int mods ATTRIBUTE_UNUSED; + const struct arc_operand_value **opval ATTRIBUTE_UNUSED; int *invalid; { /* This misses the case where B == ARC_REG_SHIMM_UPDATE && C == ARC_REG_SHIMM (or vice versa). No big deal. Those insns will get printed as "and"s. */ - if (((insn[0] >> ARC_SHIFT_REGB) & ARC_MASK_REG) - != ((insn[0] >> ARC_SHIFT_REGC) & ARC_MASK_REG)) + if (((*insn >> ARC_SHIFT_REGB) & ARC_MASK_REG) + != ((*insn >> ARC_SHIFT_REGC) & ARC_MASK_REG)) if (invalid != NULL) *invalid = 1; - return 0; } @@ -1101,6 +1723,15 @@ arc_opcode_lookup_suffix (type, value) int value; { register const struct arc_operand_value *v,*end; + struct arc_ext_operand_value *ext_oper = arc_ext_operands; + + while (ext_oper) + { + if (type == &arc_operands[ext_oper->operand.type] + && value == ext_oper->operand.value) + return (&ext_oper->operand); + ext_oper = ext_oper->next; + } /* ??? This is a little slow and can be speeded up. */ @@ -1117,6 +1748,14 @@ lookup_register (type, regno) long regno; { register const struct arc_operand_value *r,*end; + struct arc_ext_operand_value *ext_oper = arc_ext_operands; + + while (ext_oper) + { + if (ext_oper->operand.type == type && ext_oper->operand.value == regno) + return (&ext_oper->operand); + ext_oper = ext_oper->next; + } if (type == REG) return &arc_reg_names[regno]; @@ -1129,3 +1768,58 @@ lookup_register (type, regno) return r; return 0; } + +int +arc_insn_is_j(insn) + arc_insn insn; +{ + return (insn & (I(-1))) == I(0x7); +} + +int +arc_insn_not_jl(insn) + arc_insn insn; +{ + return ((insn & (I(-1)|A(-1)|C(-1)|R(-1,7,1)|R(-1,9,1))) + != (I(0x7) | R(-1,9,1))); +} + +int +arc_operand_type(int opertype) +{ + switch (opertype) + { + case 0: + return(COND); + break; + case 1: + return(REG); + break; + case 2: + return(AUXREG); + break; + } + return -1; +} + +struct arc_operand_value * +get_ext_suffix(s) + char *s; +{ + struct arc_ext_operand_value *suffix = arc_ext_operands; + + while (suffix) + { + if ((COND == suffix->operand.type) + && !strcmp(s,suffix->operand.name)) + return(&suffix->operand); + suffix = suffix->next; + } + return NULL; +} + +int +arc_get_noshortcut_flag() +{ + return ARC_REGISTER_NOSHORT_CUT; +} diff --git a/contrib/binutils/opcodes/cgen-asm.c b/contrib/binutils/opcodes/cgen-asm.c index 4ed69363a9db..a8d6ff8471b6 100644 --- a/contrib/binutils/opcodes/cgen-asm.c +++ b/contrib/binutils/opcodes/cgen-asm.c @@ -1,6 +1,6 @@ /* CGEN generic assembler support code. - Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. + Copyright 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. This file is part of the GNU Binutils and GDB, the GNU debugger. @@ -66,7 +66,7 @@ hash_insn_array (cd, insns, count, entsize, htable, hentbuf) CGEN_CPU_DESC cd; const CGEN_INSN *insns; int count; - int entsize; + int entsize ATTRIBUTE_UNUSED; CGEN_INSN_LIST **htable; CGEN_INSN_LIST *hentbuf; { @@ -198,7 +198,7 @@ cgen_asm_lookup_insn (cd, insn) const char * cgen_parse_keyword (cd, strp, keyword_table, valuep) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; const char **strp; CGEN_KEYWORD *keyword_table; long *valuep; diff --git a/contrib/binutils/opcodes/cgen-asm.in b/contrib/binutils/opcodes/cgen-asm.in new file mode 100644 index 000000000000..7249708ebb0d --- /dev/null +++ b/contrib/binutils/opcodes/cgen-asm.in @@ -0,0 +1,321 @@ +/* Assembler interface for targets using CGEN. -*- C -*- + CGEN: Cpu tools GENerator + +THIS FILE IS MACHINE GENERATED WITH CGEN. +- the resultant file is machine generated, cgen-asm.in isn't + +Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. + +This file is part of the GNU Binutils and GDB, the GNU debugger. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software Foundation, Inc., +59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +/* ??? Eventually more and more of this stuff can go to cpu-independent files. + Keep that in mind. */ + +#include "sysdep.h" +#include <ctype.h> +#include <stdio.h> +#include "ansidecl.h" +#include "bfd.h" +#include "symcat.h" +#include "@prefix@-desc.h" +#include "@prefix@-opc.h" +#include "opintl.h" + +#undef min +#define min(a,b) ((a) < (b) ? (a) : (b)) +#undef max +#define max(a,b) ((a) > (b) ? (a) : (b)) + +static const char * parse_insn_normal + PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *)); + +/* -- assembler routines inserted here */ + +/* Default insn parser. + + The syntax string is scanned and operands are parsed and stored in FIELDS. + Relocs are queued as we go via other callbacks. + + ??? Note that this is currently an all-or-nothing parser. If we fail to + parse the instruction, we return 0 and the caller will start over from + the beginning. Backtracking will be necessary in parsing subexpressions, + but that can be handled there. Not handling backtracking here may get + expensive in the case of the m68k. Deal with later. + + Returns NULL for success, an error message for failure. +*/ + +static const char * +parse_insn_normal (cd, insn, strp, fields) + CGEN_CPU_DESC cd; + const CGEN_INSN *insn; + const char **strp; + CGEN_FIELDS *fields; +{ + /* ??? Runtime added insns not handled yet. */ + const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); + const char *str = *strp; + const char *errmsg; + const char *p; + const CGEN_SYNTAX_CHAR_TYPE * syn; +#ifdef CGEN_MNEMONIC_OPERANDS + /* FIXME: wip */ + int past_opcode_p; +#endif + + /* For now we assume the mnemonic is first (there are no leading operands). + We can parse it without needing to set up operand parsing. + GAS's input scrubber will ensure mnemonics are lowercase, but we may + not be called from GAS. */ + p = CGEN_INSN_MNEMONIC (insn); + while (*p && tolower (*p) == tolower (*str)) + ++p, ++str; + + if (* p) + return _("unrecognized instruction"); + +#ifndef CGEN_MNEMONIC_OPERANDS + if (* str && !isspace (* str)) + return _("unrecognized instruction"); +#endif + + CGEN_INIT_PARSE (cd); + cgen_init_parse_operand (cd); +#ifdef CGEN_MNEMONIC_OPERANDS + past_opcode_p = 0; +#endif + + /* We don't check for (*str != '\0') here because we want to parse + any trailing fake arguments in the syntax string. */ + syn = CGEN_SYNTAX_STRING (syntax); + + /* Mnemonics come first for now, ensure valid string. */ + if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) + abort (); + + ++syn; + + while (* syn != 0) + { + /* Non operand chars must match exactly. */ + if (CGEN_SYNTAX_CHAR_P (* syn)) + { + /* FIXME: While we allow for non-GAS callers above, we assume the + first char after the mnemonic part is a space. */ + /* FIXME: We also take inappropriate advantage of the fact that + GAS's input scrubber will remove extraneous blanks. */ + if (tolower (*str) == tolower (CGEN_SYNTAX_CHAR (* syn))) + { +#ifdef CGEN_MNEMONIC_OPERANDS + if (CGEN_SYNTAX_CHAR(* syn) == ' ') + past_opcode_p = 1; +#endif + ++ syn; + ++ str; + } + else if (*str) + { + /* Syntax char didn't match. Can't be this insn. */ + static char msg [80]; + /* xgettext:c-format */ + sprintf (msg, _("syntax error (expected char `%c', found `%c')"), + CGEN_SYNTAX_CHAR(*syn), *str); + return msg; + } + else + { + /* Ran out of input. */ + static char msg [80]; + /* xgettext:c-format */ + sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"), + CGEN_SYNTAX_CHAR(*syn)); + return msg; + } + continue; + } + + /* We have an operand of some sort. */ + errmsg = @arch@_cgen_parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), + &str, fields); + if (errmsg) + return errmsg; + + /* Done with this operand, continue with next one. */ + ++ syn; + } + + /* If we're at the end of the syntax string, we're done. */ + if (* syn == 0) + { + /* FIXME: For the moment we assume a valid `str' can only contain + blanks now. IE: We needn't try again with a longer version of + the insn and it is assumed that longer versions of insns appear + before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ + while (isspace (* str)) + ++ str; + + if (* str != '\0') + return _("junk at end of line"); /* FIXME: would like to include `str' */ + + return NULL; + } + + /* We couldn't parse it. */ + return _("unrecognized instruction"); +} + +/* Main entry point. + This routine is called for each instruction to be assembled. + STR points to the insn to be assembled. + We assume all necessary tables have been initialized. + The assembled instruction, less any fixups, is stored in BUF. + Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value + still needs to be converted to target byte order, otherwise BUF is an array + of bytes in target byte order. + The result is a pointer to the insn's entry in the opcode table, + or NULL if an error occured (an error message will have already been + printed). + + Note that when processing (non-alias) macro-insns, + this function recurses. + + ??? It's possible to make this cpu-independent. + One would have to deal with a few minor things. + At this point in time doing so would be more of a curiosity than useful + [for example this file isn't _that_ big], but keeping the possibility in + mind helps keep the design clean. */ + +const CGEN_INSN * +@arch@_cgen_assemble_insn (cd, str, fields, buf, errmsg) + CGEN_CPU_DESC cd; + const char *str; + CGEN_FIELDS *fields; + CGEN_INSN_BYTES_PTR buf; + char **errmsg; +{ + const char *start; + CGEN_INSN_LIST *ilist; + const char *parse_errmsg = NULL; + const char *insert_errmsg = NULL; + + /* Skip leading white space. */ + while (isspace (* str)) + ++ str; + + /* The instructions are stored in hashed lists. + Get the first in the list. */ + ilist = CGEN_ASM_LOOKUP_INSN (cd, str); + + /* Keep looking until we find a match. */ + + start = str; + for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist)) + { + const CGEN_INSN *insn = ilist->insn; + +#ifdef CGEN_VALIDATE_INSN_SUPPORTED + /* not usually needed as unsupported opcodes shouldn't be in the hash lists */ + /* Is this insn supported by the selected cpu? */ + if (! @arch@_cgen_insn_supported (cd, insn)) + continue; +#endif + + /* If the RELAX attribute is set, this is an insn that shouldn't be + chosen immediately. Instead, it is used during assembler/linker + relaxation if possible. */ + if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0) + continue; + + str = start; + + /* Allow parse/insert handlers to obtain length of insn. */ + CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); + + parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields); + if (parse_errmsg != NULL) + continue; + + /* ??? 0 is passed for `pc' */ + insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, + (bfd_vma) 0); + if (insert_errmsg != NULL) + continue; + + /* It is up to the caller to actually output the insn and any + queued relocs. */ + return insn; + } + + { + static char errbuf[150]; + const char *tmp_errmsg; + +#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS + /* If requesting verbose error messages, use insert_errmsg. + Failing that, use parse_errmsg */ + tmp_errmsg = (insert_errmsg ? insert_errmsg : + parse_errmsg ? parse_errmsg : + _("unrecognized instruction")); + + if (strlen (start) > 50) + /* xgettext:c-format */ + sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); + else + /* xgettext:c-format */ + sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); +#else + if (strlen (start) > 50) + /* xgettext:c-format */ + sprintf (errbuf, _("bad instruction `%.50s...'"), start); + else + /* xgettext:c-format */ + sprintf (errbuf, _("bad instruction `%.50s'"), start); +#endif + + *errmsg = errbuf; + return NULL; + } +} + +#if 0 /* This calls back to GAS which we can't do without care. */ + +/* Record each member of OPVALS in the assembler's symbol table. + This lets GAS parse registers for us. + ??? Interesting idea but not currently used. */ + +/* Record each member of OPVALS in the assembler's symbol table. + FIXME: Not currently used. */ + +void +@arch@_cgen_asm_hash_keywords (cd, opvals) + CGEN_CPU_DESC cd; + CGEN_KEYWORD *opvals; +{ + CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL); + const CGEN_KEYWORD_ENTRY * ke; + + while ((ke = cgen_keyword_search_next (& search)) != NULL) + { +#if 0 /* Unnecessary, should be done in the search routine. */ + if (! @arch@_cgen_opval_supported (ke)) + continue; +#endif + cgen_asm_record_register (cd, ke->name, ke->value); + } +} + +#endif /* 0 */ diff --git a/contrib/binutils/opcodes/cgen-dis.c b/contrib/binutils/opcodes/cgen-dis.c index 78b1cd90ed91..b4297bb44d7e 100644 --- a/contrib/binutils/opcodes/cgen-dis.c +++ b/contrib/binutils/opcodes/cgen-dis.c @@ -1,6 +1,7 @@ /* CGEN generic disassembler support code. - Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. + Copyright 1996, 1997, 1998, 1999, 2000, 2001 + Free Software Foundation, Inc. This file is part of the GNU Binutils and GDB, the GNU debugger. @@ -43,7 +44,7 @@ hash_insn_array (cd, insns, count, entsize, htable, hentbuf) CGEN_CPU_DESC cd; const CGEN_INSN * insns; int count; - int entsize; + int entsize ATTRIBUTE_UNUSED; CGEN_INSN_LIST ** htable; CGEN_INSN_LIST * hentbuf; { @@ -64,27 +65,10 @@ hash_insn_array (cd, insns, count, entsize, htable, hentbuf) to hash on, so set both up. */ value = CGEN_INSN_BASE_VALUE (insn); - switch (CGEN_INSN_MASK_BITSIZE (insn)) - { - case 8: - buf[0] = value; - break; - case 16: - if (big_p) - bfd_putb16 ((bfd_vma) value, buf); - else - bfd_putl16 ((bfd_vma) value, buf); - break; - case 32: - if (big_p) - bfd_putb32 ((bfd_vma) value, buf); - else - bfd_putl32 ((bfd_vma) value, buf); - break; - default: - abort (); - } - + bfd_put_bits ((bfd_vma) value, + buf, + CGEN_INSN_MASK_BITSIZE (insn), + big_p); hash = (* cd->dis_hash) (buf, value); hentbuf->next = htable[hash]; hentbuf->insn = insn; @@ -121,27 +105,10 @@ hash_insn_list (cd, insns, htable, hentbuf) to hash on, so set both up. */ value = CGEN_INSN_BASE_VALUE (ilist->insn); - switch (CGEN_INSN_MASK_BITSIZE (ilist->insn)) - { - case 8: - buf[0] = value; - break; - case 16: - if (big_p) - bfd_putb16 ((bfd_vma) value, buf); - else - bfd_putl16 ((bfd_vma) value, buf); - break; - case 32: - if (big_p) - bfd_putb32 ((bfd_vma) value, buf); - else - bfd_putl32 ((bfd_vma) value, buf); - break; - default: - abort (); - } - + bfd_put_bits((bfd_vma) value, + buf, + CGEN_INSN_MASK_BITSIZE (ilist->insn), + big_p); hash = (* cd->dis_hash) (buf, value); hentbuf->next = htable [hash]; hentbuf->insn = ilist->insn; diff --git a/contrib/binutils/opcodes/cgen-dis.in b/contrib/binutils/opcodes/cgen-dis.in new file mode 100644 index 000000000000..0e7c35a5675a --- /dev/null +++ b/contrib/binutils/opcodes/cgen-dis.in @@ -0,0 +1,417 @@ +/* Disassembler interface for targets using CGEN. -*- C -*- + CGEN: Cpu tools GENerator + +THIS FILE IS MACHINE GENERATED WITH CGEN. +- the resultant file is machine generated, cgen-dis.in isn't + +Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. + +This file is part of the GNU Binutils and GDB, the GNU debugger. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software Foundation, Inc., +59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +/* ??? Eventually more and more of this stuff can go to cpu-independent files. + Keep that in mind. */ + +#include "sysdep.h" +#include <stdio.h> +#include "ansidecl.h" +#include "dis-asm.h" +#include "bfd.h" +#include "symcat.h" +#include "@prefix@-desc.h" +#include "@prefix@-opc.h" +#include "opintl.h" + +/* Default text to print if an instruction isn't recognized. */ +#define UNKNOWN_INSN_MSG _("*unknown*") + +static void print_normal + PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int)); +static void print_address + PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned int, bfd_vma, int)); +static void print_keyword + PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int)); +static void print_insn_normal + PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *, + bfd_vma, int)); +static int print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, + disassemble_info *, char *, int)); +static int default_print_insn + PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *)); + +/* -- disassembler routines inserted here */ + +/* Default print handler. */ + +static void +print_normal (cd, dis_info, value, attrs, pc, length) +#ifdef CGEN_PRINT_NORMAL + CGEN_CPU_DESC cd; +#else + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; +#endif + PTR dis_info; + long value; + unsigned int attrs; +#ifdef CGEN_PRINT_NORMAL + bfd_vma pc; + int length; +#else + bfd_vma pc ATTRIBUTE_UNUSED; + int length ATTRIBUTE_UNUSED; +#endif +{ + disassemble_info *info = (disassemble_info *) dis_info; + +#ifdef CGEN_PRINT_NORMAL + CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); +#endif + + /* Print the operand as directed by the attributes. */ + if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) + ; /* nothing to do */ + else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) + (*info->fprintf_func) (info->stream, "%ld", value); + else + (*info->fprintf_func) (info->stream, "0x%lx", value); +} + +/* Default address handler. */ + +static void +print_address (cd, dis_info, value, attrs, pc, length) +#ifdef CGEN_PRINT_NORMAL + CGEN_CPU_DESC cd; +#else + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; +#endif + PTR dis_info; + bfd_vma value; + unsigned int attrs; +#ifdef CGEN_PRINT_NORMAL + bfd_vma pc; + int length; +#else + bfd_vma pc ATTRIBUTE_UNUSED; + int length ATTRIBUTE_UNUSED; +#endif +{ + disassemble_info *info = (disassemble_info *) dis_info; + +#ifdef CGEN_PRINT_ADDRESS + CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); +#endif + + /* Print the operand as directed by the attributes. */ + if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) + ; /* nothing to do */ + else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR)) + (*info->print_address_func) (value, info); + else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR)) + (*info->print_address_func) (value, info); + else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) + (*info->fprintf_func) (info->stream, "%ld", (long) value); + else + (*info->fprintf_func) (info->stream, "0x%lx", (long) value); +} + +/* Keyword print handler. */ + +static void +print_keyword (cd, dis_info, keyword_table, value, attrs) + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; + PTR dis_info; + CGEN_KEYWORD *keyword_table; + long value; + unsigned int attrs ATTRIBUTE_UNUSED; +{ + disassemble_info *info = (disassemble_info *) dis_info; + const CGEN_KEYWORD_ENTRY *ke; + + ke = cgen_keyword_lookup_value (keyword_table, value); + if (ke != NULL) + (*info->fprintf_func) (info->stream, "%s", ke->name); + else + (*info->fprintf_func) (info->stream, "???"); +} + +/* Default insn printer. + + DIS_INFO is defined as `PTR' so the disassembler needn't know anything + about disassemble_info. */ + +static void +print_insn_normal (cd, dis_info, insn, fields, pc, length) + CGEN_CPU_DESC cd; + PTR dis_info; + const CGEN_INSN *insn; + CGEN_FIELDS *fields; + bfd_vma pc; + int length; +{ + const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); + disassemble_info *info = (disassemble_info *) dis_info; + const CGEN_SYNTAX_CHAR_TYPE *syn; + + CGEN_INIT_PRINT (cd); + + for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) + { + if (CGEN_SYNTAX_MNEMONIC_P (*syn)) + { + (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn)); + continue; + } + if (CGEN_SYNTAX_CHAR_P (*syn)) + { + (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn)); + continue; + } + + /* We have an operand. */ + @arch@_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info, + fields, CGEN_INSN_ATTRS (insn), pc, length); + } +} + +/* Subroutine of print_insn. Reads an insn into the given buffers and updates + the extract info. + Returns 0 if all is well, non-zero otherwise. */ +static int +read_insn (cd, pc, info, buf, buflen, ex_info, insn_value) + CGEN_CPU_DESC cd; + bfd_vma pc; + disassemble_info *info; + char *buf; + int buflen; + CGEN_EXTRACT_INFO *ex_info; + unsigned long *insn_value; +{ + int status = (*info->read_memory_func) (pc, buf, buflen, info); + if (status != 0) + { + (*info->memory_error_func) (status, pc, info); + return -1; + } + + ex_info->dis_info = info; + ex_info->valid = (1 << buflen) - 1; + ex_info->insn_bytes = buf; + + *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG); + return 0; +} + +/* Utility to print an insn. + BUF is the base part of the insn, target byte order, BUFLEN bytes long. + The result is the size of the insn in bytes or zero for an unknown insn + or -1 if an error occurs fetching data (memory_error_func will have + been called). */ + +static int +print_insn (cd, pc, info, buf, buflen) + CGEN_CPU_DESC cd; + bfd_vma pc; + disassemble_info *info; + char *buf; + int buflen; +{ + unsigned long insn_value; + const CGEN_INSN_LIST *insn_list; + CGEN_EXTRACT_INFO ex_info; + + int rc = read_insn (cd, pc, info, buf, buflen, & ex_info, & insn_value); + if (rc != 0) + return rc; + + /* The instructions are stored in hash lists. + Pick the first one and keep trying until we find the right one. */ + + insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value); + while (insn_list != NULL) + { + const CGEN_INSN *insn = insn_list->insn; + CGEN_FIELDS fields; + int length; + +#ifdef CGEN_VALIDATE_INSN_SUPPORTED + /* not needed as insn shouldn't be in hash lists if not supported */ + /* Supported by this cpu? */ + if (! @arch@_cgen_insn_supported (cd, insn)) + { + insn_list = CGEN_DIS_NEXT_INSN (insn_list); + continue; + } +#endif + + /* Basic bit mask must be correct. */ + /* ??? May wish to allow target to defer this check until the extract + handler. */ + if ((insn_value & CGEN_INSN_BASE_MASK (insn)) + == CGEN_INSN_BASE_VALUE (insn)) + { + /* Printing is handled in two passes. The first pass parses the + machine insn and extracts the fields. The second pass prints + them. */ + + /* Make sure the entire insn is loaded into insn_value, if it + can fit. */ + if (CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize && + (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) + { + unsigned long full_insn_value; + int rc = read_insn (cd, pc, info, buf, + CGEN_INSN_BITSIZE (insn) / 8, + & ex_info, & full_insn_value); + if (rc != 0) + return rc; + length = CGEN_EXTRACT_FN (cd, insn) + (cd, insn, &ex_info, full_insn_value, &fields, pc); + } + else + length = CGEN_EXTRACT_FN (cd, insn) + (cd, insn, &ex_info, insn_value, &fields, pc); + + /* length < 0 -> error */ + if (length < 0) + return length; + if (length > 0) + { + CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length); + /* length is in bits, result is in bytes */ + return length / 8; + } + } + + insn_list = CGEN_DIS_NEXT_INSN (insn_list); + } + + return 0; +} + +/* Default value for CGEN_PRINT_INSN. + The result is the size of the insn in bytes or zero for an unknown insn + or -1 if an error occured fetching bytes. */ + +#ifndef CGEN_PRINT_INSN +#define CGEN_PRINT_INSN default_print_insn +#endif + +static int +default_print_insn (cd, pc, info) + CGEN_CPU_DESC cd; + bfd_vma pc; + disassemble_info *info; +{ + char buf[CGEN_MAX_INSN_SIZE]; + int status; + + /* Read the base part of the insn. */ + + status = (*info->read_memory_func) (pc, buf, cd->base_insn_bitsize / 8, info); + if (status != 0) + { + (*info->memory_error_func) (status, pc, info); + return -1; + } + + return print_insn (cd, pc, info, buf, cd->base_insn_bitsize / 8); +} + +/* Main entry point. + Print one instruction from PC on INFO->STREAM. + Return the size of the instruction (in bytes). */ + +int +print_insn_@arch@ (pc, info) + bfd_vma pc; + disassemble_info *info; +{ + static CGEN_CPU_DESC cd = 0; + static int prev_isa; + static int prev_mach; + static int prev_endian; + int length; + int isa,mach; + int endian = (info->endian == BFD_ENDIAN_BIG + ? CGEN_ENDIAN_BIG + : CGEN_ENDIAN_LITTLE); + enum bfd_architecture arch; + + /* ??? gdb will set mach but leave the architecture as "unknown" */ +#ifndef CGEN_BFD_ARCH +#define CGEN_BFD_ARCH bfd_arch_@arch@ +#endif + arch = info->arch; + if (arch == bfd_arch_unknown) + arch = CGEN_BFD_ARCH; + + /* There's no standard way to compute the isa number (e.g. for arm thumb) + so we leave it to the target. */ +#ifdef CGEN_COMPUTE_ISA + isa = CGEN_COMPUTE_ISA (info); +#else + isa = 0; +#endif + + mach = info->mach; + + /* If we've switched cpu's, close the current table and open a new one. */ + if (cd + && (isa != prev_isa + || mach != prev_mach + || endian != prev_endian)) + { + @arch@_cgen_cpu_close (cd); + cd = 0; + } + + /* If we haven't initialized yet, initialize the opcode table. */ + if (! cd) + { + const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach); + const char *mach_name; + + if (!arch_type) + abort (); + mach_name = arch_type->printable_name; + + prev_isa = isa; + prev_mach = mach; + prev_endian = endian; + cd = @arch@_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, + CGEN_CPU_OPEN_BFDMACH, mach_name, + CGEN_CPU_OPEN_ENDIAN, prev_endian, + CGEN_CPU_OPEN_END); + if (!cd) + abort (); + @arch@_cgen_init_dis (cd); + } + + /* We try to have as much common code as possible. + But at this point some targets need to take over. */ + /* ??? Some targets may need a hook elsewhere. Try to avoid this, + but if not possible try to move this hook elsewhere rather than + have two hooks. */ + length = CGEN_PRINT_INSN (cd, pc, info); + if (length > 0) + return length; + if (length < 0) + return -1; + + (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); + return cd->default_insn_bitsize / 8; +} diff --git a/contrib/binutils/opcodes/cgen-ibld.in b/contrib/binutils/opcodes/cgen-ibld.in new file mode 100644 index 000000000000..6921a53dac99 --- /dev/null +++ b/contrib/binutils/opcodes/cgen-ibld.in @@ -0,0 +1,514 @@ +/* Instruction building/extraction support for @arch@. -*- C -*- + +THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. +- the resultant file is machine generated, cgen-ibld.in isn't + +Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. + +This file is part of the GNU Binutils and GDB, the GNU debugger. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software Foundation, Inc., +59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +/* ??? Eventually more and more of this stuff can go to cpu-independent files. + Keep that in mind. */ + +#include "sysdep.h" +#include <ctype.h> +#include <stdio.h> +#include "ansidecl.h" +#include "dis-asm.h" +#include "bfd.h" +#include "symcat.h" +#include "@prefix@-desc.h" +#include "@prefix@-opc.h" +#include "opintl.h" + +#undef min +#define min(a,b) ((a) < (b) ? (a) : (b)) +#undef max +#define max(a,b) ((a) > (b) ? (a) : (b)) + +/* Used by the ifield rtx function. */ +#define FLD(f) (fields->f) + +static const char * insert_normal + PARAMS ((CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, + unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR)); +static const char * insert_insn_normal + PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, + CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma)); + +static int extract_normal + PARAMS ((CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, + unsigned int, unsigned int, unsigned int, unsigned int, + unsigned int, unsigned int, bfd_vma, long *)); +static int extract_insn_normal + PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, + CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma)); +static void put_insn_int_value + PARAMS ((CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT)); + + +/* Operand insertion. */ + +#if ! CGEN_INT_INSN_P + +/* Subroutine of insert_normal. */ + +static CGEN_INLINE void +insert_1 (cd, value, start, length, word_length, bufp) + CGEN_CPU_DESC cd; + unsigned long value; + int start,length,word_length; + unsigned char *bufp; +{ + unsigned long x,mask; + int shift; + int big_p = CGEN_CPU_INSN_ENDIAN (cd) == CGEN_ENDIAN_BIG; + + x = bfd_get_bits (bufp, word_length, big_p); + + /* Written this way to avoid undefined behaviour. */ + mask = (((1L << (length - 1)) - 1) << 1) | 1; + if (CGEN_INSN_LSB0_P) + shift = (start + 1) - length; + else + shift = (word_length - (start + length)); + x = (x & ~(mask << shift)) | ((value & mask) << shift); + + bfd_put_bits ((bfd_vma) x, bufp, word_length, big_p); +} + +#endif /* ! CGEN_INT_INSN_P */ + +/* Default insertion routine. + + ATTRS is a mask of the boolean attributes. + WORD_OFFSET is the offset in bits from the start of the insn of the value. + WORD_LENGTH is the length of the word in bits in which the value resides. + START is the starting bit number in the word, architecture origin. + LENGTH is the length of VALUE in bits. + TOTAL_LENGTH is the total length of the insn in bits. + + The result is an error message or NULL if success. */ + +/* ??? This duplicates functionality with bfd's howto table and + bfd_install_relocation. */ +/* ??? This doesn't handle bfd_vma's. Create another function when + necessary. */ + +static const char * +insert_normal (cd, value, attrs, word_offset, start, length, word_length, + total_length, buffer) + CGEN_CPU_DESC cd; + long value; + unsigned int attrs; + unsigned int word_offset, start, length, word_length, total_length; + CGEN_INSN_BYTES_PTR buffer; +{ + static char errbuf[100]; + /* Written this way to avoid undefined behaviour. */ + unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1; + + /* If LENGTH is zero, this operand doesn't contribute to the value. */ + if (length == 0) + return NULL; + +#if 0 + if (CGEN_INT_INSN_P + && word_offset != 0) + abort (); +#endif + + if (word_length > 32) + abort (); + + /* For architectures with insns smaller than the base-insn-bitsize, + word_length may be too big. */ + if (cd->min_insn_bitsize < cd->base_insn_bitsize) + { + if (word_offset == 0 + && word_length > total_length) + word_length = total_length; + } + + /* Ensure VALUE will fit. */ + if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) + { + unsigned long maxval = mask; + + if ((unsigned long) value > maxval) + { + /* xgettext:c-format */ + sprintf (errbuf, + _("operand out of range (%lu not between 0 and %lu)"), + value, maxval); + return errbuf; + } + } + else + { + if (! cgen_signed_overflow_ok_p (cd)) + { + long minval = - (1L << (length - 1)); + long maxval = (1L << (length - 1)) - 1; + + if (value < minval || value > maxval) + { + sprintf + /* xgettext:c-format */ + (errbuf, _("operand out of range (%ld not between %ld and %ld)"), + value, minval, maxval); + return errbuf; + } + } + } + +#if CGEN_INT_INSN_P + + { + int shift; + + if (CGEN_INSN_LSB0_P) + shift = (word_offset + start + 1) - length; + else + shift = total_length - (word_offset + start + length); + *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); + } + +#else /* ! CGEN_INT_INSN_P */ + + { + unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; + + insert_1 (cd, value, start, length, word_length, bufp); + } + +#endif /* ! CGEN_INT_INSN_P */ + + return NULL; +} + +/* Default insn builder (insert handler). + The instruction is recorded in CGEN_INT_INSN_P byte order + (meaning that if CGEN_INT_INSN_P BUFFER is an int * and thus the value is + recorded in host byte order, otherwise BUFFER is an array of bytes and the + value is recorded in target byte order). + The result is an error message or NULL if success. */ + +static const char * +insert_insn_normal (cd, insn, fields, buffer, pc) + CGEN_CPU_DESC cd; + const CGEN_INSN * insn; + CGEN_FIELDS * fields; + CGEN_INSN_BYTES_PTR buffer; + bfd_vma pc; +{ + const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); + unsigned long value; + const CGEN_SYNTAX_CHAR_TYPE * syn; + + CGEN_INIT_INSERT (cd); + value = CGEN_INSN_BASE_VALUE (insn); + + /* If we're recording insns as numbers (rather than a string of bytes), + target byte order handling is deferred until later. */ + +#if CGEN_INT_INSN_P + + put_insn_int_value (cd, buffer, cd->base_insn_bitsize, + CGEN_FIELDS_BITSIZE (fields), value); + +#else + + cgen_put_insn_value (cd, buffer, min (cd->base_insn_bitsize, + CGEN_FIELDS_BITSIZE (fields)), + value); + +#endif /* ! CGEN_INT_INSN_P */ + + /* ??? It would be better to scan the format's fields. + Still need to be able to insert a value based on the operand though; + e.g. storing a branch displacement that got resolved later. + Needs more thought first. */ + + for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) + { + const char *errmsg; + + if (CGEN_SYNTAX_CHAR_P (* syn)) + continue; + + errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), + fields, buffer, pc); + if (errmsg) + return errmsg; + } + + return NULL; +} + +/* Cover function to store an insn value into an integral insn. Must go here + because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ + +static void +put_insn_int_value (cd, buf, length, insn_length, value) + CGEN_CPU_DESC cd; + CGEN_INSN_BYTES_PTR buf; + int length; + int insn_length; + CGEN_INSN_INT value; +{ + /* For architectures with insns smaller than the base-insn-bitsize, + length may be too big. */ + if (length > insn_length) + *buf = value; + else + { + int shift = insn_length - length; + /* Written this way to avoid undefined behaviour. */ + CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1; + *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); + } +} + +/* Operand extraction. */ + +#if ! CGEN_INT_INSN_P + +/* Subroutine of extract_normal. + Ensure sufficient bytes are cached in EX_INFO. + OFFSET is the offset in bytes from the start of the insn of the value. + BYTES is the length of the needed value. + Returns 1 for success, 0 for failure. */ + +static CGEN_INLINE int +fill_cache (cd, ex_info, offset, bytes, pc) + CGEN_CPU_DESC cd; + CGEN_EXTRACT_INFO *ex_info; + int offset, bytes; + bfd_vma pc; +{ + /* It's doubtful that the middle part has already been fetched so + we don't optimize that case. kiss. */ + int mask; + disassemble_info *info = (disassemble_info *) ex_info->dis_info; + + /* First do a quick check. */ + mask = (1 << bytes) - 1; + if (((ex_info->valid >> offset) & mask) == mask) + return 1; + + /* Search for the first byte we need to read. */ + for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) + if (! (mask & ex_info->valid)) + break; + + if (bytes) + { + int status; + + pc += offset; + status = (*info->read_memory_func) + (pc, ex_info->insn_bytes + offset, bytes, info); + + if (status != 0) + { + (*info->memory_error_func) (status, pc, info); + return 0; + } + + ex_info->valid |= ((1 << bytes) - 1) << offset; + } + + return 1; +} + +/* Subroutine of extract_normal. */ + +static CGEN_INLINE long +extract_1 (cd, ex_info, start, length, word_length, bufp, pc) + CGEN_CPU_DESC cd; + CGEN_EXTRACT_INFO *ex_info; + int start,length,word_length; + unsigned char *bufp; + bfd_vma pc; +{ + unsigned long x; + int shift; + int big_p = CGEN_CPU_INSN_ENDIAN (cd) == CGEN_ENDIAN_BIG; + + x = bfd_get_bits (bufp, word_length, big_p); + + if (CGEN_INSN_LSB0_P) + shift = (start + 1) - length; + else + shift = (word_length - (start + length)); + return x >> shift; +} + +#endif /* ! CGEN_INT_INSN_P */ + +/* Default extraction routine. + + INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, + or sometimes less for cases like the m32r where the base insn size is 32 + but some insns are 16 bits. + ATTRS is a mask of the boolean attributes. We only need `SIGNED', + but for generality we take a bitmask of all of them. + WORD_OFFSET is the offset in bits from the start of the insn of the value. + WORD_LENGTH is the length of the word in bits in which the value resides. + START is the starting bit number in the word, architecture origin. + LENGTH is the length of VALUE in bits. + TOTAL_LENGTH is the total length of the insn in bits. + + Returns 1 for success, 0 for failure. */ + +/* ??? The return code isn't properly used. wip. */ + +/* ??? This doesn't handle bfd_vma's. Create another function when + necessary. */ + +static int +extract_normal (cd, ex_info, insn_value, attrs, word_offset, start, length, + word_length, total_length, pc, valuep) + CGEN_CPU_DESC cd; +#if ! CGEN_INT_INSN_P + CGEN_EXTRACT_INFO *ex_info; +#else + CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED; +#endif + CGEN_INSN_INT insn_value; + unsigned int attrs; + unsigned int word_offset, start, length, word_length, total_length; +#if ! CGEN_INT_INSN_P + bfd_vma pc; +#else + bfd_vma pc ATTRIBUTE_UNUSED; +#endif + long *valuep; +{ + CGEN_INSN_INT value, mask; + + /* If LENGTH is zero, this operand doesn't contribute to the value + so give it a standard value of zero. */ + if (length == 0) + { + *valuep = 0; + return 1; + } + +#if 0 + if (CGEN_INT_INSN_P + && word_offset != 0) + abort (); +#endif + + if (word_length > 32) + abort (); + + /* For architectures with insns smaller than the insn-base-bitsize, + word_length may be too big. */ + if (cd->min_insn_bitsize < cd->base_insn_bitsize) + { + if (word_offset == 0 + && word_length > total_length) + word_length = total_length; + } + + /* Does the value reside in INSN_VALUE? */ + + if (CGEN_INT_INSN_P || word_offset == 0) + { + if (CGEN_INSN_LSB0_P) + value = insn_value >> ((word_offset + start + 1) - length); + else + value = insn_value >> (total_length - ( word_offset + start + length)); + } + +#if ! CGEN_INT_INSN_P + + else + { + unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; + + if (word_length > 32) + abort (); + + if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) + return 0; + + value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); + } + +#endif /* ! CGEN_INT_INSN_P */ + + /* Written this way to avoid undefined behaviour. */ + mask = (((1L << (length - 1)) - 1) << 1) | 1; + + value &= mask; + /* sign extend? */ + if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) + && (value & (1L << (length - 1)))) + value |= ~mask; + + *valuep = value; + + return 1; +} + +/* Default insn extractor. + + INSN_VALUE is the first base_insn_bitsize bits, translated to host order. + The extracted fields are stored in FIELDS. + EX_INFO is used to handle reading variable length insns. + Return the length of the insn in bits, or 0 if no match, + or -1 if an error occurs fetching data (memory_error_func will have + been called). */ + +static int +extract_insn_normal (cd, insn, ex_info, insn_value, fields, pc) + CGEN_CPU_DESC cd; + const CGEN_INSN *insn; + CGEN_EXTRACT_INFO *ex_info; + CGEN_INSN_INT insn_value; + CGEN_FIELDS *fields; + bfd_vma pc; +{ + const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); + const CGEN_SYNTAX_CHAR_TYPE *syn; + + CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); + + CGEN_INIT_EXTRACT (cd); + + for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) + { + int length; + + if (CGEN_SYNTAX_CHAR_P (*syn)) + continue; + + length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), + ex_info, insn_value, fields, pc); + if (length <= 0) + return length; + } + + /* We recognized and successfully extracted this insn. */ + return CGEN_INSN_BITSIZE (insn); +} + +/* machine generated code added here */ diff --git a/contrib/binutils/opcodes/cgen-opc.c b/contrib/binutils/opcodes/cgen-opc.c index ede3adde1153..e55482cfa04c 100644 --- a/contrib/binutils/opcodes/cgen-opc.c +++ b/contrib/binutils/opcodes/cgen-opc.c @@ -1,6 +1,7 @@ /* CGEN generic opcode support. - Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. + Copyright 1996, 1997, 1998, 1999, 2000, 2001 + Free Software Foundation, Inc. This file is part of the GNU Binutils and GDB, the GNU debugger. @@ -27,6 +28,10 @@ #include "symcat.h" #include "opcode/cgen.h" +#ifdef HAVE_ALLOCA_H +#include <alloca.h> +#endif + static unsigned int hash_keyword_name PARAMS ((const CGEN_KEYWORD *, const char *, int)); static unsigned int hash_keyword_value @@ -263,7 +268,7 @@ cgen_hw_lookup_by_name (cd, name) CGEN_CPU_DESC cd; const char *name; { - int i; + unsigned int i; const CGEN_HW_ENTRY **hw = cd->hw_table.entries; for (i = 0; i < cd->hw_table.num_entries; ++i) @@ -281,9 +286,9 @@ cgen_hw_lookup_by_name (cd, name) const CGEN_HW_ENTRY * cgen_hw_lookup_by_num (cd, hwnum) CGEN_CPU_DESC cd; - int hwnum; + unsigned int hwnum; { - int i; + unsigned int i; const CGEN_HW_ENTRY **hw = cd->hw_table.entries; /* ??? This can be speeded up. */ @@ -305,7 +310,7 @@ cgen_operand_lookup_by_name (cd, name) CGEN_CPU_DESC cd; const char *name; { - int i; + unsigned int i; const CGEN_OPERAND **op = cd->operand_table.entries; for (i = 0; i < cd->operand_table.num_entries; ++i) @@ -370,30 +375,7 @@ cgen_get_insn_value (cd, buf, length) unsigned char *buf; int length; { - CGEN_INSN_INT value; - - switch (length) - { - case 8: - value = *buf; - break; - case 16: - if (cd->insn_endian == CGEN_ENDIAN_BIG) - value = bfd_getb16 (buf); - else - value = bfd_getl16 (buf); - break; - case 32: - if (cd->insn_endian == CGEN_ENDIAN_BIG) - value = bfd_getb32 (buf); - else - value = bfd_getl32 (buf); - break; - default: - abort (); - } - - return value; + bfd_get_bits (buf, length, cd->insn_endian == CGEN_ENDIAN_BIG); } /* Cover function to store an insn value properly byteswapped. */ @@ -405,26 +387,8 @@ cgen_put_insn_value (cd, buf, length, value) int length; CGEN_INSN_INT value; { - switch (length) - { - case 8: - buf[0] = value; - break; - case 16: - if (cd->insn_endian == CGEN_ENDIAN_BIG) - bfd_putb16 (value, buf); - else - bfd_putl16 (value, buf); - break; - case 32: - if (cd->insn_endian == CGEN_ENDIAN_BIG) - bfd_putb32 (value, buf); - else - bfd_putl32 (value, buf); - break; - default: - abort (); - } + bfd_put_bits ((bfd_vma) value, buf, length, + cd->insn_endian == CGEN_ENDIAN_BIG); } /* Look up instruction INSN_*_VALUE and extract its fields. diff --git a/contrib/binutils/opcodes/cgen.sh b/contrib/binutils/opcodes/cgen.sh new file mode 100644 index 000000000000..a9483bdb972f --- /dev/null +++ b/contrib/binutils/opcodes/cgen.sh @@ -0,0 +1,154 @@ +#! /bin/sh +# CGEN generic assembler support code. +# +# Copyright 2001 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils and GDB, the GNU debugger. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License along +# with this program; if not, write to the Free Software Foundation, Inc., +# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +# +# Generate CGEN opcode files: arch-desc.[ch], arch-opc.[ch], +# arch-asm.c, arch-dis.c, arch-opinst.c, arch-ibld.[ch]. +# +# Usage: +# cgen.sh action srcdir cgen cgendir cgenflags arch prefix options +# +# ACTION is currently always "opcodes". It exists to be consistent with the +# simulator. +# OPTIONS is comma separated list of options: +# - opinst - arch-opinst.c is being made, causes semantic analysis +# +# We store the generated files in the source directory until we decide to +# ship a Scheme interpreter (or other implementation) with gdb/binutils. +# Maybe we never will. + +# We want to behave like make, any error forces us to stop. +set -e + +action=$1 +srcdir=$2 +cgen=$3 +cgendir=$4 +cgenflags=$5 +arch=$6 +prefix=$7 +options=$8 + +# List of extra files to build. +# Values: opinst (only 1 extra file at present) +extrafiles=$9 + +rootdir=${srcdir}/.. + +# $arch is $6, as passed on the command line. +# $ARCH is the same argument but in all uppercase. +# Both forms are used in this script. + +lowercase='abcdefghijklmnopqrstuvwxyz' +uppercase='ABCDEFGHIJKLMNOPQRSTUVWXYZ' +ARCH=`echo ${arch} | tr "${lowercase}" "${uppercase}"` + +extrafile_args="" +for ef in .. $extrafiles +do + case $ef in + ..) ;; + opinst) extrafile_args="-Q tmp-opinst.c1 $extrafile_args" ;; + esac +done + +case $action in +opcodes) + # Remove residual working files. + rm -f tmp-desc.h tmp-desc.h1 + rm -f tmp-desc.c tmp-desc.c1 + rm -f tmp-opc.h tmp-opc.h1 + rm -f tmp-opc.c tmp-opc.c1 + rm -f tmp-opinst.c tmp-opinst.c1 + rm -f tmp-ibld.h tmp-ibld.h1 + rm -f tmp-ibld.c tmp-ibld.in1 + rm -f tmp-asm.c tmp-asm.in1 + rm -f tmp-dis.c tmp-dis.in1 + + # Run CGEN. + ${cgen} -s ${cgendir}/cgen-opc.scm \ + -s ${cgendir} \ + ${cgenflags} \ + -f "${options}" \ + -m all \ + -a ${arch} \ + -H tmp-desc.h1 \ + -C tmp-desc.c1 \ + -O tmp-opc.h1 \ + -P tmp-opc.c1 \ + -L tmp-ibld.in1 \ + -A tmp-asm.in1 \ + -D tmp-dis.in1 \ + ${extrafile_args} + + # Customise generated files for the particular architecture. + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" < tmp-desc.h1 > tmp-desc.h + ${rootdir}/move-if-change tmp-desc.h ${srcdir}/${prefix}-desc.h + + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \ + -e "s/@prefix@/${prefix}/" < tmp-desc.c1 > tmp-desc.c + ${rootdir}/move-if-change tmp-desc.c ${srcdir}/${prefix}-desc.c + + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" < tmp-opc.h1 > tmp-opc.h + ${rootdir}/move-if-change tmp-opc.h ${srcdir}/${prefix}-opc.h + + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \ + -e "s/@prefix@/${prefix}/" < tmp-opc.c1 > tmp-opc.c + ${rootdir}/move-if-change tmp-opc.c ${srcdir}/${prefix}-opc.c + + case $extrafiles in + *opinst*) + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \ + -e "s/@prefix@/${prefix}/" < tmp-opinst.c1 >tmp-opinst.c + ${rootdir}/move-if-change tmp-opinst.c ${srcdir}/${prefix}-opinst.c + ;; + esac + + cat ${srcdir}/cgen-ibld.in tmp-ibld.in1 | \ + sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \ + -e "s/@prefix@/${prefix}/" > tmp-ibld.c + ${rootdir}/move-if-change tmp-ibld.c ${srcdir}/${prefix}-ibld.c + + sed -e "/ -- assembler routines/ r tmp-asm.in1" ${srcdir}/cgen-asm.in \ + | sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \ + -e "s/@prefix@/${prefix}/" > tmp-asm.c + ${rootdir}/move-if-change tmp-asm.c ${srcdir}/${prefix}-asm.c + + sed -e "/ -- disassembler routines/ r tmp-dis.in1" ${srcdir}/cgen-dis.in \ + | sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \ + -e "s/@prefix@/${prefix}/" > tmp-dis.c + ${rootdir}/move-if-change tmp-dis.c ${srcdir}/${prefix}-dis.c + + # Remove temporary files. + rm -f tmp-desc.h1 tmp-desc.c1 + rm -f tmp-opc.h1 tmp-opc.c1 + rm -f tmp-opinst.c1 + rm -f tmp-ibld.h1 tmp-ibld.in1 + rm -f tmp-asm.in1 tmp-dis.in1 + ;; + +*) + echo "$0: bad action: ${action}" >&2 + exit 1 + ;; + +esac + +exit 0 diff --git a/contrib/binutils/opcodes/i386-dis.c b/contrib/binutils/opcodes/i386-dis.c index 5621d8afadf7..3eb40c6df7ca 100644 --- a/contrib/binutils/opcodes/i386-dis.c +++ b/contrib/binutils/opcodes/i386-dis.c @@ -50,9 +50,53 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #endif static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *)); +static void ckprefix PARAMS ((void)); +static const char *prefix_name PARAMS ((int, int)); +static int print_insn_i386 PARAMS ((bfd_vma, disassemble_info *)); +static void dofloat PARAMS ((int)); +static void OP_ST PARAMS ((int, int)); +static void OP_STi PARAMS ((int, int)); +static int putop PARAMS ((const char *, int)); +static void oappend PARAMS ((const char *)); +static void append_seg PARAMS ((void)); +static void OP_indirE PARAMS ((int, int)); +static void print_operand_value PARAMS ((char *, int, bfd_vma)); +static void OP_E PARAMS ((int, int)); +static void OP_G PARAMS ((int, int)); +static bfd_vma get64 PARAMS ((void)); +static bfd_signed_vma get32 PARAMS ((void)); +static bfd_signed_vma get32s PARAMS ((void)); +static int get16 PARAMS ((void)); +static void set_op PARAMS ((bfd_vma, int)); +static void OP_REG PARAMS ((int, int)); +static void OP_IMREG PARAMS ((int, int)); +static void OP_I PARAMS ((int, int)); +static void OP_I64 PARAMS ((int, int)); +static void OP_sI PARAMS ((int, int)); +static void OP_J PARAMS ((int, int)); +static void OP_SEG PARAMS ((int, int)); +static void OP_DIR PARAMS ((int, int)); +static void OP_OFF PARAMS ((int, int)); +static void OP_OFF64 PARAMS ((int, int)); +static void ptr_reg PARAMS ((int, int)); +static void OP_ESreg PARAMS ((int, int)); +static void OP_DSreg PARAMS ((int, int)); +static void OP_C PARAMS ((int, int)); +static void OP_D PARAMS ((int, int)); +static void OP_T PARAMS ((int, int)); +static void OP_Rd PARAMS ((int, int)); +static void OP_MMX PARAMS ((int, int)); +static void OP_XMM PARAMS ((int, int)); +static void OP_EM PARAMS ((int, int)); +static void OP_EX PARAMS ((int, int)); +static void OP_MS PARAMS ((int, int)); +static void OP_XS PARAMS ((int, int)); +static void OP_3DNowSuffix PARAMS ((int, int)); +static void OP_SIMD_Suffix PARAMS ((int, int)); +static void SIMD_Fixup PARAMS ((int, int)); +static void BadOp PARAMS ((void)); -struct dis_private -{ +struct dis_private { /* Points to first byte not fetched. */ bfd_byte *max_fetched; bfd_byte the_buffer[MAXLEN]; @@ -112,7 +156,7 @@ static int used_prefixes; to ADDR (exclusive) are valid. Returns 1 for success, longjmps on error. */ #define FETCH_DATA(info, addr) \ - ((addr) <= ((struct dis_private *)(info->private_data))->max_fetched \ + ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \ ? 1 : fetch_data ((info), (addr))) static int @@ -121,7 +165,7 @@ fetch_data (info, addr) bfd_byte *addr; { int status; - struct dis_private *priv = (struct dis_private *)info->private_data; + struct dis_private *priv = (struct dis_private *) info->private_data; bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer); status = (*info->read_memory_func) (start, @@ -152,7 +196,7 @@ fetch_data (info, addr) #define indirEv OP_indirE, v_mode #define Ew OP_E, w_mode #define Ma OP_E, v_mode -#define M OP_E, 0 /* lea */ +#define M OP_E, 0 /* lea, lgdt, etc. */ #define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */ #define Gb OP_G, b_mode #define Gv OP_G, v_mode @@ -254,60 +298,12 @@ fetch_data (info, addr) #define loop_jcxz_flag NULL, loop_jcxz_mode /* bits in sizeflag */ -#if 0 /* leave undefined until someone adds the extra flag to objdump */ +#if 0 /* Leave undefined until someone adds the extra flag to objdump. */ #define SUFFIX_ALWAYS 4 #endif #define AFLAG 2 #define DFLAG 1 -typedef void (*op_rtn) PARAMS ((int bytemode, int sizeflag)); - -static void OP_E PARAMS ((int, int)); -static void OP_G PARAMS ((int, int)); -static void OP_I PARAMS ((int, int)); -static void OP_I64 PARAMS ((int, int)); -static void OP_OFF PARAMS ((int, int)); -static void OP_REG PARAMS ((int, int)); -static void OP_IMREG PARAMS ((int, int)); -static void OP_OFF64 PARAMS ((int, int)); -static void OP_indirE PARAMS ((int, int)); -static void OP_sI PARAMS ((int, int)); -static void OP_REG PARAMS ((int, int)); -static void OP_J PARAMS ((int, int)); -static void OP_DIR PARAMS ((int, int)); -static void OP_OFF PARAMS ((int, int)); -static void OP_ESreg PARAMS ((int, int)); -static void OP_DSreg PARAMS ((int, int)); -static void OP_SEG PARAMS ((int, int)); -static void OP_C PARAMS ((int, int)); -static void OP_D PARAMS ((int, int)); -static void OP_T PARAMS ((int, int)); -static void OP_Rd PARAMS ((int, int)); -static void OP_ST PARAMS ((int, int)); -static void OP_STi PARAMS ((int, int)); -static void OP_MMX PARAMS ((int, int)); -static void OP_XMM PARAMS ((int, int)); -static void OP_EM PARAMS ((int, int)); -static void OP_EX PARAMS ((int, int)); -static void OP_MS PARAMS ((int, int)); -static void OP_XS PARAMS ((int, int)); -static void OP_3DNowSuffix PARAMS ((int, int)); -static void OP_SIMD_Suffix PARAMS ((int, int)); -static void SIMD_Fixup PARAMS ((int, int)); - -static void append_seg PARAMS ((void)); -static void set_op PARAMS ((unsigned int op, int)); -static void putop PARAMS ((const char *template, int sizeflag)); -static void dofloat PARAMS ((int sizeflag)); -static int get16 PARAMS ((void)); -static bfd_vma get64 PARAMS ((void)); -static bfd_signed_vma get32 PARAMS ((void)); -static bfd_signed_vma get32s PARAMS ((void)); -static void ckprefix PARAMS ((void)); -static const char *prefix_name PARAMS ((int, int)); -static void ptr_reg PARAMS ((int, int)); -static void BadOp PARAMS ((void)); - #define b_mode 1 /* byte operand */ #define v_mode 2 /* operand size depends on prefixes */ #define w_mode 3 /* word operand */ @@ -363,63 +359,68 @@ static void BadOp PARAMS ((void)); #define indir_dx_reg 150 -#define USE_GROUPS 1 -#define USE_PREFIX_USER_TABLE 2 - -#define GRP1b NULL, NULL, 0, NULL, USE_GROUPS, NULL, 0 -#define GRP1S NULL, NULL, 1, NULL, USE_GROUPS, NULL, 0 -#define GRP1Ss NULL, NULL, 2, NULL, USE_GROUPS, NULL, 0 -#define GRP2b NULL, NULL, 3, NULL, USE_GROUPS, NULL, 0 -#define GRP2S NULL, NULL, 4, NULL, USE_GROUPS, NULL, 0 -#define GRP2b_one NULL, NULL, 5, NULL, USE_GROUPS, NULL, 0 -#define GRP2S_one NULL, NULL, 6, NULL, USE_GROUPS, NULL, 0 -#define GRP2b_cl NULL, NULL, 7, NULL, USE_GROUPS, NULL, 0 -#define GRP2S_cl NULL, NULL, 8, NULL, USE_GROUPS, NULL, 0 -#define GRP3b NULL, NULL, 9, NULL, USE_GROUPS, NULL, 0 -#define GRP3S NULL, NULL, 10, NULL, USE_GROUPS, NULL, 0 -#define GRP4 NULL, NULL, 11, NULL, USE_GROUPS, NULL, 0 -#define GRP5 NULL, NULL, 12, NULL, USE_GROUPS, NULL, 0 -#define GRP6 NULL, NULL, 13, NULL, USE_GROUPS, NULL, 0 -#define GRP7 NULL, NULL, 14, NULL, USE_GROUPS, NULL, 0 -#define GRP8 NULL, NULL, 15, NULL, USE_GROUPS, NULL, 0 -#define GRP9 NULL, NULL, 16, NULL, USE_GROUPS, NULL, 0 -#define GRP10 NULL, NULL, 17, NULL, USE_GROUPS, NULL, 0 -#define GRP11 NULL, NULL, 18, NULL, USE_GROUPS, NULL, 0 -#define GRP12 NULL, NULL, 19, NULL, USE_GROUPS, NULL, 0 -#define GRP13 NULL, NULL, 20, NULL, USE_GROUPS, NULL, 0 -#define GRP14 NULL, NULL, 21, NULL, USE_GROUPS, NULL, 0 -#define GRPAMD NULL, NULL, 22, NULL, USE_GROUPS, NULL, 0 - -#define PREGRP0 NULL, NULL, 0, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP1 NULL, NULL, 1, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP2 NULL, NULL, 2, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP3 NULL, NULL, 3, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP4 NULL, NULL, 4, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP5 NULL, NULL, 5, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP6 NULL, NULL, 6, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP7 NULL, NULL, 7, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP8 NULL, NULL, 8, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP9 NULL, NULL, 9, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP10 NULL, NULL, 10, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP11 NULL, NULL, 11, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP12 NULL, NULL, 12, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP13 NULL, NULL, 13, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP14 NULL, NULL, 14, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP15 NULL, NULL, 15, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP16 NULL, NULL, 16, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP17 NULL, NULL, 17, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP18 NULL, NULL, 18, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP19 NULL, NULL, 19, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP20 NULL, NULL, 20, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP21 NULL, NULL, 21, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP22 NULL, NULL, 22, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP23 NULL, NULL, 23, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP24 NULL, NULL, 24, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP25 NULL, NULL, 25, NULL, USE_PREFIX_USER_TABLE, NULL, 0 -#define PREGRP26 NULL, NULL, 26, NULL, USE_PREFIX_USER_TABLE, NULL, 0 - -#define FLOATCODE 50 -#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0 +#define FLOATCODE 1 +#define USE_GROUPS 2 +#define USE_PREFIX_USER_TABLE 3 +#define X86_64_SPECIAL 4 + +#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0 + +#define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0 +#define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0 +#define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0 +#define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0 +#define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0 +#define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0 +#define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0 +#define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0 +#define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0 +#define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0 +#define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0 +#define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0 +#define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0 +#define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0 +#define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0 +#define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0 +#define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0 +#define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0 +#define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0 +#define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0 +#define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0 +#define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0 +#define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0 + +#define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0 +#define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0 +#define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0 +#define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0 +#define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0 +#define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0 +#define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0 +#define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0 +#define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0 +#define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0 +#define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0 +#define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0 +#define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0 +#define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0 +#define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0 +#define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0 +#define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0 +#define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0 +#define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0 +#define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0 +#define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0 +#define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0 +#define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0 +#define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0 +#define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0 +#define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0 +#define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0 + +#define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0 + +typedef void (*op_rtn) PARAMS ((int bytemode, int sizeflag)); struct dis386 { const char *name; @@ -436,1145 +437,276 @@ struct dis386 { 'B' => print 'b' if suffix_always is true 'E' => print 'e' if 32-bit form of jcxz 'F' => print 'w' or 'l' depending on address size prefix (loop insns) + 'H' => print ",pt" or ",pn" branch hint 'L' => print 'l' if suffix_always is true 'N' => print 'n' if instruction has no wait "prefix" 'O' => print 'd', or 'o' 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix, or suffix_always is true print 'q' if rex prefix is present. - 'I' => print 'q' in 64bit mode and behave as 'P' otherwise 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always is true 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode) 'S' => print 'w', 'l' or 'q' if suffix_always is true - 'T' => print 'q' in 64bit mode and behave as 'I' otherwise + 'T' => print 'q' in 64bit mode and behave as 'P' otherwise + 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise 'X' => print 's', 'd' depending on data16 prefix (for XMM) 'W' => print 'b' or 'w' ("w" or "de" in intel mode) 'Y' => 'q' if instruction has an REX 64bit overwrite prefix -*/ - -static const struct dis386 dis386_att[] = { - /* 00 */ - { "addB", Eb, Gb, XX }, - { "addS", Ev, Gv, XX }, - { "addB", Gb, Eb, XX }, - { "addS", Gv, Ev, XX }, - { "addB", AL, Ib, XX }, - { "addS", eAX, Iv, XX }, - { "pushI", es, XX, XX }, - { "popI", es, XX, XX }, - /* 08 */ - { "orB", Eb, Gb, XX }, - { "orS", Ev, Gv, XX }, - { "orB", Gb, Eb, XX }, - { "orS", Gv, Ev, XX }, - { "orB", AL, Ib, XX }, - { "orS", eAX, Iv, XX }, - { "pushI", cs, XX, XX }, - { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */ - /* 10 */ - { "adcB", Eb, Gb, XX }, - { "adcS", Ev, Gv, XX }, - { "adcB", Gb, Eb, XX }, - { "adcS", Gv, Ev, XX }, - { "adcB", AL, Ib, XX }, - { "adcS", eAX, Iv, XX }, - { "pushI", ss, XX, XX }, - { "popI", ss, XX, XX }, - /* 18 */ - { "sbbB", Eb, Gb, XX }, - { "sbbS", Ev, Gv, XX }, - { "sbbB", Gb, Eb, XX }, - { "sbbS", Gv, Ev, XX }, - { "sbbB", AL, Ib, XX }, - { "sbbS", eAX, Iv, XX }, - { "pushI", ds, XX, XX }, - { "popI", ds, XX, XX }, - /* 20 */ - { "andB", Eb, Gb, XX }, - { "andS", Ev, Gv, XX }, - { "andB", Gb, Eb, XX }, - { "andS", Gv, Ev, XX }, - { "andB", AL, Ib, XX }, - { "andS", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* SEG ES prefix */ - { "daa", XX, XX, XX }, - /* 28 */ - { "subB", Eb, Gb, XX }, - { "subS", Ev, Gv, XX }, - { "subB", Gb, Eb, XX }, - { "subS", Gv, Ev, XX }, - { "subB", AL, Ib, XX }, - { "subS", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* SEG CS prefix */ - { "das", XX, XX, XX }, - /* 30 */ - { "xorB", Eb, Gb, XX }, - { "xorS", Ev, Gv, XX }, - { "xorB", Gb, Eb, XX }, - { "xorS", Gv, Ev, XX }, - { "xorB", AL, Ib, XX }, - { "xorS", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* SEG SS prefix */ - { "aaa", XX, XX, XX }, - /* 38 */ - { "cmpB", Eb, Gb, XX }, - { "cmpS", Ev, Gv, XX }, - { "cmpB", Gb, Eb, XX }, - { "cmpS", Gv, Ev, XX }, - { "cmpB", AL, Ib, XX }, - { "cmpS", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* SEG DS prefix */ - { "aas", XX, XX, XX }, - /* 40 */ - { "incS", RMeAX, XX, XX }, - { "incS", RMeCX, XX, XX }, - { "incS", RMeDX, XX, XX }, - { "incS", RMeBX, XX, XX }, - { "incS", RMeSP, XX, XX }, - { "incS", RMeBP, XX, XX }, - { "incS", RMeSI, XX, XX }, - { "incS", RMeDI, XX, XX }, - /* 48 */ - { "decS", RMeAX, XX, XX }, - { "decS", RMeCX, XX, XX }, - { "decS", RMeDX, XX, XX }, - { "decS", RMeBX, XX, XX }, - { "decS", RMeSP, XX, XX }, - { "decS", RMeBP, XX, XX }, - { "decS", RMeSI, XX, XX }, - { "decS", RMeDI, XX, XX }, - /* 50 */ - { "pushS", RMeAX, XX, XX }, - { "pushS", RMeCX, XX, XX }, - { "pushS", RMeDX, XX, XX }, - { "pushS", RMeBX, XX, XX }, - { "pushS", RMeSP, XX, XX }, - { "pushS", RMeBP, XX, XX }, - { "pushS", RMeSI, XX, XX }, - { "pushS", RMeDI, XX, XX }, - /* 58 */ - { "popS", RMeAX, XX, XX }, - { "popS", RMeCX, XX, XX }, - { "popS", RMeDX, XX, XX }, - { "popS", RMeBX, XX, XX }, - { "popS", RMeSP, XX, XX }, - { "popS", RMeBP, XX, XX }, - { "popS", RMeSI, XX, XX }, - { "popS", RMeDI, XX, XX }, - /* 60 */ - { "pushaP", XX, XX, XX }, - { "popaP", XX, XX, XX }, - { "boundS", Gv, Ma, XX }, - { "arpl", Ew, Gw, XX }, - { "(bad)", XX, XX, XX }, /* seg fs */ - { "(bad)", XX, XX, XX }, /* seg gs */ - { "(bad)", XX, XX, XX }, /* op size prefix */ - { "(bad)", XX, XX, XX }, /* adr size prefix */ - /* 68 */ - { "pushI", Iv, XX, XX }, /* 386 book wrong */ - { "imulS", Gv, Ev, Iv }, - { "pushI", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */ - { "imulS", Gv, Ev, sIb }, - { "insb", Yb, indirDX, XX }, - { "insR", Yv, indirDX, XX }, - { "outsb", indirDX, Xb, XX }, - { "outsR", indirDX, Xv, XX }, - /* 70 */ - { "jo", Jb, cond_jump_flag, XX }, - { "jno", Jb, cond_jump_flag, XX }, - { "jb", Jb, cond_jump_flag, XX }, - { "jae", Jb, cond_jump_flag, XX }, - { "je", Jb, cond_jump_flag, XX }, - { "jne", Jb, cond_jump_flag, XX }, - { "jbe", Jb, cond_jump_flag, XX }, - { "ja", Jb, cond_jump_flag, XX }, - /* 78 */ - { "js", Jb, cond_jump_flag, XX }, - { "jns", Jb, cond_jump_flag, XX }, - { "jp", Jb, cond_jump_flag, XX }, - { "jnp", Jb, cond_jump_flag, XX }, - { "jl", Jb, cond_jump_flag, XX }, - { "jge", Jb, cond_jump_flag, XX }, - { "jle", Jb, cond_jump_flag, XX }, - { "jg", Jb, cond_jump_flag, XX }, - /* 80 */ - { GRP1b }, - { GRP1S }, - { "(bad)", XX, XX, XX }, - { GRP1Ss }, - { "testB", Eb, Gb, XX }, - { "testS", Ev, Gv, XX }, - { "xchgB", Eb, Gb, XX }, - { "xchgS", Ev, Gv, XX }, - /* 88 */ - { "movB", Eb, Gb, XX }, - { "movS", Ev, Gv, XX }, - { "movB", Gb, Eb, XX }, - { "movS", Gv, Ev, XX }, - { "movQ", Ev, Sw, XX }, - { "leaS", Gv, M, XX }, - { "movQ", Sw, Ev, XX }, - { "popT", Ev, XX, XX }, - /* 90 */ - { "nop", XX, XX, XX }, - /* FIXME: NOP with REPz prefix is called PAUSE. */ - { "xchgS", RMeCX, eAX, XX }, - { "xchgS", RMeDX, eAX, XX }, - { "xchgS", RMeBX, eAX, XX }, - { "xchgS", RMeSP, eAX, XX }, - { "xchgS", RMeBP, eAX, XX }, - { "xchgS", RMeSI, eAX, XX }, - { "xchgS", RMeDI, eAX, XX }, - /* 98 */ - { "cWtR", XX, XX, XX }, - { "cRtO", XX, XX, XX }, - { "lcallI", Ap, XX, XX }, - { "(bad)", XX, XX, XX }, /* fwait */ - { "pushfI", XX, XX, XX }, - { "popfI", XX, XX, XX }, - { "sahf", XX, XX, XX }, - { "lahf", XX, XX, XX }, - /* a0 */ - { "movB", AL, Ob, XX }, - { "movS", eAX, Ov, XX }, - { "movB", Ob, AL, XX }, - { "movS", Ov, eAX, XX }, - { "movsb", Yb, Xb, XX }, - { "movsR", Yv, Xv, XX }, - { "cmpsb", Xb, Yb, XX }, - { "cmpsR", Xv, Yv, XX }, - /* a8 */ - { "testB", AL, Ib, XX }, - { "testS", eAX, Iv, XX }, - { "stosB", Yb, AL, XX }, - { "stosS", Yv, eAX, XX }, - { "lodsB", AL, Xb, XX }, - { "lodsS", eAX, Xv, XX }, - { "scasB", AL, Yb, XX }, - { "scasS", eAX, Yv, XX }, - /* b0 */ - { "movB", RMAL, Ib, XX }, - { "movB", RMCL, Ib, XX }, - { "movB", RMDL, Ib, XX }, - { "movB", RMBL, Ib, XX }, - { "movB", RMAH, Ib, XX }, - { "movB", RMCH, Ib, XX }, - { "movB", RMDH, Ib, XX }, - { "movB", RMBH, Ib, XX }, - /* b8 */ - { "movS", RMeAX, Iv, XX }, - { "movS", RMeCX, Iv, XX }, - { "movS", RMeDX, Iv, XX }, - { "movS", RMeBX, Iv, XX }, - { "movS", RMeSP, Iv, XX }, - { "movS", RMeBP, Iv, XX }, - { "movS", RMeSI, Iv, XX }, - { "movS", RMeDI, Iv, XX }, - /* c0 */ - { GRP2b }, - { GRP2S }, - { "retI", Iw, XX, XX }, - { "retI", XX, XX, XX }, - { "lesS", Gv, Mp, XX }, - { "ldsS", Gv, Mp, XX }, - { "movA", Eb, Ib, XX }, - { "movQ", Ev, Iv, XX }, - /* c8 */ - { "enterI", Iw, Ib, XX }, - { "leaveI", XX, XX, XX }, - { "lretP", Iw, XX, XX }, - { "lretP", XX, XX, XX }, - { "int3", XX, XX, XX }, - { "int", Ib, XX, XX }, - { "into", XX, XX, XX}, - { "iretP", XX, XX, XX }, - /* d0 */ - { GRP2b_one }, - { GRP2S_one }, - { GRP2b_cl }, - { GRP2S_cl }, - { "aam", sIb, XX, XX }, - { "aad", sIb, XX, XX }, - { "(bad)", XX, XX, XX }, - { "xlat", DSBX, XX, XX }, - /* d8 */ - { FLOAT }, - { FLOAT }, - { FLOAT }, - { FLOAT }, - { FLOAT }, - { FLOAT }, - { FLOAT }, - { FLOAT }, - /* e0 */ - { "loopneF", Jb, loop_jcxz_flag, XX }, - { "loopeF", Jb, loop_jcxz_flag, XX }, - { "loopF", Jb, loop_jcxz_flag, XX }, - { "jEcxz", Jb, loop_jcxz_flag, XX }, - { "inB", AL, Ib, XX }, - { "inS", eAX, Ib, XX }, - { "outB", Ib, AL, XX }, - { "outS", Ib, eAX, XX }, - /* e8 */ - { "callI", Jv, XX, XX }, - { "jmpI", Jv, XX, XX }, - { "ljmpI", Ap, XX, XX }, - { "jmp", Jb, XX, XX }, - { "inB", AL, indirDX, XX }, - { "inS", eAX, indirDX, XX }, - { "outB", indirDX, AL, XX }, - { "outS", indirDX, eAX, XX }, - /* f0 */ - { "(bad)", XX, XX, XX }, /* lock prefix */ - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, /* repne */ - { "(bad)", XX, XX, XX }, /* repz */ - { "hlt", XX, XX, XX }, - { "cmc", XX, XX, XX }, - { GRP3b }, - { GRP3S }, - /* f8 */ - { "clc", XX, XX, XX }, - { "stc", XX, XX, XX }, - { "cli", XX, XX, XX }, - { "sti", XX, XX, XX }, - { "cld", XX, XX, XX }, - { "std", XX, XX, XX }, - { GRP4 }, - { GRP5 }, -}; -static const struct dis386 dis386_intel[] = { - /* 00 */ - { "add", Eb, Gb, XX }, - { "add", Ev, Gv, XX }, - { "add", Gb, Eb, XX }, - { "add", Gv, Ev, XX }, - { "add", AL, Ib, XX }, - { "add", eAX, Iv, XX }, - { "push", es, XX, XX }, - { "pop", es, XX, XX }, - /* 08 */ - { "or", Eb, Gb, XX }, - { "or", Ev, Gv, XX }, - { "or", Gb, Eb, XX }, - { "or", Gv, Ev, XX }, - { "or", AL, Ib, XX }, - { "or", eAX, Iv, XX }, - { "push", cs, XX, XX }, - { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */ - /* 10 */ - { "adc", Eb, Gb, XX }, - { "adc", Ev, Gv, XX }, - { "adc", Gb, Eb, XX }, - { "adc", Gv, Ev, XX }, - { "adc", AL, Ib, XX }, - { "adc", eAX, Iv, XX }, - { "push", ss, XX, XX }, - { "pop", ss, XX, XX }, - /* 18 */ - { "sbb", Eb, Gb, XX }, - { "sbb", Ev, Gv, XX }, - { "sbb", Gb, Eb, XX }, - { "sbb", Gv, Ev, XX }, - { "sbb", AL, Ib, XX }, - { "sbb", eAX, Iv, XX }, - { "push", ds, XX, XX }, - { "pop", ds, XX, XX }, - /* 20 */ - { "and", Eb, Gb, XX }, - { "and", Ev, Gv, XX }, - { "and", Gb, Eb, XX }, - { "and", Gv, Ev, XX }, - { "and", AL, Ib, XX }, - { "and", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* SEG ES prefix */ - { "daa", XX, XX, XX }, - /* 28 */ - { "sub", Eb, Gb, XX }, - { "sub", Ev, Gv, XX }, - { "sub", Gb, Eb, XX }, - { "sub", Gv, Ev, XX }, - { "sub", AL, Ib, XX }, - { "sub", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* SEG CS prefix */ - { "das", XX, XX, XX }, - /* 30 */ - { "xor", Eb, Gb, XX }, - { "xor", Ev, Gv, XX }, - { "xor", Gb, Eb, XX }, - { "xor", Gv, Ev, XX }, - { "xor", AL, Ib, XX }, - { "xor", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* SEG SS prefix */ - { "aaa", XX, XX, XX }, - /* 38 */ - { "cmp", Eb, Gb, XX }, - { "cmp", Ev, Gv, XX }, - { "cmp", Gb, Eb, XX }, - { "cmp", Gv, Ev, XX }, - { "cmp", AL, Ib, XX }, - { "cmp", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* SEG DS prefix */ - { "aas", XX, XX, XX }, - /* 40 */ - { "inc", RMeAX, XX, XX }, - { "inc", RMeCX, XX, XX }, - { "inc", RMeDX, XX, XX }, - { "inc", RMeBX, XX, XX }, - { "inc", RMeSP, XX, XX }, - { "inc", RMeBP, XX, XX }, - { "inc", RMeSI, XX, XX }, - { "inc", RMeDI, XX, XX }, - /* 48 */ - { "dec", RMeAX, XX, XX }, - { "dec", RMeCX, XX, XX }, - { "dec", RMeDX, XX, XX }, - { "dec", RMeBX, XX, XX }, - { "dec", RMeSP, XX, XX }, - { "dec", RMeBP, XX, XX }, - { "dec", RMeSI, XX, XX }, - { "dec", RMeDI, XX, XX }, - /* 50 */ - { "push", RMeAX, XX, XX }, - { "push", RMeCX, XX, XX }, - { "push", RMeDX, XX, XX }, - { "push", RMeBX, XX, XX }, - { "push", RMeSP, XX, XX }, - { "push", RMeBP, XX, XX }, - { "push", RMeSI, XX, XX }, - { "push", RMeDI, XX, XX }, - /* 58 */ - { "pop", RMeAX, XX, XX }, - { "pop", RMeCX, XX, XX }, - { "pop", RMeDX, XX, XX }, - { "pop", RMeBX, XX, XX }, - { "pop", RMeSP, XX, XX }, - { "pop", RMeBP, XX, XX }, - { "pop", RMeSI, XX, XX }, - { "pop", RMeDI, XX, XX }, - /* 60 */ - { "pusha", XX, XX, XX }, - { "popa", XX, XX, XX }, - { "bound", Gv, Ma, XX }, - { "arpl", Ew, Gw, XX }, - { "(bad)", XX, XX, XX }, /* seg fs */ - { "(bad)", XX, XX, XX }, /* seg gs */ - { "(bad)", XX, XX, XX }, /* op size prefix */ - { "(bad)", XX, XX, XX }, /* adr size prefix */ - /* 68 */ - { "push", Iv, XX, XX }, /* 386 book wrong */ - { "imul", Gv, Ev, Iv }, - { "push", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */ - { "imul", Gv, Ev, sIb }, - { "ins", Yb, indirDX, XX }, - { "ins", Yv, indirDX, XX }, - { "outs", indirDX, Xb, XX }, - { "outs", indirDX, Xv, XX }, - /* 70 */ - { "jo", Jb, XX, XX }, - { "jno", Jb, XX, XX }, - { "jb", Jb, XX, XX }, - { "jae", Jb, XX, XX }, - { "je", Jb, XX, XX }, - { "jne", Jb, XX, XX }, - { "jbe", Jb, XX, XX }, - { "ja", Jb, XX, XX }, - /* 78 */ - { "js", Jb, XX, XX }, - { "jns", Jb, XX, XX }, - { "jp", Jb, XX, XX }, - { "jnp", Jb, XX, XX }, - { "jl", Jb, XX, XX }, - { "jge", Jb, XX, XX }, - { "jle", Jb, XX, XX }, - { "jg", Jb, XX, XX }, - /* 80 */ - { GRP1b }, - { GRP1S }, - { "(bad)", XX, XX, XX }, - { GRP1Ss }, - { "test", Eb, Gb, XX }, - { "test", Ev, Gv, XX }, - { "xchg", Eb, Gb, XX }, - { "xchg", Ev, Gv, XX }, - /* 88 */ - { "mov", Eb, Gb, XX }, - { "mov", Ev, Gv, XX }, - { "mov", Gb, Eb, XX }, - { "mov", Gv, Ev, XX }, - { "mov", Ev, Sw, XX }, - { "lea", Gv, M, XX }, - { "mov", Sw, Ev, XX }, - { "pop", Ev, XX, XX }, - /* 90 */ - { "nop", XX, XX, XX }, - /* FIXME: NOP with REPz prefix is called PAUSE. */ - { "xchg", RMeCX, eAX, XX }, - { "xchg", RMeDX, eAX, XX }, - { "xchg", RMeBX, eAX, XX }, - { "xchg", RMeSP, eAX, XX }, - { "xchg", RMeBP, eAX, XX }, - { "xchg", RMeSI, eAX, XX }, - { "xchg", RMeDI, eAX, XX }, - /* 98 */ - { "cW", XX, XX, XX }, /* cwde and cbw */ - { "cR", XX, XX, XX }, /* cdq and cwd */ - { "lcall", Ap, XX, XX }, - { "(bad)", XX, XX, XX }, /* fwait */ - { "pushf", XX, XX, XX }, - { "popf", XX, XX, XX }, - { "sahf", XX, XX, XX }, - { "lahf", XX, XX, XX }, - /* a0 */ - { "mov", AL, Ob, XX }, - { "mov", eAX, Ov, XX }, - { "mov", Ob, AL, XX }, - { "mov", Ov, eAX, XX }, - { "movs", Yb, Xb, XX }, - { "movs", Yv, Xv, XX }, - { "cmps", Xb, Yb, XX }, - { "cmps", Xv, Yv, XX }, - /* a8 */ - { "test", AL, Ib, XX }, - { "test", eAX, Iv, XX }, - { "stos", Yb, AL, XX }, - { "stos", Yv, eAX, XX }, - { "lods", AL, Xb, XX }, - { "lods", eAX, Xv, XX }, - { "scas", AL, Yb, XX }, - { "scas", eAX, Yv, XX }, - /* b0 */ - { "mov", RMAL, Ib, XX }, - { "mov", RMCL, Ib, XX }, - { "mov", RMDL, Ib, XX }, - { "mov", RMBL, Ib, XX }, - { "mov", RMAH, Ib, XX }, - { "mov", RMCH, Ib, XX }, - { "mov", RMDH, Ib, XX }, - { "mov", RMBH, Ib, XX }, - /* b8 */ - { "mov", RMeAX, Iv, XX }, - { "mov", RMeCX, Iv, XX }, - { "mov", RMeDX, Iv, XX }, - { "mov", RMeBX, Iv, XX }, - { "mov", RMeSP, Iv, XX }, - { "mov", RMeBP, Iv, XX }, - { "mov", RMeSI, Iv, XX }, - { "mov", RMeDI, Iv, XX }, - /* c0 */ - { GRP2b }, - { GRP2S }, - { "ret", Iw, XX, XX }, - { "ret", XX, XX, XX }, - { "les", Gv, Mp, XX }, - { "lds", Gv, Mp, XX }, - { "mov", Eb, Ib, XX }, - { "mov", Ev, Iv, XX }, - /* c8 */ - { "enter", Iw, Ib, XX }, - { "leave", XX, XX, XX }, - { "lret", Iw, XX, XX }, - { "lret", XX, XX, XX }, - { "int3", XX, XX, XX }, - { "int", Ib, XX, XX }, - { "into", XX, XX, XX }, - { "iret", XX, XX, XX }, - /* d0 */ - { GRP2b_one }, - { GRP2S_one }, - { GRP2b_cl }, - { GRP2S_cl }, - { "aam", sIb, XX, XX }, - { "aad", sIb, XX, XX }, - { "(bad)", XX, XX, XX }, - { "xlat", DSBX, XX, XX }, - /* d8 */ - { FLOAT }, - { FLOAT }, - { FLOAT }, - { FLOAT }, - { FLOAT }, - { FLOAT }, - { FLOAT }, - { FLOAT }, - /* e0 */ - { "loopne", Jb, XX, XX }, - { "loope", Jb, XX, XX }, - { "loop", Jb, XX, XX }, - { "jEcxz", Jb, XX, XX }, - { "in", AL, Ib, XX }, - { "in", eAX, Ib, XX }, - { "out", Ib, AL, XX }, - { "out", Ib, eAX, XX }, - /* e8 */ - { "call", Jv, XX, XX }, - { "jmp", Jv, XX, XX }, - { "ljmp", Ap, XX, XX }, - { "jmp", Jb, XX, XX }, - { "in", AL, indirDX, XX }, - { "in", eAX, indirDX, XX }, - { "out", indirDX, AL, XX }, - { "out", indirDX, eAX, XX }, - /* f0 */ - { "(bad)", XX, XX, XX }, /* lock prefix */ - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, /* repne */ - { "(bad)", XX, XX, XX }, /* repz */ - { "hlt", XX, XX, XX }, - { "cmc", XX, XX, XX }, - { GRP3b }, - { GRP3S }, - /* f8 */ - { "clc", XX, XX, XX }, - { "stc", XX, XX, XX }, - { "cli", XX, XX, XX }, - { "sti", XX, XX, XX }, - { "cld", XX, XX, XX }, - { "std", XX, XX, XX }, - { GRP4 }, - { GRP5 }, -}; + Many of the above letters print nothing in Intel mode. See "putop" + for the details. -/* 64bit mode is having some instruction set differences, so separate table is - needed. */ -static const struct dis386 disx86_64_att[] = { - /* 00 */ - { "addB", Eb, Gb, XX }, - { "addS", Ev, Gv, XX }, - { "addB", Gb, Eb, XX }, - { "addS", Gv, Ev, XX }, - { "addB", AL, Ib, XX }, - { "addS", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "(bad)", XX, XX, XX }, /* Reserved. */ - /* 08 */ - { "orB", Eb, Gb, XX }, - { "orS", Ev, Gv, XX }, - { "orB", Gb, Eb, XX }, - { "orS", Gv, Ev, XX }, - { "orB", AL, Ib, XX }, - { "orS", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */ - /* 10 */ - { "adcB", Eb, Gb, XX }, - { "adcS", Ev, Gv, XX }, - { "adcB", Gb, Eb, XX }, - { "adcS", Gv, Ev, XX }, - { "adcB", AL, Ib, XX }, - { "adcS", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "(bad)", XX, XX, XX }, /* Reserved. */ - /* 18 */ - { "sbbB", Eb, Gb, XX }, - { "sbbS", Ev, Gv, XX }, - { "sbbB", Gb, Eb, XX }, - { "sbbS", Gv, Ev, XX }, - { "sbbB", AL, Ib, XX }, - { "sbbS", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "(bad)", XX, XX, XX }, /* Reserved. */ - /* 20 */ - { "andB", Eb, Gb, XX }, - { "andS", Ev, Gv, XX }, - { "andB", Gb, Eb, XX }, - { "andS", Gv, Ev, XX }, - { "andB", AL, Ib, XX }, - { "andS", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* SEG ES prefix */ - { "(bad)", XX, XX, XX }, /* Reserved. */ - /* 28 */ - { "subB", Eb, Gb, XX }, - { "subS", Ev, Gv, XX }, - { "subB", Gb, Eb, XX }, - { "subS", Gv, Ev, XX }, - { "subB", AL, Ib, XX }, - { "subS", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* SEG CS prefix */ - { "(bad)", XX, XX, XX }, /* Reserved. */ - /* 30 */ - { "xorB", Eb, Gb, XX }, - { "xorS", Ev, Gv, XX }, - { "xorB", Gb, Eb, XX }, - { "xorS", Gv, Ev, XX }, - { "xorB", AL, Ib, XX }, - { "xorS", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* SEG SS prefix */ - { "(bad)", XX, XX, XX }, /* Reserved. */ - /* 38 */ - { "cmpB", Eb, Gb, XX }, - { "cmpS", Ev, Gv, XX }, - { "cmpB", Gb, Eb, XX }, - { "cmpS", Gv, Ev, XX }, - { "cmpB", AL, Ib, XX }, - { "cmpS", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* SEG DS prefix */ - { "(bad)", XX, XX, XX }, /* Reserved. */ - /* 40 */ - { "(bad)", XX, XX, XX }, /* REX prefix area. */ - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - /* 48 */ - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - /* 50 */ - { "pushI", RMrAX, XX, XX }, - { "pushI", RMrCX, XX, XX }, - { "pushI", RMrDX, XX, XX }, - { "pushI", RMrBX, XX, XX }, - { "pushI", RMrSP, XX, XX }, - { "pushI", RMrBP, XX, XX }, - { "pushI", RMrSI, XX, XX }, - { "pushI", RMrDI, XX, XX }, - /* 58 */ - { "popI", RMrAX, XX, XX }, - { "popI", RMrCX, XX, XX }, - { "popI", RMrDX, XX, XX }, - { "popI", RMrBX, XX, XX }, - { "popI", RMrSP, XX, XX }, - { "popI", RMrBP, XX, XX }, - { "popI", RMrSI, XX, XX }, - { "popI", RMrDI, XX, XX }, - /* 60 */ - { "(bad)", XX, XX, XX }, /* reserved. */ - { "(bad)", XX, XX, XX }, /* reserved. */ - { "(bad)", XX, XX, XX }, /* reserved. */ - { "movslR", Gv, Ed, XX }, - { "(bad)", XX, XX, XX }, /* seg fs */ - { "(bad)", XX, XX, XX }, /* seg gs */ - { "(bad)", XX, XX, XX }, /* op size prefix */ - { "(bad)", XX, XX, XX }, /* adr size prefix */ - /* 68 */ - { "pushI", Iq, XX, XX }, /* 386 book wrong */ - { "imulS", Gv, Ev, Iv }, - { "pushI", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */ - { "imulS", Gv, Ev, sIb }, - { "insb", Yb, indirDX, XX }, - { "insR", Yv, indirDX, XX }, - { "outsb", indirDX, Xb, XX }, - { "outsR", indirDX, Xv, XX }, - /* 70 */ - { "jo", Jb, cond_jump_flag, XX }, - { "jno", Jb, cond_jump_flag, XX }, - { "jb", Jb, cond_jump_flag, XX }, - { "jae", Jb, cond_jump_flag, XX }, - { "je", Jb, cond_jump_flag, XX }, - { "jne", Jb, cond_jump_flag, XX }, - { "jbe", Jb, cond_jump_flag, XX }, - { "ja", Jb, cond_jump_flag, XX }, - /* 78 */ - { "js", Jb, cond_jump_flag, XX }, - { "jns", Jb, cond_jump_flag, XX }, - { "jp", Jb, cond_jump_flag, XX }, - { "jnp", Jb, cond_jump_flag, XX }, - { "jl", Jb, cond_jump_flag, XX }, - { "jge", Jb, cond_jump_flag, XX }, - { "jle", Jb, cond_jump_flag, XX }, - { "jg", Jb, cond_jump_flag, XX }, - /* 80 */ - { GRP1b }, - { GRP1S }, - { "(bad)", XX, XX, XX }, - { GRP1Ss }, - { "testB", Eb, Gb, XX }, - { "testS", Ev, Gv, XX }, - { "xchgB", Eb, Gb, XX }, - { "xchgS", Ev, Gv, XX }, - /* 88 */ - { "movB", Eb, Gb, XX }, - { "movS", Ev, Gv, XX }, - { "movB", Gb, Eb, XX }, - { "movS", Gv, Ev, XX }, - { "movQ", Ev, Sw, XX }, - { "leaS", Gv, M, XX }, - { "movQ", Sw, Ev, XX }, - { "popI", Ev, XX, XX }, - /* 90 */ - { "nop", XX, XX, XX }, - /* FIXME: NOP with REPz prefix is called PAUSE. */ - { "xchgS", RMeCX, eAX, XX }, - { "xchgS", RMeDX, eAX, XX }, - { "xchgS", RMeBX, eAX, XX }, - { "xchgS", RMeSP, eAX, XX }, - { "xchgS", RMeBP, eAX, XX }, - { "xchgS", RMeSI, eAX, XX }, - { "xchgS", RMeDI, eAX, XX }, - /* 98 */ - { "cWtR", XX, XX, XX }, - { "cRtO", XX, XX, XX }, - { "(bad)", XX, XX, XX }, /* reserved. */ - { "(bad)", XX, XX, XX }, /* fwait */ - { "pushfI", XX, XX, XX }, - { "popfI", XX, XX, XX }, - { "(bad)", XX, XX, XX }, /* reserved. */ - { "(bad)", XX, XX, XX }, /* reserved. */ - /* a0 */ - { "movB", AL, Ob64, XX }, - { "movS", eAX, Ov64, XX }, - { "movB", Ob64, AL, XX }, - { "movS", Ov64, eAX, XX }, - { "movsb", Yb, Xb, XX }, - { "movsR", Yv, Xv, XX }, - { "cmpsb", Xb, Yb, XX }, - { "cmpsR", Xv, Yv, XX }, - /* a8 */ - { "testB", AL, Ib, XX }, - { "testS", eAX, Iv, XX }, - { "stosB", Yb, AL, XX }, - { "stosS", Yv, eAX, XX }, - { "lodsB", AL, Xb, XX }, - { "lodsS", eAX, Xv, XX }, - { "scasB", AL, Yb, XX }, - { "scasS", eAX, Yv, XX }, - /* b0 */ - { "movB", RMAL, Ib, XX }, - { "movB", RMCL, Ib, XX }, - { "movB", RMDL, Ib, XX }, - { "movB", RMBL, Ib, XX }, - { "movB", RMAH, Ib, XX }, - { "movB", RMCH, Ib, XX }, - { "movB", RMDH, Ib, XX }, - { "movB", RMBH, Ib, XX }, - /* b8 */ - { "movS", RMeAX, Iv64, XX }, - { "movS", RMeCX, Iv64, XX }, - { "movS", RMeDX, Iv64, XX }, - { "movS", RMeBX, Iv64, XX }, - { "movS", RMeSP, Iv64, XX }, - { "movS", RMeBP, Iv64, XX }, - { "movS", RMeSI, Iv64, XX }, - { "movS", RMeDI, Iv64, XX }, - /* c0 */ - { GRP2b }, - { GRP2S }, - { "retI", Iw, XX, XX }, - { "retI", XX, XX, XX }, - { "(bad)", XX, XX, XX }, /* reserved. */ - { "ldsS", Gv, Mp, XX }, - { "movA", Eb, Ib, XX }, - { "movQ", Ev, Iv, XX }, - /* c8 */ - { "enterI", Iw, Ib, XX }, - { "leaveI", XX, XX, XX }, - { "lretP", Iw, XX, XX }, - { "lretP", XX, XX, XX }, - { "int3", XX, XX, XX }, - { "int", Ib, XX, XX }, - { "(bad)", XX, XX, XX }, /* reserved. */ - { "iretP", XX, XX, XX }, - /* d0 */ - { GRP2b_one }, - { GRP2S_one }, - { GRP2b_cl }, - { GRP2S_cl }, - { "(bad)", XX, XX, XX }, /* reserved. */ - { "(bad)", XX, XX, XX }, /* reserved. */ - { "(bad)", XX, XX, XX }, /* reserved. */ - { "xlat", DSBX, XX, XX }, - /* d8 */ - { FLOAT }, - { FLOAT }, - { FLOAT }, - { FLOAT }, - { FLOAT }, - { FLOAT }, - { FLOAT }, - { FLOAT }, - /* e0 */ - { "loopneF", Jb, loop_jcxz_flag, XX }, - { "loopeF", Jb, loop_jcxz_flag, XX }, - { "loopF", Jb, loop_jcxz_flag, XX }, - { "jEcxz", Jb, loop_jcxz_flag, XX }, - { "inB", AL, Ib, XX }, - { "inS", eAX, Ib, XX }, - { "outB", Ib, AL, XX }, - { "outS", Ib, eAX, XX }, - /* e8 */ - { "callI", Jv, XX, XX }, - { "jmpI", Jv, XX, XX }, - { "(bad)", XX, XX, XX }, /* reserved. */ - { "jmp", Jb, XX, XX }, - { "inB", AL, indirDX, XX }, - { "inS", eAX, indirDX, XX }, - { "outB", indirDX, AL, XX }, - { "outS", indirDX, eAX, XX }, - /* f0 */ - { "(bad)", XX, XX, XX }, /* lock prefix */ - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, /* repne */ - { "(bad)", XX, XX, XX }, /* repz */ - { "hlt", XX, XX, XX }, - { "cmc", XX, XX, XX }, - { GRP3b }, - { GRP3S }, - /* f8 */ - { "clc", XX, XX, XX }, - { "stc", XX, XX, XX }, - { "cli", XX, XX, XX }, - { "sti", XX, XX, XX }, - { "cld", XX, XX, XX }, - { "std", XX, XX, XX }, - { GRP4 }, - { GRP5 }, -}; + Braces '{' and '}', and vertical bars '|', indicate alternative + mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel + modes. In cases where there are only two alternatives, the X86_64 + instruction is reserved, and "(bad)" is printed. +*/ -static const struct dis386 dis386_64_intel[] = { +static const struct dis386 dis386[] = { /* 00 */ - { "add", Eb, Gb, XX }, - { "add", Ev, Gv, XX }, - { "add", Gb, Eb, XX }, - { "add", Gv, Ev, XX }, - { "add", AL, Ib, XX }, - { "add", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "(bad)", XX, XX, XX }, /* Reserved. */ + { "addB", Eb, Gb, XX }, + { "addS", Ev, Gv, XX }, + { "addB", Gb, Eb, XX }, + { "addS", Gv, Ev, XX }, + { "addB", AL, Ib, XX }, + { "addS", eAX, Iv, XX }, + { "push{T|}", es, XX, XX }, + { "pop{T|}", es, XX, XX }, /* 08 */ - { "or", Eb, Gb, XX }, - { "or", Ev, Gv, XX }, - { "or", Gb, Eb, XX }, - { "or", Gv, Ev, XX }, - { "or", AL, Ib, XX }, - { "or", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */ + { "orB", Eb, Gb, XX }, + { "orS", Ev, Gv, XX }, + { "orB", Gb, Eb, XX }, + { "orS", Gv, Ev, XX }, + { "orB", AL, Ib, XX }, + { "orS", eAX, Iv, XX }, + { "push{T|}", cs, XX, XX }, + { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */ /* 10 */ - { "adc", Eb, Gb, XX }, - { "adc", Ev, Gv, XX }, - { "adc", Gb, Eb, XX }, - { "adc", Gv, Ev, XX }, - { "adc", AL, Ib, XX }, - { "adc", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "(bad)", XX, XX, XX }, /* Reserved. */ + { "adcB", Eb, Gb, XX }, + { "adcS", Ev, Gv, XX }, + { "adcB", Gb, Eb, XX }, + { "adcS", Gv, Ev, XX }, + { "adcB", AL, Ib, XX }, + { "adcS", eAX, Iv, XX }, + { "push{T|}", ss, XX, XX }, + { "popT|}", ss, XX, XX }, /* 18 */ - { "sbb", Eb, Gb, XX }, - { "sbb", Ev, Gv, XX }, - { "sbb", Gb, Eb, XX }, - { "sbb", Gv, Ev, XX }, - { "sbb", AL, Ib, XX }, - { "sbb", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "(bad)", XX, XX, XX }, /* Reserved. */ + { "sbbB", Eb, Gb, XX }, + { "sbbS", Ev, Gv, XX }, + { "sbbB", Gb, Eb, XX }, + { "sbbS", Gv, Ev, XX }, + { "sbbB", AL, Ib, XX }, + { "sbbS", eAX, Iv, XX }, + { "push{T|}", ds, XX, XX }, + { "pop{T|}", ds, XX, XX }, /* 20 */ - { "and", Eb, Gb, XX }, - { "and", Ev, Gv, XX }, - { "and", Gb, Eb, XX }, - { "and", Gv, Ev, XX }, - { "and", AL, Ib, XX }, - { "and", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* SEG ES prefix */ - { "(bad)", XX, XX, XX }, /* Reserved. */ + { "andB", Eb, Gb, XX }, + { "andS", Ev, Gv, XX }, + { "andB", Gb, Eb, XX }, + { "andS", Gv, Ev, XX }, + { "andB", AL, Ib, XX }, + { "andS", eAX, Iv, XX }, + { "(bad)", XX, XX, XX }, /* SEG ES prefix */ + { "daa{|}", XX, XX, XX }, /* 28 */ - { "sub", Eb, Gb, XX }, - { "sub", Ev, Gv, XX }, - { "sub", Gb, Eb, XX }, - { "sub", Gv, Ev, XX }, - { "sub", AL, Ib, XX }, - { "sub", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* SEG CS prefix */ - { "(bad)", XX, XX, XX }, /* Reserved. */ + { "subB", Eb, Gb, XX }, + { "subS", Ev, Gv, XX }, + { "subB", Gb, Eb, XX }, + { "subS", Gv, Ev, XX }, + { "subB", AL, Ib, XX }, + { "subS", eAX, Iv, XX }, + { "(bad)", XX, XX, XX }, /* SEG CS prefix */ + { "das{|}", XX, XX, XX }, /* 30 */ - { "xor", Eb, Gb, XX }, - { "xor", Ev, Gv, XX }, - { "xor", Gb, Eb, XX }, - { "xor", Gv, Ev, XX }, - { "xor", AL, Ib, XX }, - { "xor", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* SEG SS prefix */ - { "(bad)", XX, XX, XX }, /* Reserved. */ + { "xorB", Eb, Gb, XX }, + { "xorS", Ev, Gv, XX }, + { "xorB", Gb, Eb, XX }, + { "xorS", Gv, Ev, XX }, + { "xorB", AL, Ib, XX }, + { "xorS", eAX, Iv, XX }, + { "(bad)", XX, XX, XX }, /* SEG SS prefix */ + { "aaa{|}", XX, XX, XX }, /* 38 */ - { "cmp", Eb, Gb, XX }, - { "cmp", Ev, Gv, XX }, - { "cmp", Gb, Eb, XX }, - { "cmp", Gv, Ev, XX }, - { "cmp", AL, Ib, XX }, - { "cmp", eAX, Iv, XX }, - { "(bad)", XX, XX, XX }, /* SEG DS prefix */ - { "(bad)", XX, XX, XX }, /* Reserved. */ + { "cmpB", Eb, Gb, XX }, + { "cmpS", Ev, Gv, XX }, + { "cmpB", Gb, Eb, XX }, + { "cmpS", Gv, Ev, XX }, + { "cmpB", AL, Ib, XX }, + { "cmpS", eAX, Iv, XX }, + { "(bad)", XX, XX, XX }, /* SEG DS prefix */ + { "aas{|}", XX, XX, XX }, /* 40 */ - { "(bad)", XX, XX, XX }, /* REX prefix area. */ - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, + { "inc{S|}", RMeAX, XX, XX }, + { "inc{S|}", RMeCX, XX, XX }, + { "inc{S|}", RMeDX, XX, XX }, + { "inc{S|}", RMeBX, XX, XX }, + { "inc{S|}", RMeSP, XX, XX }, + { "inc{S|}", RMeBP, XX, XX }, + { "inc{S|}", RMeSI, XX, XX }, + { "inc{S|}", RMeDI, XX, XX }, /* 48 */ - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, + { "dec{S|}", RMeAX, XX, XX }, + { "dec{S|}", RMeCX, XX, XX }, + { "dec{S|}", RMeDX, XX, XX }, + { "dec{S|}", RMeBX, XX, XX }, + { "dec{S|}", RMeSP, XX, XX }, + { "dec{S|}", RMeBP, XX, XX }, + { "dec{S|}", RMeSI, XX, XX }, + { "dec{S|}", RMeDI, XX, XX }, /* 50 */ - { "push", RMrAX, XX, XX }, - { "push", RMrCX, XX, XX }, - { "push", RMrDX, XX, XX }, - { "push", RMrBX, XX, XX }, - { "push", RMrSP, XX, XX }, - { "push", RMrBP, XX, XX }, - { "push", RMrSI, XX, XX }, - { "push", RMrDI, XX, XX }, + { "pushS", RMrAX, XX, XX }, + { "pushS", RMrCX, XX, XX }, + { "pushS", RMrDX, XX, XX }, + { "pushS", RMrBX, XX, XX }, + { "pushS", RMrSP, XX, XX }, + { "pushS", RMrBP, XX, XX }, + { "pushS", RMrSI, XX, XX }, + { "pushS", RMrDI, XX, XX }, /* 58 */ - { "pop", RMrAX, XX, XX }, - { "pop", RMrCX, XX, XX }, - { "pop", RMrDX, XX, XX }, - { "pop", RMrBX, XX, XX }, - { "pop", RMrSP, XX, XX }, - { "pop", RMrBP, XX, XX }, - { "pop", RMrSI, XX, XX }, - { "pop", RMrDI, XX, XX }, + { "popS", RMrAX, XX, XX }, + { "popS", RMrCX, XX, XX }, + { "popS", RMrDX, XX, XX }, + { "popS", RMrBX, XX, XX }, + { "popS", RMrSP, XX, XX }, + { "popS", RMrBP, XX, XX }, + { "popS", RMrSI, XX, XX }, + { "popS", RMrDI, XX, XX }, /* 60 */ - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "movsx", Gv, Ed, XX }, - { "(bad)", XX, XX, XX }, /* seg fs */ - { "(bad)", XX, XX, XX }, /* seg gs */ - { "(bad)", XX, XX, XX }, /* op size prefix */ - { "(bad)", XX, XX, XX }, /* adr size prefix */ + { "pusha{P|}", XX, XX, XX }, + { "popa{P|}", XX, XX, XX }, + { "bound{S|}", Gv, Ma, XX }, + { X86_64_0 }, + { "(bad)", XX, XX, XX }, /* seg fs */ + { "(bad)", XX, XX, XX }, /* seg gs */ + { "(bad)", XX, XX, XX }, /* op size prefix */ + { "(bad)", XX, XX, XX }, /* adr size prefix */ /* 68 */ - { "push", Iq, XX, XX }, /* 386 book wrong */ - { "imul", Gv, Ev, Iv }, - { "push", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */ - { "imul", Gv, Ev, sIb }, - { "ins", Yb, indirDX, XX }, - { "ins", Yv, indirDX, XX }, - { "outs", indirDX, Xb, XX }, - { "outs", indirDX, Xv, XX }, + { "pushT", Iq, XX, XX }, + { "imulS", Gv, Ev, Iv }, + { "pushT", sIb, XX, XX }, + { "imulS", Gv, Ev, sIb }, + { "ins{b||b|}", Yb, indirDX, XX }, + { "ins{R||R|}", Yv, indirDX, XX }, + { "outs{b||b|}", indirDX, Xb, XX }, + { "outs{R||R|}", indirDX, Xv, XX }, /* 70 */ - { "jo", Jb, XX, XX }, - { "jno", Jb, XX, XX }, - { "jb", Jb, XX, XX }, - { "jae", Jb, XX, XX }, - { "je", Jb, XX, XX }, - { "jne", Jb, XX, XX }, - { "jbe", Jb, XX, XX }, - { "ja", Jb, XX, XX }, + { "joH", Jb, XX, cond_jump_flag }, + { "jnoH", Jb, XX, cond_jump_flag }, + { "jbH", Jb, XX, cond_jump_flag }, + { "jaeH", Jb, XX, cond_jump_flag }, + { "jeH", Jb, XX, cond_jump_flag }, + { "jneH", Jb, XX, cond_jump_flag }, + { "jbeH", Jb, XX, cond_jump_flag }, + { "jaH", Jb, XX, cond_jump_flag }, /* 78 */ - { "js", Jb, XX, XX }, - { "jns", Jb, XX, XX }, - { "jp", Jb, XX, XX }, - { "jnp", Jb, XX, XX }, - { "jl", Jb, XX, XX }, - { "jge", Jb, XX, XX }, - { "jle", Jb, XX, XX }, - { "jg", Jb, XX, XX }, + { "jsH", Jb, XX, cond_jump_flag }, + { "jnsH", Jb, XX, cond_jump_flag }, + { "jpH", Jb, XX, cond_jump_flag }, + { "jnpH", Jb, XX, cond_jump_flag }, + { "jlH", Jb, XX, cond_jump_flag }, + { "jgeH", Jb, XX, cond_jump_flag }, + { "jleH", Jb, XX, cond_jump_flag }, + { "jgH", Jb, XX, cond_jump_flag }, /* 80 */ { GRP1b }, { GRP1S }, - { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, { GRP1Ss }, - { "test", Eb, Gb, XX }, - { "test", Ev, Gv, XX }, - { "xchg", Eb, Gb, XX }, - { "xchg", Ev, Gv, XX }, + { "testB", Eb, Gb, XX }, + { "testS", Ev, Gv, XX }, + { "xchgB", Eb, Gb, XX }, + { "xchgS", Ev, Gv, XX }, /* 88 */ - { "mov", Eb, Gb, XX }, - { "mov", Ev, Gv, XX }, - { "mov", Gb, Eb, XX }, - { "mov", Gv, Ev, XX }, - { "mov", Ev, Sw, XX }, - { "lea", Gv, M, XX }, - { "mov", Sw, Ev, XX }, - { "pop", Ev, XX, XX }, + { "movB", Eb, Gb, XX }, + { "movS", Ev, Gv, XX }, + { "movB", Gb, Eb, XX }, + { "movS", Gv, Ev, XX }, + { "movQ", Ev, Sw, XX }, + { "leaS", Gv, M, XX }, + { "movQ", Sw, Ev, XX }, + { "popU", Ev, XX, XX }, /* 90 */ - { "nop", XX, XX, XX }, + { "nop", XX, XX, XX }, /* FIXME: NOP with REPz prefix is called PAUSE. */ - { "xchg", RMeCX, eAX, XX }, - { "xchg", RMeDX, eAX, XX }, - { "xchg", RMeBX, eAX, XX }, - { "xchg", RMeSP, eAX, XX }, - { "xchg", RMeBP, eAX, XX }, - { "xchg", RMeSI, eAX, XX }, - { "xchg", RMeDI, eAX, XX }, + { "xchgS", RMeCX, eAX, XX }, + { "xchgS", RMeDX, eAX, XX }, + { "xchgS", RMeBX, eAX, XX }, + { "xchgS", RMeSP, eAX, XX }, + { "xchgS", RMeBP, eAX, XX }, + { "xchgS", RMeSI, eAX, XX }, + { "xchgS", RMeDI, eAX, XX }, /* 98 */ - { "cW", XX, XX, XX }, /* cwde and cbw */ - { "cR", XX, XX, XX }, /* cdq and cwd */ - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "(bad)", XX, XX, XX }, /* fwait */ - { "pushf", XX, XX, XX }, - { "popf", XX, XX, XX }, - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "(bad)", XX, XX, XX }, /* Reserved. */ + { "cW{tR||tR|}", XX, XX, XX }, + { "cR{tO||tO|}", XX, XX, XX }, + { "lcall{T|}", Ap, XX, XX }, + { "(bad)", XX, XX, XX }, /* fwait */ + { "pushfT", XX, XX, XX }, + { "popfT", XX, XX, XX }, + { "sahf{|}", XX, XX, XX }, + { "lahf{|}", XX, XX, XX }, /* a0 */ - { "mov", AL, Ob, XX }, - { "mov", eAX, Ov, XX }, - { "mov", Ob, AL, XX }, - { "mov", Ov, eAX, XX }, - { "movs", Yb, Xb, XX }, - { "movs", Yv, Xv, XX }, - { "cmps", Xb, Yb, XX }, - { "cmps", Xv, Yv, XX }, + { "movB", AL, Ob64, XX }, + { "movS", eAX, Ov64, XX }, + { "movB", Ob64, AL, XX }, + { "movS", Ov64, eAX, XX }, + { "movs{b||b|}", Yb, Xb, XX }, + { "movs{R||R|}", Yv, Xv, XX }, + { "cmps{b||b|}", Xb, Yb, XX }, + { "cmps{R||R|}", Xv, Yv, XX }, /* a8 */ - { "test", AL, Ib, XX }, - { "test", eAX, Iv, XX }, - { "stos", Yb, AL, XX }, - { "stos", Yv, eAX, XX }, - { "lods", AL, Xb, XX }, - { "lods", eAX, Xv, XX }, - { "scas", AL, Yb, XX }, - { "scas", eAX, Yv, XX }, + { "testB", AL, Ib, XX }, + { "testS", eAX, Iv, XX }, + { "stosB", Yb, AL, XX }, + { "stosS", Yv, eAX, XX }, + { "lodsB", AL, Xb, XX }, + { "lodsS", eAX, Xv, XX }, + { "scasB", AL, Yb, XX }, + { "scasS", eAX, Yv, XX }, /* b0 */ - { "mov", RMAL, Ib, XX }, - { "mov", RMCL, Ib, XX }, - { "mov", RMDL, Ib, XX }, - { "mov", RMBL, Ib, XX }, - { "mov", RMAH, Ib, XX }, - { "mov", RMCH, Ib, XX }, - { "mov", RMDH, Ib, XX }, - { "mov", RMBH, Ib, XX }, + { "movB", RMAL, Ib, XX }, + { "movB", RMCL, Ib, XX }, + { "movB", RMDL, Ib, XX }, + { "movB", RMBL, Ib, XX }, + { "movB", RMAH, Ib, XX }, + { "movB", RMCH, Ib, XX }, + { "movB", RMDH, Ib, XX }, + { "movB", RMBH, Ib, XX }, /* b8 */ - { "mov", RMeAX, Iv, XX }, - { "mov", RMeCX, Iv, XX }, - { "mov", RMeDX, Iv, XX }, - { "mov", RMeBX, Iv, XX }, - { "mov", RMeSP, Iv, XX }, - { "mov", RMeBP, Iv, XX }, - { "mov", RMeSI, Iv, XX }, - { "mov", RMeDI, Iv, XX }, + { "movS", RMeAX, Iv64, XX }, + { "movS", RMeCX, Iv64, XX }, + { "movS", RMeDX, Iv64, XX }, + { "movS", RMeBX, Iv64, XX }, + { "movS", RMeSP, Iv64, XX }, + { "movS", RMeBP, Iv64, XX }, + { "movS", RMeSI, Iv64, XX }, + { "movS", RMeDI, Iv64, XX }, /* c0 */ { GRP2b }, { GRP2S }, - { "ret", Iw, XX, XX }, - { "ret", XX, XX, XX }, - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "lds", Gv, Mp, XX }, - { "mov", Eb, Ib, XX }, - { "mov", Ev, Iv, XX }, + { "retT", Iw, XX, XX }, + { "retT", XX, XX, XX }, + { "les{S|}", Gv, Mp, XX }, + { "ldsS", Gv, Mp, XX }, + { "movA", Eb, Ib, XX }, + { "movQ", Ev, Iv, XX }, /* c8 */ - { "enter", Iw, Ib, XX }, - { "leave", XX, XX, XX }, - { "lret", Iw, XX, XX }, - { "lret", XX, XX, XX }, - { "int3", XX, XX, XX }, - { "int", Ib, XX, XX }, - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "iret", XX, XX, XX }, + { "enterT", Iw, Ib, XX }, + { "leaveT", XX, XX, XX }, + { "lretP", Iw, XX, XX }, + { "lretP", XX, XX, XX }, + { "int3", XX, XX, XX }, + { "int", Ib, XX, XX }, + { "into{|}", XX, XX, XX }, + { "iretP", XX, XX, XX }, /* d0 */ { GRP2b_one }, { GRP2S_one }, { GRP2b_cl }, { GRP2S_cl }, - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "xlat", DSBX, XX, XX }, + { "aam{|}", sIb, XX, XX }, + { "aad{|}", sIb, XX, XX }, + { "(bad)", XX, XX, XX }, + { "xlat", DSBX, XX, XX }, /* d8 */ { FLOAT }, { FLOAT }, @@ -1585,436 +717,143 @@ static const struct dis386 dis386_64_intel[] = { { FLOAT }, { FLOAT }, /* e0 */ - { "loopne", Jb, XX, XX }, - { "loope", Jb, XX, XX }, - { "loop", Jb, XX, XX }, - { "jEcxz", Jb, XX, XX }, - { "in", AL, Ib, XX }, - { "in", eAX, Ib, XX }, - { "out", Ib, AL, XX }, - { "out", Ib, eAX, XX }, + { "loopneFH", Jb, XX, loop_jcxz_flag }, + { "loopeFH", Jb, XX, loop_jcxz_flag }, + { "loopFH", Jb, XX, loop_jcxz_flag }, + { "jEcxzH", Jb, XX, loop_jcxz_flag }, + { "inB", AL, Ib, XX }, + { "inS", eAX, Ib, XX }, + { "outB", Ib, AL, XX }, + { "outS", Ib, eAX, XX }, /* e8 */ - { "call", Jv, XX, XX }, - { "jmp", Jv, XX, XX }, - { "(bad)", XX, XX, XX }, /* Reserved. */ - { "jmp", Jb, XX, XX }, - { "in", AL, indirDX, XX }, - { "in", eAX, indirDX, XX }, - { "out", indirDX, AL, XX }, - { "out", indirDX, eAX, XX }, + { "callT", Jv, XX, XX }, + { "jmpT", Jv, XX, XX }, + { "ljmp{T|}", Ap, XX, XX }, + { "jmp", Jb, XX, XX }, + { "inB", AL, indirDX, XX }, + { "inS", eAX, indirDX, XX }, + { "outB", indirDX, AL, XX }, + { "outS", indirDX, eAX, XX }, /* f0 */ - { "(bad)", XX, XX, XX }, /* lock prefix */ - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, /* repne */ - { "(bad)", XX, XX, XX }, /* repz */ - { "hlt", XX, XX, XX }, - { "cmc", XX, XX, XX }, + { "(bad)", XX, XX, XX }, /* lock prefix */ + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, /* repne */ + { "(bad)", XX, XX, XX }, /* repz */ + { "hlt", XX, XX, XX }, + { "cmc", XX, XX, XX }, { GRP3b }, { GRP3S }, /* f8 */ - { "clc", XX, XX, XX }, - { "stc", XX, XX, XX }, - { "cli", XX, XX, XX }, - { "sti", XX, XX, XX }, - { "cld", XX, XX, XX }, - { "std", XX, XX, XX }, + { "clc", XX, XX, XX }, + { "stc", XX, XX, XX }, + { "cli", XX, XX, XX }, + { "sti", XX, XX, XX }, + { "cld", XX, XX, XX }, + { "std", XX, XX, XX }, { GRP4 }, { GRP5 }, }; -static const struct dis386 dis386_twobyte_att[] = { - /* 00 */ - { GRP6 }, - { GRP7 }, - { "larS", Gv, Ew, XX }, - { "lslS", Gv, Ew, XX }, - { "(bad)", XX, XX, XX }, - { "syscall", XX, XX, XX }, - { "clts", XX, XX, XX }, - { "sysretP", XX, XX, XX }, - /* 08 */ - { "invd", XX, XX, XX }, - { "wbinvd", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "ud2a", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { GRPAMD }, - { "femms", XX, XX, XX }, - { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix */ - /* 10 */ - { PREGRP8 }, - { PREGRP9 }, - { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */ - { "movlpX", EX, XM, SIMD_Fixup, 'h' }, - { "unpcklpX", XM, EX, XX }, - { "unpckhpX", XM, EX, XX }, - { "movhpX", XM, EX, SIMD_Fixup, 'l' }, - { "movhpX", EX, XM, SIMD_Fixup, 'l' }, - /* 18 */ - { GRP14 }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - /* 20 */ - /* these are all backward in appendix A of the intel book */ - { "movL", Rm, Cm, XX }, - { "movL", Rm, Dm, XX }, - { "movL", Cm, Rm, XX }, - { "movL", Dm, Rm, XX }, - { "movL", Rd, Td, XX }, - { "(bad)", XX, XX, XX }, - { "movL", Td, Rd, XX }, - { "(bad)", XX, XX, XX }, - /* 28 */ - { "movapX", XM, EX, XX }, - { "movapX", EX, XM, XX }, - { PREGRP2 }, - { "movntpX", Ev, XM, XX }, - { PREGRP4 }, - { PREGRP3 }, - { "ucomisX", XM,EX, XX }, - { "comisX", XM,EX, XX }, - /* 30 */ - { "wrmsr", XX, XX, XX }, - { "rdtsc", XX, XX, XX }, - { "rdmsr", XX, XX, XX }, - { "rdpmc", XX, XX, XX }, - { "sysenter", XX, XX, XX }, - { "sysexit", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - /* 38 */ - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - /* 40 */ - { "cmovo", Gv, Ev, XX }, - { "cmovno", Gv, Ev, XX }, - { "cmovb", Gv, Ev, XX }, - { "cmovae", Gv, Ev, XX }, - { "cmove", Gv, Ev, XX }, - { "cmovne", Gv, Ev, XX }, - { "cmovbe", Gv, Ev, XX }, - { "cmova", Gv, Ev, XX }, - /* 48 */ - { "cmovs", Gv, Ev, XX }, - { "cmovns", Gv, Ev, XX }, - { "cmovp", Gv, Ev, XX }, - { "cmovnp", Gv, Ev, XX }, - { "cmovl", Gv, Ev, XX }, - { "cmovge", Gv, Ev, XX }, - { "cmovle", Gv, Ev, XX }, - { "cmovg", Gv, Ev, XX }, - /* 50 */ - { "movmskpX", Gd, XS, XX }, - { PREGRP13 }, - { PREGRP12 }, - { PREGRP11 }, - { "andpX", XM, EX, XX }, - { "andnpX", XM, EX, XX }, - { "orpX", XM, EX, XX }, - { "xorpX", XM, EX, XX }, - /* 58 */ - { PREGRP0 }, - { PREGRP10 }, - { PREGRP17 }, - { PREGRP16 }, - { PREGRP14 }, - { PREGRP7 }, - { PREGRP5 }, - { PREGRP6 }, - /* 60 */ - { "punpcklbw", MX, EM, XX }, - { "punpcklwd", MX, EM, XX }, - { "punpckldq", MX, EM, XX }, - { "packsswb", MX, EM, XX }, - { "pcmpgtb", MX, EM, XX }, - { "pcmpgtw", MX, EM, XX }, - { "pcmpgtd", MX, EM, XX }, - { "packuswb", MX, EM, XX }, - /* 68 */ - { "punpckhbw", MX, EM, XX }, - { "punpckhwd", MX, EM, XX }, - { "punpckhdq", MX, EM, XX }, - { "packssdw", MX, EM, XX }, - { PREGRP26 }, - { PREGRP24 }, - { "movd", MX, Ed, XX }, - { PREGRP19 }, - /* 70 */ - { PREGRP22 }, - { GRP10 }, - { GRP11 }, - { GRP12 }, - { "pcmpeqb", MX, EM, XX }, - { "pcmpeqw", MX, EM, XX }, - { "pcmpeqd", MX, EM, XX }, - { "emms", XX, XX, XX }, - /* 78 */ - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { PREGRP23 }, - { PREGRP20 }, - /* 80 */ - { "jo", Jv, cond_jump_flag, XX }, - { "jno", Jv, cond_jump_flag, XX }, - { "jb", Jv, cond_jump_flag, XX }, - { "jae", Jv, cond_jump_flag, XX }, - { "je", Jv, cond_jump_flag, XX }, - { "jne", Jv, cond_jump_flag, XX }, - { "jbe", Jv, cond_jump_flag, XX }, - { "ja", Jv, cond_jump_flag, XX }, - /* 88 */ - { "js", Jv, cond_jump_flag, XX }, - { "jns", Jv, cond_jump_flag, XX }, - { "jp", Jv, cond_jump_flag, XX }, - { "jnp", Jv, cond_jump_flag, XX }, - { "jl", Jv, cond_jump_flag, XX }, - { "jge", Jv, cond_jump_flag, XX }, - { "jle", Jv, cond_jump_flag, XX }, - { "jg", Jv, cond_jump_flag, XX }, - /* 90 */ - { "seto", Eb, XX, XX }, - { "setno", Eb, XX, XX }, - { "setb", Eb, XX, XX }, - { "setae", Eb, XX, XX }, - { "sete", Eb, XX, XX }, - { "setne", Eb, XX, XX }, - { "setbe", Eb, XX, XX }, - { "seta", Eb, XX, XX }, - /* 98 */ - { "sets", Eb, XX, XX }, - { "setns", Eb, XX, XX }, - { "setp", Eb, XX, XX }, - { "setnp", Eb, XX, XX }, - { "setl", Eb, XX, XX }, - { "setge", Eb, XX, XX }, - { "setle", Eb, XX, XX }, - { "setg", Eb, XX, XX }, - /* a0 */ - { "pushI", fs, XX, XX }, - { "popI", fs, XX, XX }, - { "cpuid", XX, XX, XX }, - { "btS", Ev, Gv, XX }, - { "shldS", Ev, Gv, Ib }, - { "shldS", Ev, Gv, CL }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - /* a8 */ - { "pushI", gs, XX, XX }, - { "popI", gs, XX, XX }, - { "rsm", XX, XX, XX }, - { "btsS", Ev, Gv, XX }, - { "shrdS", Ev, Gv, Ib }, - { "shrdS", Ev, Gv, CL }, - { GRP13 }, - { "imulS", Gv, Ev, XX }, - /* b0 */ - { "cmpxchgB", Eb, Gb, XX }, - { "cmpxchgS", Ev, Gv, XX }, - { "lssS", Gv, Mp, XX }, - { "btrS", Ev, Gv, XX }, - { "lfsS", Gv, Mp, XX }, - { "lgsS", Gv, Mp, XX }, - { "movzbR", Gv, Eb, XX }, - { "movzwR", Gv, Ew, XX }, /* yes, there really is movzww ! */ - /* b8 */ - { "(bad)", XX, XX, XX }, - { "ud2b", XX, XX, XX }, - { GRP8 }, - { "btcS", Ev, Gv, XX }, - { "bsfS", Gv, Ev, XX }, - { "bsrS", Gv, Ev, XX }, - { "movsbR", Gv, Eb, XX }, - { "movswR", Gv, Ew, XX }, /* yes, there really is movsww ! */ - /* c0 */ - { "xaddB", Eb, Gb, XX }, - { "xaddS", Ev, Gv, XX }, - { PREGRP1 }, - { "movntiS", Ev, Gv, XX }, - { "pinsrw", MX, Ed, Ib }, - { "pextrw", Gd, MS, Ib }, - { "shufpX", XM, EX, Ib }, - { GRP9 }, - /* c8 */ - { "bswap", RMeAX, XX, XX }, /* bswap doesn't support 16 bit regs */ - { "bswap", RMeCX, XX, XX }, - { "bswap", RMeDX, XX, XX }, - { "bswap", RMeBX, XX, XX }, - { "bswap", RMeSP, XX, XX }, - { "bswap", RMeBP, XX, XX }, - { "bswap", RMeSI, XX, XX }, - { "bswap", RMeDI, XX, XX }, - /* d0 */ - { "(bad)", XX, XX, XX }, - { "psrlw", MX, EM, XX }, - { "psrld", MX, EM, XX }, - { "psrlq", MX, EM, XX }, - { "paddq", MX, EM, XX }, - { "pmullw", MX, EM, XX }, - { PREGRP21 }, - { "pmovmskb", Gd, MS, XX }, - /* d8 */ - { "psubusb", MX, EM, XX }, - { "psubusw", MX, EM, XX }, - { "pminub", MX, EM, XX }, - { "pand", MX, EM, XX }, - { "paddusb", MX, EM, XX }, - { "paddusw", MX, EM, XX }, - { "pmaxub", MX, EM, XX }, - { "pandn", MX, EM, XX }, - /* e0 */ - { "pavgb", MX, EM, XX }, - { "psraw", MX, EM, XX }, - { "psrad", MX, EM, XX }, - { "pavgw", MX, EM, XX }, - { "pmulhuw", MX, EM, XX }, - { "pmulhw", MX, EM, XX }, - { PREGRP15 }, - { PREGRP25 }, - /* e8 */ - { "psubsb", MX, EM, XX }, - { "psubsw", MX, EM, XX }, - { "pminsw", MX, EM, XX }, - { "por", MX, EM, XX }, - { "paddsb", MX, EM, XX }, - { "paddsw", MX, EM, XX }, - { "pmaxsw", MX, EM, XX }, - { "pxor", MX, EM, XX }, - /* f0 */ - { "(bad)", XX, XX, XX }, - { "psllw", MX, EM, XX }, - { "pslld", MX, EM, XX }, - { "psllq", MX, EM, XX }, - { "pmuludq", MX, EM, XX }, - { "pmaddwd", MX, EM, XX }, - { "psadbw", MX, EM, XX }, - { PREGRP18 }, - /* f8 */ - { "psubb", MX, EM, XX }, - { "psubw", MX, EM, XX }, - { "psubd", MX, EM, XX }, - { "psubq", MX, EM, XX }, - { "paddb", MX, EM, XX }, - { "paddw", MX, EM, XX }, - { "paddd", MX, EM, XX }, - { "(bad)", XX, XX, XX } -}; - -static const struct dis386 dis386_twobyte_intel[] = { +static const struct dis386 dis386_twobyte[] = { /* 00 */ { GRP6 }, { GRP7 }, - { "lar", Gv, Ew, XX }, - { "lsl", Gv, Ew, XX }, - { "(bad)", XX, XX, XX }, - { "syscall", XX, XX, XX }, - { "clts", XX, XX, XX }, - { "sysretP", XX, XX, XX }, + { "larS", Gv, Ew, XX }, + { "lslS", Gv, Ew, XX }, + { "(bad)", XX, XX, XX }, + { "syscall", XX, XX, XX }, + { "clts", XX, XX, XX }, + { "sysretP", XX, XX, XX }, /* 08 */ - { "invd", XX, XX, XX }, - { "wbinvd", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "ud2a", XX, XX, XX }, - { "(bad)", XX, XX, XX }, + { "invd", XX, XX, XX }, + { "wbinvd", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "ud2a", XX, XX, XX }, + { "(bad)", XX, XX, XX }, { GRPAMD }, - { "femms" , XX, XX, XX}, - { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix */ + { "femms", XX, XX, XX }, + { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */ /* 10 */ { PREGRP8 }, { PREGRP9 }, - { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */ - { "movlpX", EX, XM, SIMD_Fixup, 'h' }, - { "unpcklpX", XM, EX, XX }, - { "unpckhpX", XM, EX, XX }, - { "movhpX", XM, EX, SIMD_Fixup, 'l' }, - { "movhpX", EX, XM, SIMD_Fixup, 'l' }, + { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */ + { "movlpX", EX, XM, SIMD_Fixup, 'h' }, + { "unpcklpX", XM, EX, XX }, + { "unpckhpX", XM, EX, XX }, + { "movhpX", XM, EX, SIMD_Fixup, 'l' }, + { "movhpX", EX, XM, SIMD_Fixup, 'l' }, /* 18 */ { GRP14 }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, /* 20 */ - /* these are all backward in appendix A of the intel book */ - { "mov", Rm, Cm, XX }, - { "mov", Rm, Dm, XX }, - { "mov", Cm, Rm, XX }, - { "mov", Dm, Rm, XX }, - { "mov", Rd, Td, XX }, - { "(bad)", XX, XX, XX }, - { "mov", Td, Rd, XX }, - { "(bad)", XX, XX, XX }, + { "movL", Rm, Cm, XX }, + { "movL", Rm, Dm, XX }, + { "movL", Cm, Rm, XX }, + { "movL", Dm, Rm, XX }, + { "movL", Rd, Td, XX }, + { "(bad)", XX, XX, XX }, + { "movL", Td, Rd, XX }, + { "(bad)", XX, XX, XX }, /* 28 */ - { "movapX", XM, EX, XX }, - { "movapX", EX, XM, XX }, + { "movapX", XM, EX, XX }, + { "movapX", EX, XM, XX }, { PREGRP2 }, - { "movntpX", Ev, XM, XX }, + { "movntpX", Ev, XM, XX }, { PREGRP4 }, { PREGRP3 }, - { "ucomisX", XM,EX, XX }, - { "comisX", XM,EX, XX }, + { "ucomisX", XM,EX, XX }, + { "comisX", XM,EX, XX }, /* 30 */ - { "wrmsr", XX, XX, XX }, - { "rdtsc", XX, XX, XX }, - { "rdmsr", XX, XX, XX }, - { "rdpmc", XX, XX, XX }, - { "sysenter", XX, XX, XX }, - { "sysexit", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, + { "wrmsr", XX, XX, XX }, + { "rdtsc", XX, XX, XX }, + { "rdmsr", XX, XX, XX }, + { "rdpmc", XX, XX, XX }, + { "sysenter", XX, XX, XX }, + { "sysexit", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, /* 38 */ - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, /* 40 */ - { "cmovo", Gv, Ev, XX }, - { "cmovno", Gv, Ev, XX }, - { "cmovb", Gv, Ev, XX }, - { "cmovae", Gv, Ev, XX }, - { "cmove", Gv, Ev, XX }, - { "cmovne", Gv, Ev, XX }, - { "cmovbe", Gv, Ev, XX }, - { "cmova", Gv, Ev, XX }, + { "cmovo", Gv, Ev, XX }, + { "cmovno", Gv, Ev, XX }, + { "cmovb", Gv, Ev, XX }, + { "cmovae", Gv, Ev, XX }, + { "cmove", Gv, Ev, XX }, + { "cmovne", Gv, Ev, XX }, + { "cmovbe", Gv, Ev, XX }, + { "cmova", Gv, Ev, XX }, /* 48 */ - { "cmovs", Gv, Ev, XX }, - { "cmovns", Gv, Ev, XX }, - { "cmovp", Gv, Ev, XX }, - { "cmovnp", Gv, Ev, XX }, - { "cmovl", Gv, Ev, XX }, - { "cmovge", Gv, Ev, XX }, - { "cmovle", Gv, Ev, XX }, - { "cmovg", Gv, Ev, XX }, + { "cmovs", Gv, Ev, XX }, + { "cmovns", Gv, Ev, XX }, + { "cmovp", Gv, Ev, XX }, + { "cmovnp", Gv, Ev, XX }, + { "cmovl", Gv, Ev, XX }, + { "cmovge", Gv, Ev, XX }, + { "cmovle", Gv, Ev, XX }, + { "cmovg", Gv, Ev, XX }, /* 50 */ - { "movmskpX", Gd, XS, XX }, + { "movmskpX", Gd, XS, XX }, { PREGRP13 }, { PREGRP12 }, { PREGRP11 }, - { "andpX", XM, EX, XX }, - { "andnpX", XM, EX, XX }, - { "orpX", XM, EX, XX }, - { "xorpX", XM, EX, XX }, + { "andpX", XM, EX, XX }, + { "andnpX", XM, EX, XX }, + { "orpX", XM, EX, XX }, + { "xorpX", XM, EX, XX }, /* 58 */ { PREGRP0 }, { PREGRP10 }, @@ -2025,185 +864,185 @@ static const struct dis386 dis386_twobyte_intel[] = { { PREGRP5 }, { PREGRP6 }, /* 60 */ - { "punpcklbw", MX, EM, XX }, - { "punpcklwd", MX, EM, XX }, - { "punpckldq", MX, EM, XX }, - { "packsswb", MX, EM, XX }, - { "pcmpgtb", MX, EM, XX }, - { "pcmpgtw", MX, EM, XX }, - { "pcmpgtd", MX, EM, XX }, - { "packuswb", MX, EM, XX }, + { "punpcklbw", MX, EM, XX }, + { "punpcklwd", MX, EM, XX }, + { "punpckldq", MX, EM, XX }, + { "packsswb", MX, EM, XX }, + { "pcmpgtb", MX, EM, XX }, + { "pcmpgtw", MX, EM, XX }, + { "pcmpgtd", MX, EM, XX }, + { "packuswb", MX, EM, XX }, /* 68 */ - { "punpckhbw", MX, EM, XX }, - { "punpckhwd", MX, EM, XX }, - { "punpckhdq", MX, EM, XX }, - { "packssdw", MX, EM, XX }, + { "punpckhbw", MX, EM, XX }, + { "punpckhwd", MX, EM, XX }, + { "punpckhdq", MX, EM, XX }, + { "packssdw", MX, EM, XX }, { PREGRP26 }, { PREGRP24 }, - { "movd", MX, Ed, XX }, + { "movd", MX, Ed, XX }, { PREGRP19 }, /* 70 */ { PREGRP22 }, { GRP10 }, { GRP11 }, { GRP12 }, - { "pcmpeqb", MX, EM, XX }, - { "pcmpeqw", MX, EM, XX }, - { "pcmpeqd", MX, EM, XX }, - { "emms", XX, XX, XX }, + { "pcmpeqb", MX, EM, XX }, + { "pcmpeqw", MX, EM, XX }, + { "pcmpeqd", MX, EM, XX }, + { "emms", XX, XX, XX }, /* 78 */ - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, { PREGRP23 }, { PREGRP20 }, /* 80 */ - { "jo", Jv, XX, XX }, - { "jno", Jv, XX, XX }, - { "jb", Jv, XX, XX }, - { "jae", Jv, XX, XX }, - { "je", Jv, XX, XX }, - { "jne", Jv, XX, XX }, - { "jbe", Jv, XX, XX }, - { "ja", Jv, XX, XX }, + { "joH", Jv, XX, cond_jump_flag }, + { "jnoH", Jv, XX, cond_jump_flag }, + { "jbH", Jv, XX, cond_jump_flag }, + { "jaeH", Jv, XX, cond_jump_flag }, + { "jeH", Jv, XX, cond_jump_flag }, + { "jneH", Jv, XX, cond_jump_flag }, + { "jbeH", Jv, XX, cond_jump_flag }, + { "jaH", Jv, XX, cond_jump_flag }, /* 88 */ - { "js", Jv, XX, XX }, - { "jns", Jv, XX, XX }, - { "jp", Jv, XX, XX }, - { "jnp", Jv, XX, XX }, - { "jl", Jv, XX, XX }, - { "jge", Jv, XX, XX }, - { "jle", Jv, XX, XX }, - { "jg", Jv, XX, XX }, + { "jsH", Jv, XX, cond_jump_flag }, + { "jnsH", Jv, XX, cond_jump_flag }, + { "jpH", Jv, XX, cond_jump_flag }, + { "jnpH", Jv, XX, cond_jump_flag }, + { "jlH", Jv, XX, cond_jump_flag }, + { "jgeH", Jv, XX, cond_jump_flag }, + { "jleH", Jv, XX, cond_jump_flag }, + { "jgH", Jv, XX, cond_jump_flag }, /* 90 */ - { "seto", Eb, XX, XX }, - { "setno", Eb, XX, XX }, - { "setb", Eb, XX, XX }, - { "setae", Eb, XX, XX }, - { "sete", Eb, XX, XX }, - { "setne", Eb, XX, XX }, - { "setbe", Eb, XX, XX }, - { "seta", Eb, XX, XX }, + { "seto", Eb, XX, XX }, + { "setno", Eb, XX, XX }, + { "setb", Eb, XX, XX }, + { "setae", Eb, XX, XX }, + { "sete", Eb, XX, XX }, + { "setne", Eb, XX, XX }, + { "setbe", Eb, XX, XX }, + { "seta", Eb, XX, XX }, /* 98 */ - { "sets", Eb, XX, XX }, - { "setns", Eb, XX, XX }, - { "setp", Eb, XX, XX }, - { "setnp", Eb, XX, XX }, - { "setl", Eb, XX, XX }, - { "setge", Eb, XX, XX }, - { "setle", Eb, XX, XX }, - { "setg", Eb, XX, XX }, + { "sets", Eb, XX, XX }, + { "setns", Eb, XX, XX }, + { "setp", Eb, XX, XX }, + { "setnp", Eb, XX, XX }, + { "setl", Eb, XX, XX }, + { "setge", Eb, XX, XX }, + { "setle", Eb, XX, XX }, + { "setg", Eb, XX, XX }, /* a0 */ - { "push", fs, XX, XX }, - { "pop", fs, XX, XX }, - { "cpuid", XX, XX, XX }, - { "bt", Ev, Gv, XX }, - { "shld", Ev, Gv, Ib }, - { "shld", Ev, Gv, CL }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, + { "pushT", fs, XX, XX }, + { "popT", fs, XX, XX }, + { "cpuid", XX, XX, XX }, + { "btS", Ev, Gv, XX }, + { "shldS", Ev, Gv, Ib }, + { "shldS", Ev, Gv, CL }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, /* a8 */ - { "push", gs, XX, XX }, - { "pop", gs, XX, XX }, - { "rsm" , XX, XX, XX}, - { "bts", Ev, Gv, XX }, - { "shrd", Ev, Gv, Ib }, - { "shrd", Ev, Gv, CL }, + { "pushT", gs, XX, XX }, + { "popT", gs, XX, XX }, + { "rsm", XX, XX, XX }, + { "btsS", Ev, Gv, XX }, + { "shrdS", Ev, Gv, Ib }, + { "shrdS", Ev, Gv, CL }, { GRP13 }, - { "imul", Gv, Ev, XX }, + { "imulS", Gv, Ev, XX }, /* b0 */ - { "cmpxchg", Eb, Gb, XX }, - { "cmpxchg", Ev, Gv, XX }, - { "lss", Gv, Mp, XX }, - { "btr", Ev, Gv, XX }, - { "lfs", Gv, Mp, XX }, - { "lgs", Gv, Mp, XX }, - { "movzx", Gv, Eb, XX }, - { "movzx", Gv, Ew, XX }, + { "cmpxchgB", Eb, Gb, XX }, + { "cmpxchgS", Ev, Gv, XX }, + { "lssS", Gv, Mp, XX }, + { "btrS", Ev, Gv, XX }, + { "lfsS", Gv, Mp, XX }, + { "lgsS", Gv, Mp, XX }, + { "movz{bR|x|bR|x}", Gv, Eb, XX }, + { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */ /* b8 */ - { "(bad)", XX, XX, XX }, - { "ud2b", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "ud2b", XX, XX, XX }, { GRP8 }, - { "btc", Ev, Gv, XX }, - { "bsf", Gv, Ev, XX }, - { "bsr", Gv, Ev, XX }, - { "movsx", Gv, Eb, XX }, - { "movsx", Gv, Ew, XX }, + { "btcS", Ev, Gv, XX }, + { "bsfS", Gv, Ev, XX }, + { "bsrS", Gv, Ev, XX }, + { "movs{bR|x|bR|x}", Gv, Eb, XX }, + { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */ /* c0 */ - { "xadd", Eb, Gb, XX }, - { "xadd", Ev, Gv, XX }, + { "xaddB", Eb, Gb, XX }, + { "xaddS", Ev, Gv, XX }, { PREGRP1 }, - { "movnti", Ev, Gv, XX }, - { "pinsrw", MX, Ed, Ib }, - { "pextrw", Gd, MS, Ib }, - { "shufpX", XM, EX, Ib }, + { "movntiS", Ev, Gv, XX }, + { "pinsrw", MX, Ed, Ib }, + { "pextrw", Gd, MS, Ib }, + { "shufpX", XM, EX, Ib }, { GRP9 }, /* c8 */ - { "bswap", RMeAX, XX, XX }, /* bswap doesn't support 16 bit regs */ - { "bswap", RMeCX, XX, XX }, - { "bswap", RMeDX, XX, XX }, - { "bswap", RMeBX, XX, XX }, - { "bswap", RMeSP, XX, XX }, - { "bswap", RMeBP, XX, XX }, - { "bswap", RMeSI, XX, XX }, - { "bswap", RMeDI, XX, XX }, + { "bswap", RMeAX, XX, XX }, + { "bswap", RMeCX, XX, XX }, + { "bswap", RMeDX, XX, XX }, + { "bswap", RMeBX, XX, XX }, + { "bswap", RMeSP, XX, XX }, + { "bswap", RMeBP, XX, XX }, + { "bswap", RMeSI, XX, XX }, + { "bswap", RMeDI, XX, XX }, /* d0 */ - { "(bad)", XX, XX, XX }, - { "psrlw", MX, EM, XX }, - { "psrld", MX, EM, XX }, - { "psrlq", MX, EM, XX }, - { "paddq", MX, EM, XX }, - { "pmullw", MX, EM, XX }, + { "(bad)", XX, XX, XX }, + { "psrlw", MX, EM, XX }, + { "psrld", MX, EM, XX }, + { "psrlq", MX, EM, XX }, + { "paddq", MX, EM, XX }, + { "pmullw", MX, EM, XX }, { PREGRP21 }, - { "pmovmskb", Gd, MS, XX }, + { "pmovmskb", Gd, MS, XX }, /* d8 */ - { "psubusb", MX, EM, XX }, - { "psubusw", MX, EM, XX }, - { "pminub", MX, EM, XX }, - { "pand", MX, EM, XX }, - { "paddusb", MX, EM, XX }, - { "paddusw", MX, EM, XX }, - { "pmaxub", MX, EM, XX }, - { "pandn", MX, EM, XX }, + { "psubusb", MX, EM, XX }, + { "psubusw", MX, EM, XX }, + { "pminub", MX, EM, XX }, + { "pand", MX, EM, XX }, + { "paddusb", MX, EM, XX }, + { "paddusw", MX, EM, XX }, + { "pmaxub", MX, EM, XX }, + { "pandn", MX, EM, XX }, /* e0 */ - { "pavgb", MX, EM, XX }, - { "psraw", MX, EM, XX }, - { "psrad", MX, EM, XX }, - { "pavgw", MX, EM, XX }, - { "pmulhuw", MX, EM, XX }, - { "pmulhw", MX, EM, XX }, + { "pavgb", MX, EM, XX }, + { "psraw", MX, EM, XX }, + { "psrad", MX, EM, XX }, + { "pavgw", MX, EM, XX }, + { "pmulhuw", MX, EM, XX }, + { "pmulhw", MX, EM, XX }, { PREGRP15 }, { PREGRP25 }, /* e8 */ - { "psubsb", MX, EM, XX }, - { "psubsw", MX, EM, XX }, - { "pminsw", MX, EM, XX }, - { "por", MX, EM, XX }, - { "paddsb", MX, EM, XX }, - { "paddsw", MX, EM, XX }, - { "pmaxsw", MX, EM, XX }, - { "pxor", MX, EM, XX }, + { "psubsb", MX, EM, XX }, + { "psubsw", MX, EM, XX }, + { "pminsw", MX, EM, XX }, + { "por", MX, EM, XX }, + { "paddsb", MX, EM, XX }, + { "paddsw", MX, EM, XX }, + { "pmaxsw", MX, EM, XX }, + { "pxor", MX, EM, XX }, /* f0 */ - { "(bad)", XX, XX, XX }, - { "psllw", MX, EM, XX }, - { "pslld", MX, EM, XX }, - { "psllq", MX, EM, XX }, - { "pmuludq", MX, EM, XX }, - { "pmaddwd", MX, EM, XX }, - { "psadbw", MX, EM, XX }, + { "(bad)", XX, XX, XX }, + { "psllw", MX, EM, XX }, + { "pslld", MX, EM, XX }, + { "psllq", MX, EM, XX }, + { "pmuludq", MX, EM, XX }, + { "pmaddwd", MX, EM, XX }, + { "psadbw", MX, EM, XX }, { PREGRP18 }, /* f8 */ - { "psubb", MX, EM, XX }, - { "psubw", MX, EM, XX }, - { "psubd", MX, EM, XX }, - { "psubq", MX, EM, XX }, - { "paddb", MX, EM, XX }, - { "paddw", MX, EM, XX }, - { "paddd", MX, EM, XX }, - { "(bad)", XX, XX, XX } + { "psubb", MX, EM, XX }, + { "psubw", MX, EM, XX }, + { "psubd", MX, EM, XX }, + { "psubq", MX, EM, XX }, + { "paddb", MX, EM, XX }, + { "paddw", MX, EM, XX }, + { "paddd", MX, EM, XX }, + { "(bad)", XX, XX, XX } }; static const unsigned char onebyte_has_modrm[256] = { @@ -2286,37 +1125,70 @@ static int mod; static int rm; static int reg; static unsigned char need_modrm; -static void oappend PARAMS ((const char *s)); /* If we are accessing mod/rm/reg without need_modrm set, then the values are stale. Hitting this abort likely indicates that you need to update onebyte_has_modrm or twobyte_has_modrm. */ #define MODRM_CHECK if (!need_modrm) abort () -static const char *names64[] = { - "%rax","%rcx","%rdx","%rbx", "%rsp","%rbp","%rsi","%rdi", +static const char **names64; +static const char **names32; +static const char **names16; +static const char **names8; +static const char **names8rex; +static const char **names_seg; +static const char **index16; + +static const char *intel_names64[] = { + "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" +}; +static const char *intel_names32[] = { + "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi", + "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d" +}; +static const char *intel_names16[] = { + "ax", "cx", "dx", "bx", "sp", "bp", "si", "di", + "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w" +}; +static const char *intel_names8[] = { + "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh", +}; +static const char *intel_names8rex[] = { + "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil", + "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b" +}; +static const char *intel_names_seg[] = { + "es", "cs", "ss", "ds", "fs", "gs", "?", "?", +}; +static const char *intel_index16[] = { + "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx" +}; + +static const char *att_names64[] = { + "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi", "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15" }; -static const char *names32[] = { - "%eax","%ecx","%edx","%ebx", "%esp","%ebp","%esi","%edi", +static const char *att_names32[] = { + "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi", "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d" }; -static const char *names16[] = { - "%ax","%cx","%dx","%bx","%sp","%bp","%si","%di", +static const char *att_names16[] = { + "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di", "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w" }; -static const char *names8[] = { - "%al","%cl","%dl","%bl","%ah","%ch","%dh","%bh", +static const char *att_names8[] = { + "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh", }; -static const char *names8rex[] = { - "%al","%cl","%dl","%bl","%spl", "%bpl", "%sil", "%dil", +static const char *att_names8rex[] = { + "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil", "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b" }; -static const char *names_seg[] = { - "%es","%cs","%ss","%ds","%fs","%gs","%?","%?", +static const char *att_names_seg[] = { + "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?", }; -static const char *index16[] = { - "%bx,%si","%bx,%di","%bp,%si","%bp,%di","%si","%di","%bp","%bx" +static const char *att_index16[] = { + "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx" }; static const struct dis386 grps[][8] = { @@ -2425,10 +1297,10 @@ static const struct dis386 grps[][8] = { { "(bad)", Eb, XX, XX }, { "notA", Eb, XX, XX }, { "negA", Eb, XX, XX }, - { "mulB", AL, Eb, XX }, - { "imulB", AL, Eb, XX }, - { "divB", AL, Eb, XX }, - { "idivB", AL, Eb, XX } + { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */ + { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */ + { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */ + { "idivA", Eb, XX, XX } /* and idiv for consistency. */ }, /* GRP3S */ { @@ -2436,10 +1308,10 @@ static const struct dis386 grps[][8] = { { "(bad)", XX, XX, XX }, { "notQ", Ev, XX, XX }, { "negQ", Ev, XX, XX }, - { "mulS", eAX, Ev, XX }, - { "imulS", eAX, Ev, XX }, - { "divS", eAX, Ev, XX }, - { "idivS", eAX, Ev, XX }, + { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */ + { "imulQ", Ev, XX, XX }, + { "divQ", Ev, XX, XX }, + { "idivQ", Ev, XX, XX }, }, /* GRP4 */ { @@ -2456,11 +1328,11 @@ static const struct dis386 grps[][8] = { { { "incQ", Ev, XX, XX }, { "decQ", Ev, XX, XX }, - { "callI", indirEv, XX, XX }, - { "lcallI", indirEv, XX, XX }, - { "jmpI", indirEv, XX, XX }, - { "ljmpI", indirEv, XX, XX }, - { "pushT", Ev, XX, XX }, + { "callT", indirEv, XX, XX }, + { "lcallT", indirEv, XX, XX }, + { "jmpT", indirEv, XX, XX }, + { "ljmpT", indirEv, XX, XX }, + { "pushU", Ev, XX, XX }, { "(bad)", XX, XX, XX }, }, /* GRP6 */ @@ -2476,14 +1348,14 @@ static const struct dis386 grps[][8] = { }, /* GRP7 */ { - { "sgdt", Ew, XX, XX }, - { "sidt", Ew, XX, XX }, - { "lgdt", Ew, XX, XX }, - { "lidt", Ew, XX, XX }, - { "smsw", Ew, XX, XX }, - { "(bad)", XX, XX, XX }, - { "lmsw", Ew, XX, XX }, - { "invlpg", Ew, XX, XX }, + { "sgdtQ", M, XX, XX }, + { "sidtQ", M, XX, XX }, + { "lgdtQ", M, XX, XX }, + { "lidtQ", M, XX, XX }, + { "smsw", Ew, XX, XX }, + { "(bad)", XX, XX, XX }, + { "lmsw", Ew, XX, XX }, + { "invlpg", Ew, XX, XX }, }, /* GRP8 */ { @@ -2550,7 +1422,7 @@ static const struct dis386 grps[][8] = { { "lfence", None, XX, XX }, { "mfence", None, XX, XX }, { "sfence", None, XX, XX }, - /* FIXME: the sfence with memory operand is clflush! */ + /* FIXME: the sfence with memory operand is clflush! */ }, /* GRP14 */ { @@ -2574,7 +1446,6 @@ static const struct dis386 grps[][8] = { { "(bad)", XX, XX, XX }, { "(bad)", XX, XX, XX }, } - }; static const struct dis386 prefix_user_table[][4] = { @@ -2587,7 +1458,7 @@ static const struct dis386 prefix_user_table[][4] = { }, /* PREGRP1 */ { - { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX */ + { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */ { "", XM, EX, OPSIMD }, { "", XM, EX, OPSIMD }, { "", XM, EX, OPSIMD }, @@ -2769,6 +1640,13 @@ static const struct dis386 prefix_user_table[][4] = { }, }; +static const struct dis386 x86_64_table[][2] = { + { + { "arpl", Ew, Gw, XX }, + { "movs{||lq|xd}", Gv, Ed, XX }, + }, +}; + #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>") static void @@ -2940,10 +1818,9 @@ prefix_name (pref, sizeflag) static char op1out[100], op2out[100], op3out[100]; static int op_ad, op_index[3]; -static unsigned int op_address[3]; -static unsigned int op_riprel[3]; +static bfd_vma op_address[3]; +static bfd_vma op_riprel[3]; static bfd_vma start_pc; - /* * On the 386's of 1988, the maximum length of an instruction is 15 bytes. @@ -2954,9 +1831,6 @@ static bfd_vma start_pc; * The function returns the length of this instruction in bytes. */ -static int print_insn_i386 - PARAMS ((bfd_vma pc, disassemble_info *info)); - static char intel_syntax; static char open_char; static char close_char; @@ -2969,6 +1843,13 @@ print_insn_i386_att (pc, info) disassemble_info *info; { intel_syntax = 0; + names64 = att_names64; + names32 = att_names32; + names16 = att_names16; + names8 = att_names8; + names8rex = att_names8rex; + names_seg = att_names_seg; + index16 = att_index16; open_char = '('; close_char = ')'; separator_char = ','; @@ -2983,6 +1864,13 @@ print_insn_i386_intel (pc, info) disassemble_info *info; { intel_syntax = 1; + names64 = intel_names64; + names32 = intel_names32; + names16 = intel_names16; + names8 = intel_names8; + names8rex = intel_names8rex; + names_seg = intel_names_seg; + index16 = intel_index16; open_char = '['; close_char = ']'; separator_char = '+'; @@ -3015,7 +1903,7 @@ print_insn_i386 (pc, info) || info->mach == bfd_mach_x86_64 || info->mach == bfd_mach_i386_i386_intel_syntax || info->mach == bfd_mach_x86_64_intel_syntax) - sizeflag = AFLAG|DFLAG; + sizeflag = AFLAG | DFLAG; else if (info->mach == bfd_mach_i386_i8086) sizeflag = 0; else @@ -3092,25 +1980,13 @@ print_insn_i386 (pc, info) if (*codep == 0x0f) { FETCH_DATA (info, codep + 2); - if (intel_syntax) - dp = &dis386_twobyte_intel[*++codep]; - else - dp = &dis386_twobyte_att[*++codep]; + dp = &dis386_twobyte[*++codep]; need_modrm = twobyte_has_modrm[*codep]; uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep]; } else { - if (intel_syntax) - if (mode_64bit) - dp = &dis386_64_intel[*codep]; - else - dp = &dis386_intel[*codep]; - else - if (mode_64bit) - dp = &disx86_64_att[*codep]; - else - dp = &dis386_att[*codep]; + dp = &dis386[*codep]; need_modrm = onebyte_has_modrm[*codep]; uses_SSE_prefix = 0; } @@ -3135,7 +2011,7 @@ print_insn_i386 (pc, info) if (prefixes & PREFIX_ADDR) { sizeflag ^= AFLAG; - if (dp->bytemode2 != loop_jcxz_mode) + if (dp->bytemode3 != loop_jcxz_mode || intel_syntax) { if (sizeflag & AFLAG) oappend ("addr32 "); @@ -3148,7 +2024,9 @@ print_insn_i386 (pc, info) if (!uses_SSE_prefix && (prefixes & PREFIX_DATA)) { sizeflag ^= DFLAG; - if (dp->bytemode2 == cond_jump_mode && dp->bytemode1 == v_mode) + if (dp->bytemode3 == cond_jump_mode + && dp->bytemode1 == v_mode + && !intel_syntax) { if (sizeflag & DFLAG) oappend ("data32 "); @@ -3158,20 +2036,6 @@ print_insn_i386 (pc, info) } } - if (dp->bytemode2 == cond_jump_mode || dp->bytemode2 == loop_jcxz_mode) - { - if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS) - { - oappend ("cs "); - used_prefixes |= PREFIX_CS; - } - if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS) - { - oappend ("ds "); - used_prefixes |= PREFIX_DS; - } - } - if (need_modrm) { FETCH_DATA (info, codep + 1); @@ -3189,52 +2053,59 @@ print_insn_i386 (pc, info) int index; if (dp->name == NULL) { - switch(dp->bytemode2) + switch (dp->bytemode1) { - case USE_GROUPS: - dp = &grps[dp->bytemode1][reg]; - break; - case USE_PREFIX_USER_TABLE: - index = 0; - used_prefixes |= (prefixes & PREFIX_REPZ); - if (prefixes & PREFIX_REPZ) - index = 1; - else - { - used_prefixes |= (prefixes & PREFIX_DATA); - if (prefixes & PREFIX_DATA) - index = 2; - else - { - used_prefixes |= (prefixes & PREFIX_REPNZ); - if (prefixes & PREFIX_REPNZ) - index = 3; - } - } - dp = &prefix_user_table[dp->bytemode1][index]; - break; - default: - oappend (INTERNAL_DISASSEMBLER_ERROR); - break; - } - } - - putop (dp->name, sizeflag); + case USE_GROUPS: + dp = &grps[dp->bytemode2][reg]; + break; + + case USE_PREFIX_USER_TABLE: + index = 0; + used_prefixes |= (prefixes & PREFIX_REPZ); + if (prefixes & PREFIX_REPZ) + index = 1; + else + { + used_prefixes |= (prefixes & PREFIX_DATA); + if (prefixes & PREFIX_DATA) + index = 2; + else + { + used_prefixes |= (prefixes & PREFIX_REPNZ); + if (prefixes & PREFIX_REPNZ) + index = 3; + } + } + dp = &prefix_user_table[dp->bytemode2][index]; + break; - obufp = op1out; - op_ad = 2; - if (dp->op1) - (*dp->op1)(dp->bytemode1, sizeflag); + case X86_64_SPECIAL: + dp = &x86_64_table[dp->bytemode2][mode_64bit]; + break; - obufp = op2out; - op_ad = 1; - if (dp->op2) - (*dp->op2)(dp->bytemode2, sizeflag); + default: + oappend (INTERNAL_DISASSEMBLER_ERROR); + break; + } + } - obufp = op3out; - op_ad = 0; - if (dp->op3) - (*dp->op3)(dp->bytemode3, sizeflag); + if (putop (dp->name, sizeflag) == 0) + { + obufp = op1out; + op_ad = 2; + if (dp->op1) + (*dp->op1) (dp->bytemode1, sizeflag); + + obufp = op2out; + op_ad = 1; + if (dp->op2) + (*dp->op2) (dp->bytemode2, sizeflag); + + obufp = op3out; + op_ad = 0; + if (dp->op3) + (*dp->op3) (dp->bytemode3, sizeflag); + } } /* See if any prefixes were not used. If so, print the first one @@ -3321,132 +2192,57 @@ print_insn_i386 (pc, info) return codep - inbuf; } -static const char *float_mem_att[] = { - /* d8 */ - "fadds", - "fmuls", - "fcoms", - "fcomps", - "fsubs", - "fsubrs", - "fdivs", - "fdivrs", - /* d9 */ - "flds", - "(bad)", - "fsts", - "fstps", - "fldenv", - "fldcw", - "fNstenv", - "fNstcw", - /* da */ - "fiaddl", - "fimull", - "ficoml", - "ficompl", - "fisubl", - "fisubrl", - "fidivl", - "fidivrl", - /* db */ - "fildl", - "(bad)", - "fistl", - "fistpl", - "(bad)", - "fldt", - "(bad)", - "fstpt", - /* dc */ - "faddl", - "fmull", - "fcoml", - "fcompl", - "fsubl", - "fsubrl", - "fdivl", - "fdivrl", - /* dd */ - "fldl", - "(bad)", - "fstl", - "fstpl", - "frstor", - "(bad)", - "fNsave", - "fNstsw", - /* de */ - "fiadd", - "fimul", - "ficom", - "ficomp", - "fisub", - "fisubr", - "fidiv", - "fidivr", - /* df */ - "fild", - "(bad)", - "fist", - "fistp", - "fbld", - "fildll", - "fbstp", - "fistpll", -}; - -static const char *float_mem_intel[] = { +static const char *float_mem[] = { /* d8 */ - "fadd", - "fmul", - "fcom", - "fcomp", - "fsub", - "fsubr", - "fdiv", - "fdivr", + "fadd{s||s|}", + "fmul{s||s|}", + "fcom{s||s|}", + "fcomp{s||s|}", + "fsub{s||s|}", + "fsubr{s||s|}", + "fdiv{s||s|}", + "fdivr{s||s|}", /* d9 */ - "fld", + "fld{s||s|}", "(bad)", - "fst", - "fstp", + "fst{s||s|}", + "fstp{s||s|}", "fldenv", "fldcw", "fNstenv", "fNstcw", /* da */ - "fiadd", - "fimul", - "ficom", - "ficomp", - "fisub", - "fisubr", - "fidiv", - "fidivr", + "fiadd{l||l|}", + "fimul{l||l|}", + "ficom{l||l|}", + "ficomp{l||l|}", + "fisub{l||l|}", + "fisubr{l||l|}", + "fidiv{l||l|}", + "fidivr{l||l|}", /* db */ - "fild", + "fild{l||l|}", "(bad)", - "fist", - "fistp", + "fist{l||l|}", + "fistp{l||l|}", "(bad)", - "fld", + "fld{t||t|}", "(bad)", - "fstp", + "fstp{t||t|}", /* dc */ - "fadd", - "fmul", - "fcom", - "fcomp", - "fsub", - "fsubr", - "fdiv", - "fdivr", + "fadd{l||l|}", + "fmul{l||l|}", + "fcom{l||l|}", + "fcomp{l||l|}", + "fsub{l||l|}", + "fsubr{l||l|}", + "fdiv{l||l|}", + "fdivr{l||l|}", /* dd */ - "fld", + "fld{l||l|}", "(bad)", - "fst", - "fstp", + "fst{l||l|}", + "fstp{l||l|}", "frstor", "(bad)", "fNsave", @@ -3466,7 +2262,7 @@ static const char *float_mem_intel[] = { "fist", "fistp", "fbld", - "fild", + "fild{ll||ll|}", "fbstp", "fistpll", }; @@ -3589,7 +2385,6 @@ static const struct dis386 float_reg[][8] = { }, }; - static char *fgrps[][8] = { /* d9_2 0 */ { @@ -3649,10 +2444,7 @@ dofloat (sizeflag) if (mod != 3) { - if (intel_syntax) - putop (float_mem_intel[(floatop - 0xd8 ) * 8 + reg], sizeflag); - else - putop (float_mem_att[(floatop - 0xd8 ) * 8 + reg], sizeflag); + putop (float_mem[(floatop - 0xd8) * 8 + reg], sizeflag); obufp = op1out; if (floatop == 0xdb) OP_E (x_mode, sizeflag); @@ -3662,7 +2454,7 @@ dofloat (sizeflag) OP_E (v_mode, sizeflag); return; } - /* skip mod/rm byte */ + /* Skip mod/rm byte. */ MODRM_CHECK; codep++; @@ -3671,7 +2463,7 @@ dofloat (sizeflag) { putop (fgrps[dp->bytemode1][rm], sizeflag); - /* instruction fnstsw is only one with strange arg */ + /* Instruction fnstsw is only one with strange arg. */ if (floatop == 0xdf && codep[-1] == 0xe0) strcpy (op1out, names16[0]); } @@ -3681,40 +2473,38 @@ dofloat (sizeflag) obufp = op1out; if (dp->op1) - (*dp->op1)(dp->bytemode1, sizeflag); + (*dp->op1) (dp->bytemode1, sizeflag); obufp = op2out; if (dp->op2) - (*dp->op2)(dp->bytemode2, sizeflag); + (*dp->op2) (dp->bytemode2, sizeflag); } } -/* ARGSUSED */ static void -OP_ST (ignore, sizeflag) - int ignore ATTRIBUTE_UNUSED; +OP_ST (bytemode, sizeflag) + int bytemode ATTRIBUTE_UNUSED; int sizeflag ATTRIBUTE_UNUSED; { oappend ("%st"); } -/* ARGSUSED */ static void -OP_STi (ignore, sizeflag) - int ignore ATTRIBUTE_UNUSED; +OP_STi (bytemode, sizeflag) + int bytemode ATTRIBUTE_UNUSED; int sizeflag ATTRIBUTE_UNUSED; { sprintf (scratchbuf, "%%st(%d)", rm); - oappend (scratchbuf); + oappend (scratchbuf + intel_syntax); } - -/* capital letters in template are macros */ -static void +/* Capital letters in template are macros. */ +static int putop (template, sizeflag) const char *template; int sizeflag; { const char *p; + int alt; for (p = template; *p; p++) { @@ -3723,6 +2513,38 @@ putop (template, sizeflag) default: *obufp++ = *p; break; + case '{': + alt = 0; + if (intel_syntax) + alt += 1; + if (mode_64bit) + alt += 2; + while (alt != 0) + { + while (*++p != '|') + { + if (*p == '}') + { + /* Alternative not valid. */ + strcpy (obuf, "(bad)"); + obufp = obuf + 5; + return 1; + } + else if (*p == '\0') + abort (); + } + alt--; + } + break; + case '|': + while (*++p != '}') + { + if (*p == '\0') + abort (); + } + break; + case '}': + break; case 'A': if (intel_syntax) break; @@ -3747,6 +2569,8 @@ putop (template, sizeflag) used_prefixes |= (prefixes & PREFIX_ADDR); break; case 'F': + if (intel_syntax) + break; if ((prefixes & PREFIX_ADDR) #ifdef SUFFIX_ALWAYS || (sizeflag & SUFFIX_ALWAYS) @@ -3760,25 +2584,19 @@ putop (template, sizeflag) used_prefixes |= (prefixes & PREFIX_ADDR); } break; - case 'I': + case 'H': if (intel_syntax) break; - if (mode_64bit) - *obufp++ = 'q'; - else + if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS + || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS) { - if ((prefixes & PREFIX_DATA) -#ifdef SUFFIX_ALWAYS - || (sizeflag & SUFFIX_ALWAYS) -#endif - ) - { - if (sizeflag & DFLAG) - *obufp++ = 'l'; - else - *obufp++ = 'w'; - used_prefixes |= (prefixes & PREFIX_DATA); - } + used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS); + *obufp++ = ','; + *obufp++ = 'p'; + if (prefixes & PREFIX_DS) + *obufp++ = 't'; + else + *obufp++ = 'n'; } break; case 'L': @@ -3798,10 +2616,19 @@ putop (template, sizeflag) case 'O': USED_REX (REX_MODE64); if (rex & REX_MODE64) - *obufp++ = 'o'; + *obufp++ = 'o'; else *obufp++ = 'd'; break; + case 'T': + if (intel_syntax) + break; + if (mode_64bit) + { + *obufp++ = 'q'; + break; + } + /* Fall through. */ case 'P': if (intel_syntax) break; @@ -3825,6 +2652,15 @@ putop (template, sizeflag) } } break; + case 'U': + if (intel_syntax) + break; + if (mode_64bit) + { + *obufp++ = 'q'; + break; + } + /* Fall through. */ case 'Q': if (intel_syntax) break; @@ -3898,24 +2734,6 @@ putop (template, sizeflag) } #endif break; - case 'T': - if (intel_syntax) - break; - if (mode_64bit) - *obufp++ = 'q'; - else if (mod != 3 -#ifdef SUFFIX_ALWAYS - || (sizeflag & SUFFIX_ALWAYS) -#endif - ) - { - if (sizeflag & DFLAG) - *obufp++ = 'l'; - else - *obufp++ = 'w'; - used_prefixes |= (prefixes & PREFIX_DATA); - } - break; case 'X': if (prefixes & PREFIX_DATA) *obufp++ = 'd'; @@ -3965,6 +2783,7 @@ putop (template, sizeflag) } } *obufp = 0; + return 0; } static void @@ -3980,33 +2799,33 @@ append_seg () { if (prefixes & PREFIX_CS) { - oappend ("%cs:"); used_prefixes |= PREFIX_CS; + oappend ("%cs:" + intel_syntax); } if (prefixes & PREFIX_DS) { - oappend ("%ds:"); used_prefixes |= PREFIX_DS; + oappend ("%ds:" + intel_syntax); } if (prefixes & PREFIX_SS) { - oappend ("%ss:"); used_prefixes |= PREFIX_SS; + oappend ("%ss:" + intel_syntax); } if (prefixes & PREFIX_ES) { - oappend ("%es:"); used_prefixes |= PREFIX_ES; + oappend ("%es:" + intel_syntax); } if (prefixes & PREFIX_FS) { - oappend ("%fs:"); used_prefixes |= PREFIX_FS; + oappend ("%fs:" + intel_syntax); } if (prefixes & PREFIX_GS) { - oappend ("%gs:"); used_prefixes |= PREFIX_GS; + oappend ("%gs:" + intel_syntax); } } @@ -4035,7 +2854,7 @@ print_operand_value (buf, hex, disp) buf[0] = '0'; buf[1] = 'x'; sprintf_vma (tmp, disp); - for (i = 0; tmp[i] == '0' && tmp[i+1]; i++); + for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++); strcpy (buf + 2, tmp + i); } else @@ -4047,7 +2866,7 @@ print_operand_value (buf, hex, disp) { *(buf++) = '-'; v = -disp; - /* Check for possible overflow on 0x8000000000000000 */ + /* Check for possible overflow on 0x8000000000000000. */ if (v < 0) { strcpy (buf, "9223372036854775808"); @@ -4064,7 +2883,7 @@ print_operand_value (buf, hex, disp) tmp[29] = 0; while (v) { - tmp[28-i] = (v % 10) + '0'; + tmp[28 - i] = (v % 10) + '0'; v /= 10; i++; } @@ -4092,7 +2911,7 @@ OP_E (bytemode, sizeflag) if (rex & REX_EXTZ) add += 8; - /* skip mod/rm byte */ + /* Skip mod/rm byte. */ MODRM_CHECK; codep++; @@ -4133,10 +2952,10 @@ OP_E (bytemode, sizeflag) used_prefixes |= (prefixes & PREFIX_DATA); break; case 0: - if ( !(codep[-2] == 0xAE && codep[-1] == 0xF8 /* sfence */) + if (!(codep[-2] == 0xAE && codep[-1] == 0xF8 /* sfence */) && !(codep[-2] == 0xAE && codep[-1] == 0xF0 /* mfence */) && !(codep[-2] == 0xAE && codep[-1] == 0xe8 /* lfence */)) - BadOp(); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */ + BadOp (); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */ break; default: oappend (INTERNAL_DISASSEMBLER_ERROR); @@ -4261,10 +3080,12 @@ OP_E (bytemode, sizeflag) *obufp++ = separator_char; *obufp = '\0'; } - sprintf (scratchbuf, "%s", mode_64bit ? names64[index] : names32[index]); + sprintf (scratchbuf, "%s", + mode_64bit ? names64[index] : names32[index]); } else - sprintf (scratchbuf, ",%s", mode_64bit ? names64[index] : names32[index]); + sprintf (scratchbuf, ",%s", + mode_64bit ? names64[index] : names32[index]); oappend (scratchbuf); } if (!intel_syntax @@ -4282,9 +3103,15 @@ OP_E (bytemode, sizeflag) if (intel_syntax) if (mod != 0 || (base & 7) == 5) { - /* Don't print zero displacements */ + /* Don't print zero displacements. */ if (disp != 0) { + if ((bfd_signed_vma) disp > 0) + { + *obufp++ = '+'; + *obufp = '\0'; + } + print_operand_value (scratchbuf, 0, disp); oappend (scratchbuf); } @@ -4302,7 +3129,7 @@ OP_E (bytemode, sizeflag) ; else { - oappend (names_seg[3]); + oappend (names_seg[ds_reg - es_reg]); oappend (":"); } print_operand_value (scratchbuf, 1, disp); @@ -4399,23 +3226,24 @@ OP_G (bytemode, sizeflag) static bfd_vma get64 () { - unsigned int a = 0; - unsigned int b = 0; - bfd_vma x = 0; - + bfd_vma x; #ifdef BFD64 + unsigned int a; + unsigned int b; + FETCH_DATA (the_info, codep + 8); a = *codep++ & 0xff; a |= (*codep++ & 0xff) << 8; a |= (*codep++ & 0xff) << 16; a |= (*codep++ & 0xff) << 24; - b |= (*codep++ & 0xff); + b = *codep++ & 0xff; b |= (*codep++ & 0xff) << 8; b |= (*codep++ & 0xff) << 16; b |= (*codep++ & 0xff) << 24; x = a + ((bfd_vma) b << 32); #else - abort(); + abort (); + x = 0; #endif return x; } @@ -4462,12 +3290,21 @@ get16 () static void set_op (op, riprel) - unsigned int op; + bfd_vma op; int riprel; { op_index[op_ad] = op_ad; - op_address[op_ad] = op; - op_riprel[op_ad] = riprel; + if (mode_64bit) + { + op_address[op_ad] = op; + op_riprel[op_ad] = riprel; + } + else + { + /* Mask to get a 32-bit address. */ + op_address[op_ad] = op & 0xffffffff; + op_riprel[op_ad] = riprel & 0xffffffff; + } } static void @@ -4484,7 +3321,10 @@ OP_REG (code, sizeflag) switch (code) { case indir_dx_reg: - s = "(%dx)"; + if (intel_syntax) + s = "[dx]"; + else + s = "(%dx)"; break; case ax_reg: case cx_reg: case dx_reg: case bx_reg: case sp_reg: case bp_reg: case si_reg: case di_reg: @@ -4502,6 +3342,15 @@ OP_REG (code, sizeflag) else s = names8[code - al_reg]; break; + case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg: + case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg: + if (mode_64bit) + { + s = names64[code - rAX_reg + add]; + break; + } + code += eAX_reg - rAX_reg; + /* Fall through. */ case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: USED_REX (REX_MODE64); @@ -4513,10 +3362,6 @@ OP_REG (code, sizeflag) s = names16[code - eAX_reg + add]; used_prefixes |= (prefixes & PREFIX_DATA); break; - case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg: - case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg: - s = names64[code - rAX_reg + add]; - break; default: s = INTERNAL_DISASSEMBLER_ERROR; break; @@ -4534,7 +3379,10 @@ OP_IMREG (code, sizeflag) switch (code) { case indir_dx_reg: - s = "(%dx)"; + if (intel_syntax) + s = "[dx]"; + else + s = "(%dx)"; break; case ax_reg: case cx_reg: case dx_reg: case bx_reg: case sp_reg: case bp_reg: case si_reg: case di_reg: @@ -4586,8 +3434,12 @@ OP_I (bytemode, sizeflag) mask = 0xff; break; case q_mode: - op = get32s (); - break; + if (mode_64bit) + { + op = get32s (); + break; + } + /* Fall through. */ case v_mode: USED_REX (REX_MODE64); if (rex & REX_MODE64) @@ -4615,8 +3467,8 @@ OP_I (bytemode, sizeflag) op &= mask; scratchbuf[0] = '$'; - print_operand_value (scratchbuf + !intel_syntax, 1, op); - oappend (scratchbuf); + print_operand_value (scratchbuf + 1, 1, op); + oappend (scratchbuf + intel_syntax); scratchbuf[0] = '\0'; } @@ -4628,6 +3480,12 @@ OP_I64 (bytemode, sizeflag) bfd_signed_vma op; bfd_signed_vma mask = -1; + if (!mode_64bit) + { + OP_I (bytemode, sizeflag); + return; + } + switch (bytemode) { case b_mode: @@ -4662,8 +3520,8 @@ OP_I64 (bytemode, sizeflag) op &= mask; scratchbuf[0] = '$'; - print_operand_value (scratchbuf + !intel_syntax, 1, op); - oappend (scratchbuf); + print_operand_value (scratchbuf + 1, 1, op); + oappend (scratchbuf + intel_syntax); scratchbuf[0] = '\0'; } @@ -4696,7 +3554,7 @@ OP_sI (bytemode, sizeflag) else { mask = 0xffffffff; - op = get16(); + op = get16 (); if ((op & 0x8000) != 0) op -= 0x10000; } @@ -4715,7 +3573,7 @@ OP_sI (bytemode, sizeflag) scratchbuf[0] = '$'; print_operand_value (scratchbuf + 1, 1, op); - oappend (scratchbuf); + oappend (scratchbuf + intel_syntax); } static void @@ -4724,7 +3582,7 @@ OP_J (bytemode, sizeflag) int sizeflag; { bfd_vma disp; - int mask = -1; + bfd_vma mask = -1; switch (bytemode) { @@ -4740,7 +3598,7 @@ OP_J (bytemode, sizeflag) else { disp = get16 (); - /* for some reason, a data16 prefix on a jump instruction + /* For some reason, a data16 prefix on a jump instruction means that the pc is masked to 16 bits after the displacement is added! */ mask = 0xffff; @@ -4756,20 +3614,14 @@ OP_J (bytemode, sizeflag) oappend (scratchbuf); } -/* ARGSUSED */ static void OP_SEG (dummy, sizeflag) int dummy ATTRIBUTE_UNUSED; int sizeflag ATTRIBUTE_UNUSED; { - static char *sreg[] = { - "%es","%cs","%ss","%ds","%fs","%gs","%?","%?", - }; - - oappend (sreg[reg]); + oappend (names_seg[reg]); } -/* ARGSUSED */ static void OP_DIR (dummy, sizeflag) int dummy ATTRIBUTE_UNUSED; @@ -4788,14 +3640,16 @@ OP_DIR (dummy, sizeflag) seg = get16 (); } used_prefixes |= (prefixes & PREFIX_DATA); - sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset); + if (intel_syntax) + sprintf (scratchbuf, "0x%x,0x%x", seg, offset); + else + sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset); oappend (scratchbuf); } -/* ARGSUSED */ static void -OP_OFF (ignored, sizeflag) - int ignored ATTRIBUTE_UNUSED; +OP_OFF (bytemode, sizeflag) + int bytemode ATTRIBUTE_UNUSED; int sizeflag; { bfd_vma off; @@ -4812,31 +3666,37 @@ OP_OFF (ignored, sizeflag) if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS | PREFIX_ES | PREFIX_FS | PREFIX_GS))) { - oappend (names_seg[3]); + oappend (names_seg[ds_reg - es_reg]); oappend (":"); } } print_operand_value (scratchbuf, 1, off); oappend (scratchbuf); } -/* ARGSUSED */ + static void -OP_OFF64 (ignored, sizeflag) - int ignored ATTRIBUTE_UNUSED; +OP_OFF64 (bytemode, sizeflag) + int bytemode ATTRIBUTE_UNUSED; int sizeflag ATTRIBUTE_UNUSED; { bfd_vma off; + if (!mode_64bit) + { + OP_OFF (bytemode, sizeflag); + return; + } + append_seg (); - off = get64(); + off = get64 (); if (intel_syntax) { if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS | PREFIX_ES | PREFIX_FS | PREFIX_GS))) { - oappend (names_seg[3]); + oappend (names_seg[ds_reg - es_reg]); oappend (":"); } } @@ -4850,7 +3710,11 @@ ptr_reg (code, sizeflag) int sizeflag; { const char *s; - oappend ("("); + if (intel_syntax) + oappend ("["); + else + oappend ("("); + USED_REX (REX_MODE64); if (rex & REX_MODE64) s = names64[code - eAX_reg]; @@ -4859,7 +3723,10 @@ ptr_reg (code, sizeflag) else s = names16[code - eAX_reg]; oappend (s); - oappend (")"); + if (intel_syntax) + oappend ("]"); + else + oappend (")"); } static void @@ -4867,7 +3734,7 @@ OP_ESreg (code, sizeflag) int code; int sizeflag; { - oappend ("%es:"); + oappend ("%es:" + intel_syntax); ptr_reg (code, sizeflag); } @@ -4884,11 +3751,10 @@ OP_DSreg (code, sizeflag) | PREFIX_FS | PREFIX_GS)) == 0) prefixes |= PREFIX_DS; - append_seg(); + append_seg (); ptr_reg (code, sizeflag); } -/* ARGSUSED */ static void OP_C (dummy, sizeflag) int dummy ATTRIBUTE_UNUSED; @@ -4898,11 +3764,10 @@ OP_C (dummy, sizeflag) USED_REX (REX_EXTX); if (rex & REX_EXTX) add = 8; - sprintf (scratchbuf, "%%cr%d", reg+add); - oappend (scratchbuf); + sprintf (scratchbuf, "%%cr%d", reg + add); + oappend (scratchbuf + intel_syntax); } -/* ARGSUSED */ static void OP_D (dummy, sizeflag) int dummy ATTRIBUTE_UNUSED; @@ -4912,18 +3777,20 @@ OP_D (dummy, sizeflag) USED_REX (REX_EXTX); if (rex & REX_EXTX) add = 8; - sprintf (scratchbuf, "%%db%d", reg+add); + if (intel_syntax) + sprintf (scratchbuf, "db%d", reg + add); + else + sprintf (scratchbuf, "%%db%d", reg + add); oappend (scratchbuf); } -/* ARGSUSED */ static void OP_T (dummy, sizeflag) int dummy ATTRIBUTE_UNUSED; int sizeflag ATTRIBUTE_UNUSED; { sprintf (scratchbuf, "%%tr%d", reg); - oappend (scratchbuf); + oappend (scratchbuf + intel_syntax); } static void @@ -4934,12 +3801,12 @@ OP_Rd (bytemode, sizeflag) if (mod == 3) OP_E (bytemode, sizeflag); else - BadOp(); + BadOp (); } static void -OP_MMX (ignore, sizeflag) - int ignore ATTRIBUTE_UNUSED; +OP_MMX (bytemode, sizeflag) + int bytemode ATTRIBUTE_UNUSED; int sizeflag ATTRIBUTE_UNUSED; { int add = 0; @@ -4951,7 +3818,7 @@ OP_MMX (ignore, sizeflag) sprintf (scratchbuf, "%%xmm%d", reg + add); else sprintf (scratchbuf, "%%mm%d", reg + add); - oappend (scratchbuf); + oappend (scratchbuf + intel_syntax); } static void @@ -4964,7 +3831,7 @@ OP_XMM (bytemode, sizeflag) if (rex & REX_EXTX) add = 8; sprintf (scratchbuf, "%%xmm%d", reg + add); - oappend (scratchbuf); + oappend (scratchbuf + intel_syntax); } static void @@ -4982,7 +3849,7 @@ OP_EM (bytemode, sizeflag) if (rex & REX_EXTZ) add = 8; - /* skip mod/rm byte */ + /* Skip mod/rm byte. */ MODRM_CHECK; codep++; used_prefixes |= (prefixes & PREFIX_DATA); @@ -4990,7 +3857,7 @@ OP_EM (bytemode, sizeflag) sprintf (scratchbuf, "%%xmm%d", rm + add); else sprintf (scratchbuf, "%%mm%d", rm + add); - oappend (scratchbuf); + oappend (scratchbuf + intel_syntax); } static void @@ -5008,11 +3875,11 @@ OP_EX (bytemode, sizeflag) if (rex & REX_EXTZ) add = 8; - /* skip mod/rm byte */ + /* Skip mod/rm byte. */ MODRM_CHECK; codep++; sprintf (scratchbuf, "%%xmm%d", rm + add); - oappend (scratchbuf); + oappend (scratchbuf + intel_syntax); } static void @@ -5023,7 +3890,7 @@ OP_MS (bytemode, sizeflag) if (mod == 3) OP_EM (bytemode, sizeflag); else - BadOp(); + BadOp (); } static void @@ -5034,7 +3901,7 @@ OP_XS (bytemode, sizeflag) if (mod == 3) OP_EX (bytemode, sizeflag); else - BadOp(); + BadOp (); } static const char *Suffix3DNow[] = { @@ -5115,7 +3982,7 @@ OP_3DNowSuffix (bytemode, sizeflag) /* AMD 3DNow! instructions are specified by an opcode suffix in the place where an 8-bit immediate would normally go. ie. the last byte of the instruction. */ - obufp = obuf + strlen(obuf); + obufp = obuf + strlen (obuf); mnemonic = Suffix3DNow[*codep++ & 0xff]; if (mnemonic) oappend (mnemonic); @@ -5127,12 +3994,11 @@ OP_3DNowSuffix (bytemode, sizeflag) we have a bad opcode. This necessitates some cleaning up. */ op1out[0] = '\0'; op2out[0] = '\0'; - BadOp(); + BadOp (); } } - -static const char *simd_cmp_op [] = { +static const char *simd_cmp_op[] = { "eq", "lt", "le", @@ -5151,7 +4017,7 @@ OP_SIMD_Suffix (bytemode, sizeflag) unsigned int cmp_type; FETCH_DATA (the_info, codep + 1); - obufp = obuf + strlen(obuf); + obufp = obuf + strlen (obuf); cmp_type = *codep++ & 0xff; if (cmp_type < 8) { @@ -5181,7 +4047,7 @@ OP_SIMD_Suffix (bytemode, sizeflag) /* We have a bad extension byte. Clean up. */ op1out[0] = '\0'; op2out[0] = '\0'; - BadOp(); + BadOp (); } } @@ -5194,17 +4060,19 @@ SIMD_Fixup (extrachar, sizeflag) forms of these instructions. */ if (mod == 3) { - char *p = obuf + strlen(obuf); - *(p+1) = '\0'; - *p = *(p-1); - *(p-1) = *(p-2); - *(p-2) = *(p-3); - *(p-3) = extrachar; + char *p = obuf + strlen (obuf); + *(p + 1) = '\0'; + *p = *(p - 1); + *(p - 1) = *(p - 2); + *(p - 2) = *(p - 3); + *(p - 3) = extrachar; } } -static void BadOp (void) +static void +BadOp (void) { - codep = insn_codep + 1; /* throw away prefixes and 1st. opcode byte */ + /* Throw away prefixes and 1st. opcode byte. */ + codep = insn_codep + 1; oappend ("(bad)"); } diff --git a/contrib/binutils/opcodes/ia64-asmtab.c b/contrib/binutils/opcodes/ia64-asmtab.c index 03ec73c6c469..45f60eba5808 100644 --- a/contrib/binutils/opcodes/ia64-asmtab.c +++ b/contrib/binutils/opcodes/ia64-asmtab.c @@ -4185,403 +4185,403 @@ completer_table[] = { static const struct ia64_main_table main_table[] = { - { 5, 1, 1, 0x00000000ull, 0xf8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 0, }, - { 5, 1, 1, 0x08000000ull, 0xf8000000ull, { 23, 24, 25, 3, 0 }, 0x0, 1, }, - { 5, 7, 1, 0x00000000ull, 0x00000000ull, { 23, 65, 26, 0, 0 }, 0x0, 2, }, - { 5, 7, 1, 0x00000000ull, 0x00000000ull, { 23, 62, 25, 0, 0 }, 0x0, 3, }, - { 6, 1, 1, 0x00000000ull, 0x00000000ull, { 23, 65, 26, 0, 0 }, 0x0, 4, }, - { 7, 1, 1, 0x40000000ull, 0xf8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 5, }, - { 7, 1, 1, 0x00000000ull, 0x00000000ull, { 23, 62, 25, 0, 0 }, 0x0, 6, }, - { 8, 1, 1, 0x00000000ull, 0x00000000ull, { 23, 62, 25, 0, 0 }, 0x0, 7, }, - { 9, 3, 1, 0x00000000ull, 0x00000000ull, { 23, 2, 51, 52, 53 }, 0x221, 8, }, - { 10, 1, 1, 0x60000000ull, 0xf8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 9, }, - { 10, 1, 1, 0x60000000ull, 0xf8000000ull, { 23, 54, 25, 0, 0 }, 0x0, 10, }, - { 11, 1, 1, 0x68000000ull, 0xf8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 11, }, - { 11, 1, 1, 0x68000000ull, 0xf8000000ull, { 23, 54, 25, 0, 0 }, 0x0, 12, }, - { 14, 4, 0, 0x00000000ull, 0xf80011ffull, { 15, 0, 0, 0, 0 }, 0x40, 814, }, - { 14, 4, 0, 0x00000000ull, 0xf80011c0ull, { 15, 0, 0, 0, 0 }, 0x0, 680, }, - { 14, 4, 0, 0x00000000ull, 0xf80011c0ull, { 15, 0, 0, 0, 0 }, 0x40, 681, }, - { 14, 4, 0, 0x08000100ull, 0xf80011c0ull, { 15, 0, 0, 0, 0 }, 0x200, 1843, }, - { 14, 4, 0, 0x08000100ull, 0xf80011c0ull, { 15, 0, 0, 0, 0 }, 0x240, 1844, }, - { 14, 4, 1, 0x00000000ull, 0x00001000ull, { 14, 15, 0, 0, 0 }, 0x0, 437, }, - { 14, 4, 1, 0x00000000ull, 0x00001000ull, { 14, 15, 0, 0, 0 }, 0x40, 438, }, - { 14, 4, 0, 0x00000000ull, 0x000011ffull, { 80, 0, 0, 0, 0 }, 0x40, 835, }, - { 14, 4, 0, 0x00000000ull, 0x000011c0ull, { 80, 0, 0, 0, 0 }, 0x0, 682, }, - { 14, 4, 0, 0x00000000ull, 0x000011c0ull, { 80, 0, 0, 0, 0 }, 0x40, 683, }, - { 14, 4, 0, 0x00000080ull, 0x000011c0ull, { 80, 0, 0, 0, 0 }, 0x210, 2479, }, - { 14, 4, 0, 0x00000080ull, 0x000011c0ull, { 80, 0, 0, 0, 0 }, 0x250, 2480, }, - { 14, 4, 0, 0x00000140ull, 0x000011c0ull, { 80, 0, 0, 0, 0 }, 0x30, 445, }, - { 14, 4, 0, 0x00000140ull, 0x000011c0ull, { 80, 0, 0, 0, 0 }, 0x70, 446, }, - { 14, 4, 0, 0x00000180ull, 0x000011c0ull, { 80, 0, 0, 0, 0 }, 0x230, 443, }, - { 14, 4, 0, 0x00000180ull, 0x000011c0ull, { 80, 0, 0, 0, 0 }, 0x270, 444, }, - { 14, 4, 1, 0x00000000ull, 0x00001000ull, { 14, 80, 0, 0, 0 }, 0x0, 439, }, - { 14, 4, 1, 0x00000000ull, 0x00001000ull, { 14, 80, 0, 0, 0 }, 0x40, 440, }, - { 15, 4, 0, 0x00000000ull, 0xf8000000ull, { 64, 0, 0, 0, 0 }, 0x0, 393, }, - { 15, 5, 0, 0x00000000ull, 0xf8000000ull, { 64, 0, 0, 0, 0 }, 0x0, 806, }, - { 15, 2, 0, 0x00000000ull, 0xf8000000ull, { 64, 0, 0, 0, 0 }, 0x2, 949, }, - { 15, 3, 0, 0x00000000ull, 0xf8000000ull, { 64, 0, 0, 0, 0 }, 0x0, 1038, }, - { 15, 6, 0, 0x00000000ull, 0xf8000000ull, { 68, 0, 0, 0, 0 }, 0x0, 2483, }, - { 15, 7, 0, 0x00000000ull, 0x00000000ull, { 64, 0, 0, 0, 0 }, 0x0, 15, }, - { 16, 6, 0, 0x00000000ull, 0x000011ffull, { 81, 0, 0, 0, 0 }, 0x40, 868, }, - { 16, 6, 0, 0x00000000ull, 0x000011c0ull, { 81, 0, 0, 0, 0 }, 0x0, 684, }, - { 16, 6, 0, 0x00000000ull, 0x000011c0ull, { 81, 0, 0, 0, 0 }, 0x40, 685, }, - { 16, 6, 1, 0x00000000ull, 0x00001000ull, { 14, 81, 0, 0, 0 }, 0x0, 441, }, - { 16, 6, 1, 0x00000000ull, 0x00001000ull, { 14, 81, 0, 0, 0 }, 0x40, 442, }, - { 17, 4, 0, 0x80000000ull, 0xf8000018ull, { 15, 76, 0, 0, 0 }, 0x20, 2365, }, - { 17, 4, 0, 0x00000000ull, 0x00000018ull, { 80, 76, 0, 0, 0 }, 0x20, 2366, }, - { 18, 4, 0, 0x60000000ull, 0xf8000000ull, { 0, 0, 0, 0, 0 }, 0x2c, 216, }, - { 22, 2, 0, 0x00000000ull, 0x00000000ull, { 24, 79, 0, 0, 0 }, 0x0, 1848, }, - { 22, 3, 0, 0x00000000ull, 0x00000000ull, { 23, 80, 0, 0, 0 }, 0x0, 218, }, - { 22, 3, 0, 0x00000000ull, 0x00000000ull, { 17, 80, 0, 0, 0 }, 0x0, 219, }, - { 22, 3, 0, 0x00000000ull, 0x00000000ull, { 24, 79, 0, 0, 0 }, 0x0, 1849, }, - { 22, 3, 0, 0x00000000ull, 0x00000000ull, { 18, 79, 0, 0, 0 }, 0x0, 1850, }, - { 22, 7, 0, 0x00000000ull, 0x00000000ull, { 24, 79, 0, 0, 0 }, 0x0, 1851, }, - { 25, 4, 0, 0x20000000ull, 0xf8000000ull, { 0, 0, 0, 0, 0 }, 0x224, 17, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 24, 25, 0 }, 0x0, 1014, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 25, 24, 0 }, 0x0, 990, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 25, 24, 0 }, 0x0, 918, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 24, 25, 0 }, 0x0, 897, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 24, 25, 0 }, 0x40, 1146, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 6, 25, 0 }, 0x0, 919, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 25, 6, 0 }, 0x40, 1016, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 6, 25, 0 }, 0x40, 993, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 54, 25, 0 }, 0x0, 1018, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 56, 25, 0 }, 0x0, 994, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 56, 25, 0 }, 0x0, 922, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 54, 25, 0 }, 0x0, 901, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 54, 25, 0 }, 0x40, 1149, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 58, 25, 0 }, 0x0, 1009, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 58, 25, 0 }, 0x0, 939, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 24, 25, 0 }, 0x40, 1150, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 6, 25, 0 }, 0x40, 995, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 25, 6, 0 }, 0x40, 903, }, - { 26, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 54, 25, 0 }, 0x40, 1151, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 24, 25, 0 }, 0x0, 1021, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 25, 24, 0 }, 0x0, 997, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 25, 24, 0 }, 0x0, 925, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 24, 25, 0 }, 0x0, 904, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 24, 25, 0 }, 0x40, 1154, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 6, 25, 0 }, 0x0, 926, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 25, 6, 0 }, 0x40, 1023, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 6, 25, 0 }, 0x40, 1000, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 54, 25, 0 }, 0x0, 1025, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 56, 25, 0 }, 0x0, 1001, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 56, 25, 0 }, 0x0, 929, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 54, 25, 0 }, 0x0, 908, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 54, 25, 0 }, 0x40, 1157, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 55, 25, 0 }, 0x0, 1035, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 57, 25, 0 }, 0x0, 1011, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 57, 25, 0 }, 0x0, 941, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 55, 25, 0 }, 0x0, 917, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 24, 25, 0 }, 0x40, 1158, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 6, 25, 0 }, 0x40, 1002, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 25, 6, 0 }, 0x40, 910, }, - { 27, 1, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 54, 25, 0 }, 0x40, 1159, }, - { 28, 3, 1, 0x08000000ull, 0xf8000000ull, { 23, 32, 24, 1, 0 }, 0x0, 251, }, - { 29, 3, 1, 0x48000000ull, 0xf8000000ull, { 23, 32, 24, 1, 0 }, 0x0, 252, }, - { 30, 3, 1, 0x88000000ull, 0xf8000000ull, { 23, 32, 24, 1, 0 }, 0x0, 253, }, - { 31, 3, 1, 0xc8000000ull, 0xf8000000ull, { 23, 32, 24, 1, 0 }, 0x0, 254, }, - { 33, 4, 0, 0x10000000ull, 0xf8000000ull, { 0, 0, 0, 0, 0 }, 0x224, 18, }, - { 35, 2, 1, 0xc0000000ull, 0xf8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 976, }, - { 36, 2, 1, 0xc8000000ull, 0xf8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 977, }, - { 38, 2, 1, 0x00000000ull, 0x00000000ull, { 23, 24, 25, 46, 71 }, 0x0, 19, }, - { 38, 2, 1, 0x00000000ull, 0x04000000ull, { 23, 24, 44, 72, 0 }, 0x0, 2487, }, - { 38, 2, 1, 0x04000000ull, 0x04000000ull, { 23, 54, 44, 72, 0 }, 0x0, 2488, }, - { 38, 2, 1, 0x00000000ull, 0x00000000ull, { 23, 47, 25, 45, 72 }, 0x0, 20, }, - { 42, 4, 0, 0x80000000ull, 0xf8000000ull, { 0, 0, 0, 0, 0 }, 0x20, 21, }, - { 47, 2, 1, 0x00000000ull, 0x00002000ull, { 23, 25, 75, 72, 0 }, 0x0, 2383, }, - { 49, 5, 1, 0x80000000ull, 0xf80fe000ull, { 17, 19, 0, 0, 0 }, 0x40, 23, }, - { 50, 5, 1, 0x08000000ull, 0xf8000000ull, { 17, 19, 18, 0, 0 }, 0x40, 1900, }, - { 51, 5, 1, 0xb8000000ull, 0xf8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1901, }, - { 51, 5, 1, 0xb8000000ull, 0xf8000000ull, { 17, 18, 19, 0, 0 }, 0x40, 25, }, - { 52, 5, 1, 0xb0000000ull, 0xf8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1902, }, - { 52, 5, 1, 0xb0000000ull, 0xf8000000ull, { 17, 18, 19, 0, 0 }, 0x40, 26, }, - { 53, 5, 1, 0x60000000ull, 0xf8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 27, }, - { 54, 5, 1, 0x68000000ull, 0xf8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 28, }, - { 56, 3, 0, 0x80000000ull, 0xf8000000ull, { 25, 0, 0, 0, 0 }, 0x0, 29, }, - { 57, 5, 0, 0x40000000ull, 0xf8000000ull, { 78, 0, 0, 0, 0 }, 0x0, 1903, }, - { 57, 5, 0, 0x40000000ull, 0xf8000000ull, { 78, 0, 0, 0, 0 }, 0x40, 30, }, - { 58, 5, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 18, 59, 0 }, 0x0, 1040, }, - { 58, 5, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 18, 59, 0 }, 0x40, 1179, }, - { 59, 5, 0, 0x28000000ull, 0xf8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 1904, }, - { 59, 5, 0, 0x28000000ull, 0xf8000000ull, { 0, 0, 0, 0, 0 }, 0x40, 31, }, - { 60, 5, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 18, 19, 0 }, 0x0, 790, }, - { 60, 5, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 18, 19, 0 }, 0x40, 791, }, - { 60, 5, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 19, 18, 0 }, 0x0, 932, }, - { 60, 5, 2, 0x00000000ull, 0x00001000ull, { 21, 22, 19, 18, 0 }, 0x40, 933, }, - { 60, 5, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 18, 19, 0 }, 0x0, 1160, }, - { 60, 5, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 18, 19, 0 }, 0x40, 1161, }, - { 60, 5, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 19, 18, 0 }, 0x0, 1167, }, - { 60, 5, 2, 0x00000000ull, 0x00001000ull, { 22, 21, 19, 18, 0 }, 0x40, 1168, }, - { 61, 5, 1, 0xc0000000ull, 0xf8000000ull, { 17, 18, 0, 0, 0 }, 0x0, 887, }, - { 61, 5, 1, 0xc0000000ull, 0xf8000000ull, { 17, 18, 0, 0, 0 }, 0x40, 888, }, - { 61, 5, 1, 0xe0000000ull, 0xf8000000ull, { 17, 18, 0, 0, 0 }, 0x0, 2485, }, - { 61, 5, 1, 0x08000000ull, 0xf80fe000ull, { 17, 19, 0, 0, 0 }, 0x40, 2486, }, - { 62, 3, 1, 0x88000000ull, 0xf8000000ull, { 23, 32, 70, 0, 0 }, 0x0, 255, }, - { 63, 3, 1, 0xc8000000ull, 0xf8000000ull, { 23, 32, 70, 0, 0 }, 0x0, 256, }, - { 66, 3, 0, 0x60000000ull, 0xf8000000ull, { 0, 0, 0, 0, 0 }, 0x21, 32, }, - { 67, 5, 1, 0x00000000ull, 0x00000000ull, { 17, 19, 20, 18, 0 }, 0x0, 1938, }, - { 67, 5, 1, 0x00000000ull, 0x00000000ull, { 17, 19, 20, 18, 0 }, 0x40, 33, }, - { 68, 5, 1, 0xa8000000ull, 0xf8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1939, }, - { 68, 5, 1, 0xa8000000ull, 0xf8000000ull, { 17, 18, 19, 0, 0 }, 0x40, 34, }, - { 69, 5, 1, 0x80000000ull, 0xf8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1856, }, - { 70, 5, 1, 0xa0000000ull, 0xf8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1940, }, - { 70, 5, 1, 0xa0000000ull, 0xf8000000ull, { 17, 18, 19, 0, 0 }, 0x40, 35, }, - { 71, 5, 1, 0xc8000000ull, 0xf8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1013, }, - { 72, 5, 1, 0x00000000ull, 0x000fe000ull, { 17, 19, 20, 0, 0 }, 0x40, 1943, }, - { 73, 5, 1, 0x00000000ull, 0x00000000ull, { 17, 19, 20, 18, 0 }, 0x0, 1946, }, - { 73, 5, 1, 0x00000000ull, 0x00000000ull, { 17, 19, 20, 18, 0 }, 0x40, 37, }, - { 74, 5, 1, 0x88000000ull, 0xf8000000ull, { 17, 19, 0, 0, 0 }, 0xc0, 38, }, - { 75, 5, 1, 0x88000000ull, 0xf80fe000ull, { 17, 19, 0, 0, 0 }, 0x40, 39, }, - { 76, 5, 1, 0x00000000ull, 0x00000000ull, { 17, 19, 20, 18, 0 }, 0x0, 1949, }, - { 76, 5, 1, 0x00000000ull, 0x00000000ull, { 17, 19, 20, 18, 0 }, 0x40, 40, }, - { 77, 5, 1, 0x00000000ull, 0x000fe000ull, { 17, 19, 20, 0, 0 }, 0x40, 1952, }, - { 78, 5, 1, 0x08000000ull, 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23, 24, 73, 0, 0 }, 0x0, 139, }, + { 155, 2, 1, 0x000000eea0000000ull, 0x000001fff0000000ull, { 23, 24, 74, 0, 0 }, 0x0, 140, }, + { 165, 4, 0, 0x0000004000000000ull, 0x000001e1f8000000ull, { 64, 0, 0, 0, 0 }, 0x0, 394, }, + { 165, 5, 0, 0x0000000008000000ull, 0x000001e3f8000000ull, { 64, 0, 0, 0, 0 }, 0x0, 807, }, + { 165, 2, 0, 0x0000000008000000ull, 0x000001eff8000000ull, { 64, 0, 0, 0, 0 }, 0x2, 956, }, + { 165, 3, 0, 0x0000000008000000ull, 0x000001eff8000000ull, { 64, 0, 0, 0, 0 }, 0x0, 1044, }, + { 165, 6, 0, 0x0000000008000000ull, 0x000001eff8000000ull, { 68, 0, 0, 0, 0 }, 0x0, 2484, }, + { 165, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 64, 0, 0, 0, 0 }, 0x0, 141, }, + { 172, 1, 1, 0x0000010070000000ull, 0x000001eff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 142, }, + { 172, 1, 1, 0x0000010170000000ull, 0x000001eff8000000ull, { 23, 54, 25, 0, 0 }, 0x0, 143, }, + { 175, 2, 1, 0x000000ea00000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 2467, }, + { 176, 2, 1, 0x000000f820000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 2370, }, + { 177, 1, 1, 0x0000010400000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 144, }, + { 178, 1, 1, 0x0000010600000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 145, }, + { 179, 1, 1, 0x0000011400000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 146, }, + { 180, 1, 1, 0x0000010450000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 147, }, + { 181, 1, 1, 0x0000010650000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 148, }, + { 182, 1, 1, 0x0000010470000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 149, }, + { 183, 1, 1, 0x0000010670000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 150, }, + { 184, 1, 1, 0x0000010520000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 794, }, + { 185, 1, 1, 0x0000010720000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 795, }, + { 186, 1, 1, 0x0000011520000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 796, }, + { 187, 2, 1, 0x000000e850000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 2384, }, + { 188, 2, 1, 0x000000ea70000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 151, }, + { 189, 2, 1, 0x000000e810000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 2385, }, + { 190, 2, 1, 0x000000ea30000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 152, }, + { 191, 2, 1, 0x000000ead0000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 1823, }, + { 192, 2, 1, 0x000000e230000000ull, 0x000001ff30000000ull, { 23, 24, 25, 41, 0 }, 0x0, 153, }, + { 193, 2, 1, 0x000000e690000000ull, 0x000001fff0000000ull, { 23, 25, 0, 0, 0 }, 0x0, 154, }, + { 195, 3, 1, 0x00000021c0000000ull, 0x000001eff8000000ull, { 23, 25, 24, 0, 0 }, 0x0, 1824, }, + { 195, 3, 1, 0x00000020c0000000ull, 0x000001eff8000000ull, { 23, 25, 48, 0, 0 }, 0x0, 1825, }, + { 195, 3, 0, 0x0000002188000000ull, 0x000001eff8000000ull, { 25, 48, 0, 0, 0 }, 0x0, 1847, }, + { 196, 2, 1, 0x000000e8b0000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 155, }, + { 197, 2, 1, 0x000000e240000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 156, }, + { 197, 2, 1, 0x000000ee50000000ull, 0x000001fff0000000ull, { 23, 24, 38, 0, 0 }, 0x0, 157, }, + { 198, 2, 1, 0x000000f040000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 158, }, + { 198, 2, 1, 0x000000fc50000000ull, 0x000001fff0000000ull, { 23, 24, 38, 0, 0 }, 0x0, 159, }, + { 199, 1, 1, 0x0000010680000000ull, 0x000001ffe0000000ull, { 23, 24, 40, 25, 0 }, 0x0, 160, }, + { 200, 2, 1, 0x000000e220000000ull, 0x000001fff0000000ull, { 23, 25, 24, 0, 0 }, 0x0, 161, }, + { 200, 2, 1, 0x000000e630000000ull, 0x000001fff0000000ull, { 23, 25, 42, 0, 0 }, 0x0, 162, }, + { 201, 2, 1, 0x000000f020000000ull, 0x000001fff0000000ull, { 23, 25, 24, 0, 0 }, 0x0, 163, }, + { 201, 2, 1, 0x000000f430000000ull, 0x000001fff0000000ull, { 23, 25, 42, 0, 0 }, 0x0, 164, }, + { 202, 1, 1, 0x00000106c0000000ull, 0x000001ffe0000000ull, { 23, 24, 40, 25, 0 }, 0x0, 165, }, + { 203, 1, 1, 0x0000010420000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 166, }, + { 204, 1, 1, 0x0000010620000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 167, }, + { 205, 1, 1, 0x0000011420000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 168, }, + { 206, 3, 0, 0x0000002048000000ull, 0x000001eff8000000ull, { 25, 24, 0, 0, 0 }, 0x8, 984, }, + { 206, 3, 0, 0x0000002050000000ull, 0x000001eff8000000ull, { 25, 24, 0, 0, 0 }, 0xc, 895, }, + { 206, 3, 0, 0x00000021a0000000ull, 0x000001eff8000000ull, { 25, 0, 0, 0, 0 }, 0x8, 777, }, + { 207, 3, 0, 0x0000002060000000ull, 0x000001eff8000000ull, { 25, 24, 0, 0, 0 }, 0x8, 703, }, + { 212, 4, 0, 0x0000000040000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x22c, 169, }, + { 213, 3, 0, 0x0000000038000000ull, 0x000001ee78000000ull, { 66, 0, 0, 0, 0 }, 0x8, 170, }, + { 214, 3, 0, 0x0000000028000000ull, 0x000001ee78000000ull, { 66, 0, 0, 0, 0 }, 0x0, 171, }, + { 223, 3, 1, 0x000000c708000000ull, 0x000001ffc8000000ull, { 17, 24, 0, 0, 0 }, 0x0, 2295, }, + { 224, 2, 1, 0x000000a600000000ull, 0x000001ee04000000ull, { 23, 24, 44, 0, 0 }, 0x140, 172, }, + { 224, 2, 1, 0x000000f240000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 173, }, + { 225, 1, 1, 0x0000010080000000ull, 0x000001efe0000000ull, { 23, 24, 39, 25, 0 }, 0x0, 174, }, + { 226, 1, 1, 0x00000100c0000000ull, 0x000001efe0000000ull, { 23, 24, 39, 25, 0 }, 0x0, 175, }, + { 227, 2, 1, 0x000000a400000000ull, 0x000001ee00002000ull, { 23, 25, 75, 0, 0 }, 0x140, 2391, }, + { 227, 2, 1, 0x000000f220000000ull, 0x000001fff0000000ull, { 23, 25, 24, 0, 0 }, 0x0, 177, }, + { 228, 2, 1, 0x000000ac00000000ull, 0x000001ee00000000ull, { 23, 24, 25, 43, 0 }, 0x0, 178, }, + { 233, 3, 0, 0x0000000180000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 705, }, + { 234, 3, 0, 0x0000000030000000ull, 0x000001ee78000000ull, { 66, 0, 0, 0, 0 }, 0x8, 179, }, + { 236, 3, 1, 0x0000008c00000000ull, 0x000001fff8000000ull, { 32, 24, 0, 0, 0 }, 0x0, 180, }, + { 236, 3, 1, 0x000000ac00000000ull, 0x000001eff0000000ull, { 32, 24, 60, 0, 0 }, 0x400, 181, }, + { 237, 3, 1, 0x0000008c40000000ull, 0x000001fff8000000ull, { 32, 24, 0, 0, 0 }, 0x0, 182, }, + { 237, 3, 1, 0x000000ac40000000ull, 0x000001eff0000000ull, { 32, 24, 60, 0, 0 }, 0x400, 183, }, + { 238, 3, 1, 0x0000008c80000000ull, 0x000001fff8000000ull, { 32, 24, 0, 0, 0 }, 0x0, 184, }, + { 238, 3, 1, 0x000000ac80000000ull, 0x000001eff0000000ull, { 32, 24, 60, 0, 0 }, 0x400, 185, }, + { 239, 3, 1, 0x0000008cc0000000ull, 0x000001fff8000000ull, { 32, 24, 0, 0, 0 }, 0x0, 186, }, + { 239, 3, 1, 0x000000acc0000000ull, 0x000001eff0000000ull, { 32, 24, 60, 0, 0 }, 0x400, 187, }, + { 240, 3, 1, 0x000000cec0000000ull, 0x000001fff8000000ull, { 32, 18, 0, 0, 0 }, 0x0, 2298, }, + { 240, 3, 1, 0x000000eec0000000ull, 0x000001eff0000000ull, { 32, 18, 60, 0, 0 }, 0x400, 2299, }, + { 241, 3, 1, 0x000000cc40000000ull, 0x000001fff8000000ull, { 32, 18, 0, 0, 0 }, 0x0, 188, }, + { 241, 3, 1, 0x000000ec40000000ull, 0x000001eff0000000ull, { 32, 18, 60, 0, 0 }, 0x400, 189, }, + { 242, 3, 1, 0x000000ccc0000000ull, 0x000001fff8000000ull, { 32, 18, 0, 0, 0 }, 0x0, 190, }, + { 242, 3, 1, 0x000000ecc0000000ull, 0x000001eff0000000ull, { 32, 18, 60, 0, 0 }, 0x400, 191, }, + { 243, 3, 1, 0x000000cc00000000ull, 0x000001fff8000000ull, { 32, 18, 0, 0, 0 }, 0x0, 192, }, + { 243, 3, 1, 0x000000ec00000000ull, 0x000001eff0000000ull, { 32, 18, 60, 0, 0 }, 0x400, 193, }, + { 244, 3, 1, 0x000000cc80000000ull, 0x000001fff8000000ull, { 32, 18, 0, 0, 0 }, 0x0, 194, }, + { 244, 3, 1, 0x000000ec80000000ull, 0x000001eff0000000ull, { 32, 18, 60, 0, 0 }, 0x400, 195, }, + { 245, 1, 1, 0x0000010028000000ull, 0x000001eff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 196, }, + { 245, 1, 1, 0x0000010020000000ull, 0x000001eff8000000ull, { 23, 24, 25, 3, 0 }, 0x0, 197, }, + { 245, 1, 1, 0x0000010128000000ull, 0x000001eff8000000ull, { 23, 54, 25, 0, 0 }, 0x0, 198, }, + { 246, 3, 0, 0x0000000020000000ull, 0x000001ee78000000ull, { 66, 0, 0, 0, 0 }, 0x0, 199, }, + { 247, 2, 1, 0x00000000a0000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 200, }, + { 248, 2, 1, 0x00000000a8000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 201, }, + { 249, 2, 1, 0x00000000b0000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 202, }, + { 250, 3, 0, 0x0000000198000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 959, }, + { 251, 3, 1, 0x00000020f8000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x8, 203, }, + { 252, 2, 2, 0x000000a000000000ull, 0x000001fe00003000ull, { 21, 22, 25, 75, 0 }, 0x0, 2489, }, + { 252, 2, 2, 0x000000a000000000ull, 0x000001fe00003000ull, { 22, 21, 25, 75, 0 }, 0x40, 1724, }, + { 253, 3, 1, 0x00000020d0000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 204, }, + { 254, 2, 2, 0x000000a000002000ull, 0x000001fe00003000ull, { 21, 22, 25, 0, 0 }, 0x0, 2491, }, + { 254, 2, 2, 0x000000a000002000ull, 0x000001fe00003000ull, { 22, 21, 25, 0, 0 }, 0x40, 1726, }, + { 255, 3, 1, 0x00000020f0000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x8, 205, }, + { 257, 3, 1, 0x00000020d8000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 206, }, + { 261, 2, 1, 0x000000e840000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 942, }, + { 262, 2, 1, 0x000000ea40000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 943, }, + { 263, 2, 1, 0x000000f840000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 944, }, + { 271, 3, 1, 0x0000008208000000ull, 0x000001fff8000000ull, { 23, 32, 24, 0, 0 }, 0x0, 207, }, + { 272, 3, 1, 0x0000008248000000ull, 0x000001fff8000000ull, { 23, 32, 24, 0, 0 }, 0x0, 208, }, + { 273, 3, 1, 0x0000008288000000ull, 0x000001fff8000000ull, { 23, 32, 24, 0, 0 }, 0x0, 209, }, + { 274, 3, 1, 0x00000082c8000000ull, 0x000001fff8000000ull, { 23, 32, 24, 0, 0 }, 0x0, 210, }, + { 276, 5, 1, 0x000001d000000000ull, 0x000001fc00000000ull, { 17, 19, 20, 18, 0 }, 0x0, 988, }, + { 276, 5, 1, 0x000001d000000000ull, 0x000001fc00000000ull, { 17, 19, 20, 18, 0 }, 0x40, 1036, }, + { 277, 5, 1, 0x000001d000000000ull, 0x000001fc000fe000ull, { 17, 19, 20, 0, 0 }, 0x40, 989, }, + { 278, 1, 1, 0x0000010078000000ull, 0x000001eff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 211, }, + { 278, 1, 1, 0x0000010178000000ull, 0x000001eff8000000ull, { 23, 54, 25, 0, 0 }, 0x0, 212, }, + { 281, 2, 1, 0x0000000080000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 213, }, + { 282, 2, 1, 0x0000000088000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 214, }, + { 283, 2, 1, 0x0000000090000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 215, }, }; static const char dis_table[] = { diff --git a/contrib/binutils/opcodes/sh-dis.c b/contrib/binutils/opcodes/sh-dis.c index c4e960c24e8b..7091afce608b 100644 --- a/contrib/binutils/opcodes/sh-dis.c +++ b/contrib/binutils/opcodes/sh-dis.c @@ -1,5 +1,6 @@ /* Disassemble SH instructions. - Copyright (C) 1993, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. + Copyright 1993, 1994, 1995, 1997, 1998, 2000 + Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -15,8 +16,8 @@ You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#include "sysdep.h" #include <stdio.h> +#include "sysdep.h" #define STATIC_TABLE #define DEFINE_TABLE @@ -34,22 +35,22 @@ print_movxy (op, rn, rm, fprintf_fn, stream) { int n; - fprintf_fn (stream,"%s\t", op->name); + fprintf_fn (stream, "%s\t", op->name); for (n = 0; n < 2; n++) { switch (op->arg[n]) { case A_IND_N: - fprintf_fn (stream, "@r%d", rn); + fprintf_fn (stream, "@r%d", rn); break; case A_INC_N: - fprintf_fn (stream, "@r%d+", rn); + fprintf_fn (stream, "@r%d+", rn); break; case A_PMOD_N: - fprintf_fn (stream, "@r%d+r8", rn); + fprintf_fn (stream, "@r%d+r8", rn); break; case A_PMODY_N: - fprintf_fn (stream, "@r%d+r9", rn); + fprintf_fn (stream, "@r%d+r9", rn); break; case DSP_REG_M: fprintf_fn (stream, "a%c", '0' + rm); @@ -64,7 +65,7 @@ print_movxy (op, rn, rm, fprintf_fn, stream) abort (); } if (n == 0) - fprintf_fn (stream, ","); + fprintf_fn (stream, ","); } } @@ -72,6 +73,7 @@ print_movxy (op, rn, rm, fprintf_fn, stream) nibbles of the insn, i.e. field a and the bit that indicates if a parallel processing insn follows. Return nonzero if a field b of a parallel processing insns follows. */ + static void print_insn_ddt (insn, info) int insn; @@ -97,19 +99,20 @@ print_insn_ddt (insn, info) { static sh_opcode_info *first_movx, *first_movy; sh_opcode_info *opx, *opy; - int insn_x, insn_y; + unsigned int insn_x, insn_y; if (! first_movx) { - for (first_movx = sh_table; first_movx->nibbles[1] != MOVX; ) + for (first_movx = sh_table; first_movx->nibbles[1] != MOVX;) first_movx++; - for (first_movy = first_movx; first_movy->nibbles[1] != MOVY; ) + for (first_movy = first_movx; first_movy->nibbles[1] != MOVY;) first_movy++; } insn_x = (insn >> 2) & 0xb; if (insn_x) { - for (opx = first_movx; opx->nibbles[2] != insn_x; ) opx++; + for (opx = first_movx; opx->nibbles[2] != insn_x;) + opx++; print_movxy (opx, ((insn >> 9) & 1) + 4, (insn >> 7) & 1, fprintf_fn, stream); } @@ -118,7 +121,8 @@ print_insn_ddt (insn, info) { if (insn_x) fprintf_fn (stream, "\t"); - for (opy = first_movy; opy->nibbles[2] != insn_y; ) opy++; + for (opy = first_movy; opy->nibbles[2] != insn_y;) + opy++; print_movxy (opy, ((insn >> 8) & 1) + 6, (insn >> 6) & 1, fprintf_fn, stream); } @@ -174,12 +178,12 @@ print_insn_ppi (field_b, info) int field_b; struct disassemble_info *info; { - static char *sx_tab[] = {"x0","x1","a0","a1"}; - static char *sy_tab[] = {"y0","y1","m0","m1"}; + static char *sx_tab[] = { "x0", "x1", "a0", "a1" }; + static char *sy_tab[] = { "y0", "y1", "m0", "m1" }; fprintf_ftype fprintf_fn = info->fprintf_func; void *stream = info->stream; - int nib1, nib2, nib3; - char *dc; + unsigned int nib1, nib2, nib3; + char *dc = NULL; sh_opcode_info *op; if ((field_b & 0xe800) == 0) @@ -192,10 +196,10 @@ print_insn_ppi (field_b, info) } if ((field_b & 0xc000) == 0x4000 && (field_b & 0x3000) != 0x1000) { - static char *du_tab[] = {"x0","y0","a0","a1"}; - static char *se_tab[] = {"x0","x1","y0","a1"}; - static char *sf_tab[] = {"y0","y1","x0","a1"}; - static char *sg_tab[] = {"m0","m1","a0","a1"}; + static char *du_tab[] = { "x0", "y0", "a0", "a1" }; + static char *se_tab[] = { "x0", "x1", "y0", "a1" }; + static char *sf_tab[] = { "y0", "y1", "x0", "a1" }; + static char *sg_tab[] = { "m0", "m1", "a0", "a1" }; if (field_b & 0x2000) { @@ -243,11 +247,11 @@ print_insn_ppi (field_b, info) int n; fprintf_fn (stream, "%s%s\t", dc, op->name); - for (n = 0; n < 3 && op->arg[n] != A_END; n++) + for (n = 0; n < 3 && op->arg[n] != A_END; n++) { if (n && op->arg[1] != A_END) fprintf_fn (stream, ","); - switch (op->arg[n]) + switch (op->arg[n]) { case DSP_REG_N: print_dsp_reg (field_b & 0xf, fprintf_fn, stream); @@ -262,7 +266,7 @@ print_insn_ppi (field_b, info) fprintf_fn (stream, "mach"); break; case A_MACL: - fprintf_fn (stream ,"macl"); + fprintf_fn (stream, "macl"); break; default: abort (); @@ -275,7 +279,7 @@ print_insn_ppi (field_b, info) fprintf_fn (stream, ".word 0x%x", field_b); } -static int +static int print_insn_shx (memaddr, info) bfd_vma memaddr; struct disassemble_info *info; @@ -285,7 +289,7 @@ print_insn_shx (memaddr, info) unsigned char insn[2]; unsigned char nibs[4]; int status; - bfd_vma relmask = ~ (bfd_vma) 0; + bfd_vma relmask = ~(bfd_vma) 0; sh_opcode_info *op; int target_arch; @@ -318,13 +322,13 @@ print_insn_shx (memaddr, info) status = info->read_memory_func (memaddr, insn, 2, info); - if (status != 0) + if (status != 0) { info->memory_error_func (status, memaddr, info); return -1; } - if (info->flags & LITTLE_BIT) + if (info->flags & LITTLE_BIT) { nibs[0] = (insn[1] >> 4) & 0xf; nibs[1] = insn[1] & 0xf; @@ -332,7 +336,7 @@ print_insn_shx (memaddr, info) nibs[2] = (insn[0] >> 4) & 0xf; nibs[3] = insn[0] & 0xf; } - else + else { nibs[0] = (insn[0] >> 4) & 0xf; nibs[1] = insn[0] & 0xf; @@ -349,13 +353,13 @@ print_insn_shx (memaddr, info) status = info->read_memory_func (memaddr + 2, insn, 2, info); - if (status != 0) + if (status != 0) { info->memory_error_func (status, memaddr + 2, info); return -1; } - if (info->flags & LITTLE_BIT) + if (info->flags & LITTLE_BIT) field_b = insn[1] << 8 | insn[0]; else field_b = insn[0] << 8 | insn[1]; @@ -367,7 +371,7 @@ print_insn_shx (memaddr, info) print_insn_ddt ((nibs[1] << 8) | (nibs[2] << 4) | nibs[3], info); return 2; } - for (op = sh_table; op->name; op++) + for (op = sh_table; op->name; op++) { int n; int imm = 0; @@ -383,7 +387,7 @@ print_insn_shx (memaddr, info) { int i = op->nibbles[n]; - if (i < 16) + if (i < 16) { if (nibs[n] == i) continue; @@ -392,10 +396,10 @@ print_insn_shx (memaddr, info) switch (i) { case BRANCH_8: - imm = (nibs[2] << 4) | (nibs[3]); + imm = (nibs[2] << 4) | (nibs[3]); if (imm & 0x80) imm |= ~0xff; - imm = ((char)imm) * 2 + 4 ; + imm = ((char) imm) * 2 + 4; goto ok; case BRANCH_12: imm = ((nibs[1]) << 8) | (nibs[2] << 4) | (nibs[3]); @@ -403,37 +407,37 @@ print_insn_shx (memaddr, info) imm |= ~0xfff; imm = imm * 2 + 4; goto ok; - case IMM_4: + case IMM0_4: + case IMM1_4: imm = nibs[3]; goto ok; - case IMM_4BY2: - imm = nibs[3] <<1; + case IMM0_4BY2: + case IMM1_4BY2: + imm = nibs[3] << 1; goto ok; - case IMM_4BY4: - imm = nibs[3] <<2; + case IMM0_4BY4: + case IMM1_4BY4: + imm = nibs[3] << 2; goto ok; - case IMM_8: + case IMM0_8: + case IMM1_8: imm = (nibs[2] << 4) | nibs[3]; goto ok; case PCRELIMM_8BY2: - imm = ((nibs[2] << 4) | nibs[3]) <<1; - relmask = ~ (bfd_vma) 1; + imm = ((nibs[2] << 4) | nibs[3]) << 1; + relmask = ~(bfd_vma) 1; goto ok; case PCRELIMM_8BY4: - imm = ((nibs[2] << 4) | nibs[3]) <<2; - relmask = ~ (bfd_vma) 3; - goto ok; - case IMM_8BY2: - imm = ((nibs[2] << 4) | nibs[3]) <<1; + imm = ((nibs[2] << 4) | nibs[3]) << 2; + relmask = ~(bfd_vma) 3; goto ok; - case IMM_8BY4: - imm = ((nibs[2] << 4) | nibs[3]) <<2; + case IMM0_8BY2: + case IMM1_8BY2: + imm = ((nibs[2] << 4) | nibs[3]) << 1; goto ok; - case DISP_8: - imm = (nibs[2] << 4) | (nibs[3]); - goto ok; - case DISP_4: - imm = nibs[3]; + case IMM0_8BY4: + case IMM1_8BY4: + imm = ((nibs[2] << 4) | nibs[3]) << 2; goto ok; case REG_N: rn = nibs[n]; @@ -447,33 +451,34 @@ print_insn_shx (memaddr, info) break; case REG_B: rb = nibs[n] & 0x07; - break; + break; case SDT_REG_N: /* sh-dsp: single data transfer. */ rn = nibs[n]; if ((rn & 0xc) != 4) goto fail; rn = rn & 0x3; - rn |= (rn & 2) << 1; + rn |= (!(rn & 2)) << 2; break; case PPI: + case REPEAT: goto fail; default: - abort(); + abort (); } } ok: - fprintf_fn (stream,"%s\t", op->name); + fprintf_fn (stream, "%s\t", op->name); disp_pc = 0; - for (n = 0; n < 3 && op->arg[n] != A_END; n++) + for (n = 0; n < 3 && op->arg[n] != A_END; n++) { if (n && op->arg[1] != A_END) fprintf_fn (stream, ","); - switch (op->arg[n]) + switch (op->arg[n]) { case A_IMM: - fprintf_fn (stream, "#%d", (char)(imm)); + fprintf_fn (stream, "#%d", (char) (imm)); break; case A_R0: fprintf_fn (stream, "r0"); @@ -482,34 +487,34 @@ print_insn_shx (memaddr, info) fprintf_fn (stream, "r%d", rn); break; case A_INC_N: - fprintf_fn (stream, "@r%d+", rn); + fprintf_fn (stream, "@r%d+", rn); break; case A_DEC_N: - fprintf_fn (stream, "@-r%d", rn); + fprintf_fn (stream, "@-r%d", rn); break; case A_IND_N: - fprintf_fn (stream, "@r%d", rn); + fprintf_fn (stream, "@r%d", rn); break; case A_DISP_REG_N: - fprintf_fn (stream, "@(%d,r%d)", imm, rn); + fprintf_fn (stream, "@(%d,r%d)", imm, rn); break; case A_PMOD_N: - fprintf_fn (stream, "@r%d+r8", rn); + fprintf_fn (stream, "@r%d+r8", rn); break; case A_REG_M: fprintf_fn (stream, "r%d", rm); break; case A_INC_M: - fprintf_fn (stream, "@r%d+", rm); + fprintf_fn (stream, "@r%d+", rm); break; case A_DEC_M: - fprintf_fn (stream, "@-r%d", rm); + fprintf_fn (stream, "@-r%d", rm); break; case A_IND_M: - fprintf_fn (stream, "@r%d", rm); + fprintf_fn (stream, "@r%d", rm); break; case A_DISP_REG_M: - fprintf_fn (stream, "@(%d,r%d)", imm, rm); + fprintf_fn (stream, "@(%d,r%d)", imm, rm); break; case A_REG_B: fprintf_fn (stream, "r%d_bank", rb); @@ -521,12 +526,12 @@ print_insn_shx (memaddr, info) break; case A_IND_R0_REG_N: fprintf_fn (stream, "@(r0,r%d)", rn); - break; + break; case A_IND_R0_REG_M: fprintf_fn (stream, "@(r0,r%d)", rm); - break; + break; case A_DISP_GBR: - fprintf_fn (stream, "@(%d,gbr)",imm); + fprintf_fn (stream, "@(%d,gbr)", imm); break; case A_R0_GBR: fprintf_fn (stream, "@(r0,gbr)"); @@ -584,7 +589,7 @@ print_insn_shx (memaddr, info) fprintf_fn (stream, "mach"); break; case A_MACL: - fprintf_fn (stream ,"macl"); + fprintf_fn (stream, "macl"); break; case A_PR: fprintf_fn (stream, "pr"); @@ -607,7 +612,6 @@ print_insn_shx (memaddr, info) fprintf_fn (stream, "xd%d", rn & ~1); break; } - d_reg_n: case D_REG_N: fprintf_fn (stream, "dr%d", rn); break; @@ -632,16 +636,16 @@ print_insn_shx (memaddr, info) fprintf_fn (stream, "fr0"); break; case V_REG_N: - fprintf_fn (stream, "fv%d", rn*4); + fprintf_fn (stream, "fv%d", rn * 4); break; case V_REG_M: - fprintf_fn (stream, "fv%d", rm*4); + fprintf_fn (stream, "fv%d", rm * 4); break; case XMTRX_M4: fprintf_fn (stream, "xmtrx"); break; default: - abort(); + abort (); } } @@ -654,7 +658,7 @@ print_insn_shx (memaddr, info) if (!(info->flags & 1) && (op->name[0] == 'j' || (op->name[0] == 'b' - && (op->name[1] == 'r' + && (op->name[1] == 'r' || op->name[1] == 's')) || (op->name[0] == 'r' && op->name[1] == 't') || (op->name[0] == 'b' && op->name[2] == '.'))) @@ -673,7 +677,7 @@ print_insn_shx (memaddr, info) int size; bfd_byte bytes[4]; - if (relmask == ~ (bfd_vma) 1) + if (relmask == ~(bfd_vma) 1) size = 2; else size = 4; @@ -709,7 +713,7 @@ print_insn_shx (memaddr, info) return 2; } -int +int print_insn_shl (memaddr, info) bfd_vma memaddr; struct disassemble_info *info; @@ -721,7 +725,7 @@ print_insn_shl (memaddr, info) return r; } -int +int print_insn_sh (memaddr, info) bfd_vma memaddr; struct disassemble_info *info; diff --git a/contrib/binutils/opcodes/sh-opc.h b/contrib/binutils/opcodes/sh-opc.h index 38bfbcde4b62..4128c0818ae5 100644 --- a/contrib/binutils/opcodes/sh-opc.h +++ b/contrib/binutils/opcodes/sh-opc.h @@ -1,5 +1,6 @@ /* Definitions for SH opcodes. - Copyright (C) 1993, 94, 95, 96, 1997 Free Software Foundation, Inc. + Copyright 1993, 1994, 1995, 1997, 1999, 2000 + Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -39,16 +40,20 @@ typedef enum { REG_B, BRANCH_12, BRANCH_8, - DISP_8, - DISP_4, - IMM_4, - IMM_4BY2, - IMM_4BY4, + IMM0_4, + IMM0_4BY2, + IMM0_4BY4, + IMM1_4, + IMM1_4BY2, + IMM1_4BY4, PCRELIMM_8BY2, PCRELIMM_8BY4, - IMM_8, - IMM_8BY2, - IMM_8BY4, + IMM0_8, + IMM0_8BY2, + IMM0_8BY4, + IMM1_8, + IMM1_8BY2, + IMM1_8BY4, PPI, NOPX, NOPY, @@ -58,7 +63,8 @@ typedef enum { PMUL, PPI3, PDC, - PPIC + PPIC, + REPEAT } sh_nibble_type; typedef enum { @@ -68,6 +74,7 @@ typedef enum { A_DEC_M, A_DEC_N, A_DISP_GBR, + A_PC, A_DISP_PC, A_DISP_REG_M, A_DISP_REG_N, @@ -164,7 +171,7 @@ typedef struct { sh_opcode_info sh_table[] = { -/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM_8}, arch_sh1_up}, +/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh1_up}, /* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh1_up}, @@ -172,11 +179,11 @@ sh_opcode_info sh_table[] = { /* 0011nnnnmmmm1111 addv <REG_M>,<REG_N>*/{"addv",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_F}, arch_sh1_up}, -/* 11001001i8*1.... and #<imm>,R0 */{"and",{A_IMM,A_R0},{HEX_C,HEX_9,IMM_8}, arch_sh1_up}, +/* 11001001i8*1.... and #<imm>,R0 */{"and",{A_IMM,A_R0},{HEX_C,HEX_9,IMM0_8}, arch_sh1_up}, /* 0010nnnnmmmm1001 and <REG_M>,<REG_N> */{"and",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_9}, arch_sh1_up}, -/* 11001101i8*1.... and.b #<imm>,@(R0,GBR)*/{"and.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_D,IMM_8}, arch_sh1_up}, +/* 11001101i8*1.... and.b #<imm>,@(R0,GBR)*/{"and.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_D,IMM0_8}, arch_sh1_up}, /* 1010i12......... bra <bdisp12> */{"bra",{A_BDISP12},{HEX_A,BRANCH_12}, arch_sh1_up}, @@ -200,7 +207,7 @@ sh_opcode_info sh_table[] = { /* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}, arch_sh1_up}, -/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM_8}, arch_sh1_up}, +/* 10001000i8*1.... cmp/eq #<imm>,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM0_8}, arch_sh1_up}, /* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh1_up}, @@ -276,9 +283,9 @@ sh_opcode_info sh_table[] = { /* 0100nnnn1xxx0111 ldc.l <REG_N>,Rn_BANK */{"ldc.l",{A_INC_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_7}, arch_sh3_up}, -/* 10001110i8p2.... ldre @(<disp>,PC) */{"ldre",{A_BDISP8},{HEX_8,HEX_E,BRANCH_8}, arch_sh_dsp_up}, +/* 10001110i8p2.... ldre @(<disp>,PC) */{"ldre",{A_DISP_PC},{HEX_8,HEX_E,PCRELIMM_8BY2}, arch_sh_dsp_up}, -/* 10001100i8p2.... ldrs @(<disp>,PC) */{"ldrs",{A_BDISP8},{HEX_8,HEX_C,BRANCH_8}, arch_sh_dsp_up}, +/* 10001100i8p2.... ldrs @(<disp>,PC) */{"ldrs",{A_DISP_PC},{HEX_8,HEX_C,PCRELIMM_8BY2}, arch_sh_dsp_up}, /* 0100nnnn00001010 lds <REG_N>,MACH */{"lds",{A_REG_N,A_MACH},{HEX_4,REG_N,HEX_0,HEX_A}, arch_sh1_up}, @@ -328,7 +335,7 @@ sh_opcode_info sh_table[] = { /* 0100nnnnmmmm1111 mac.w @<REG_M>+,@<REG_N>+*/{"mac.w",{A_INC_M,A_INC_N},{HEX_4,REG_N,REG_M,HEX_F}, arch_sh1_up}, -/* 1110nnnni8*1.... mov #<imm>,<REG_N> */{"mov",{A_IMM,A_REG_N},{HEX_E,REG_N,IMM_8}, arch_sh1_up}, +/* 1110nnnni8*1.... mov #<imm>,<REG_N> */{"mov",{A_IMM,A_REG_N},{HEX_E,REG_N,IMM0_8}, arch_sh1_up}, /* 0110nnnnmmmm0011 mov <REG_M>,<REG_N> */{"mov",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_3}, arch_sh1_up}, @@ -338,9 +345,9 @@ sh_opcode_info sh_table[] = { /* 0010nnnnmmmm0000 mov.b <REG_M>,@<REG_N>*/{"mov.b",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_0}, arch_sh1_up}, -/* 10000100mmmmi4*1 mov.b @(<disp>,<REG_M>),R0*/{"mov.b",{A_DISP_REG_M,A_R0},{HEX_8,HEX_4,REG_M,IMM_4}, arch_sh1_up}, +/* 10000100mmmmi4*1 mov.b @(<disp>,<REG_M>),R0*/{"mov.b",{A_DISP_REG_M,A_R0},{HEX_8,HEX_4,REG_M,IMM0_4}, arch_sh1_up}, -/* 11000100i8*1.... mov.b @(<disp>,GBR),R0*/{"mov.b",{A_DISP_GBR,A_R0},{HEX_C,HEX_4,IMM_8}, arch_sh1_up}, +/* 11000100i8*1.... mov.b @(<disp>,GBR),R0*/{"mov.b",{A_DISP_GBR,A_R0},{HEX_C,HEX_4,IMM0_8}, arch_sh1_up}, /* 0000nnnnmmmm1100 mov.b @(R0,<REG_M>),<REG_N>*/{"mov.b",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_C}, arch_sh1_up}, @@ -348,11 +355,11 @@ sh_opcode_info sh_table[] = { /* 0110nnnnmmmm0000 mov.b @<REG_M>,<REG_N>*/{"mov.b",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_0}, arch_sh1_up}, -/* 10000000mmmmi4*1 mov.b R0,@(<disp>,<REG_M>)*/{"mov.b",{A_R0,A_DISP_REG_M},{HEX_8,HEX_0,REG_M,IMM_4}, arch_sh1_up}, +/* 10000000mmmmi4*1 mov.b R0,@(<disp>,<REG_M>)*/{"mov.b",{A_R0,A_DISP_REG_M},{HEX_8,HEX_0,REG_M,IMM1_4}, arch_sh1_up}, -/* 11000000i8*1.... mov.b R0,@(<disp>,GBR)*/{"mov.b",{A_R0,A_DISP_GBR},{HEX_C,HEX_0,IMM_8}, arch_sh1_up}, +/* 11000000i8*1.... mov.b R0,@(<disp>,GBR)*/{"mov.b",{A_R0,A_DISP_GBR},{HEX_C,HEX_0,IMM1_8}, arch_sh1_up}, -/* 0001nnnnmmmmi4*4 mov.l <REG_M>,@(<disp>,<REG_N>)*/{"mov.l",{ A_REG_M,A_DISP_REG_N},{HEX_1,REG_N,REG_M,IMM_4BY4}, arch_sh1_up}, +/* 0001nnnnmmmmi4*4 mov.l <REG_M>,@(<disp>,<REG_N>)*/{"mov.l",{ A_REG_M,A_DISP_REG_N},{HEX_1,REG_N,REG_M,IMM1_4BY4}, arch_sh1_up}, /* 0000nnnnmmmm0110 mov.l <REG_M>,@(R0,<REG_N>)*/{"mov.l",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_6}, arch_sh1_up}, @@ -360,9 +367,9 @@ sh_opcode_info sh_table[] = { /* 0010nnnnmmmm0010 mov.l <REG_M>,@<REG_N>*/{"mov.l",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_2}, arch_sh1_up}, -/* 0101nnnnmmmmi4*4 mov.l @(<disp>,<REG_M>),<REG_N>*/{"mov.l",{A_DISP_REG_M,A_REG_N},{HEX_5,REG_N,REG_M,IMM_4BY4}, arch_sh1_up}, +/* 0101nnnnmmmmi4*4 mov.l @(<disp>,<REG_M>),<REG_N>*/{"mov.l",{A_DISP_REG_M,A_REG_N},{HEX_5,REG_N,REG_M,IMM0_4BY4}, arch_sh1_up}, -/* 11000110i8*4.... mov.l @(<disp>,GBR),R0*/{"mov.l",{A_DISP_GBR,A_R0},{HEX_C,HEX_6,IMM_8BY4}, arch_sh1_up}, +/* 11000110i8*4.... mov.l @(<disp>,GBR),R0*/{"mov.l",{A_DISP_GBR,A_R0},{HEX_C,HEX_6,IMM0_8BY4}, arch_sh1_up}, /* 1101nnnni8p4.... mov.l @(<disp>,PC),<REG_N>*/{"mov.l",{A_DISP_PC,A_REG_N},{HEX_D,REG_N,PCRELIMM_8BY4}, arch_sh1_up}, @@ -372,7 +379,7 @@ sh_opcode_info sh_table[] = { /* 0110nnnnmmmm0010 mov.l @<REG_M>,<REG_N>*/{"mov.l",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_2}, arch_sh1_up}, -/* 11000010i8*4.... mov.l R0,@(<disp>,GBR)*/{"mov.l",{A_R0,A_DISP_GBR},{HEX_C,HEX_2,IMM_8BY4}, arch_sh1_up}, +/* 11000010i8*4.... mov.l R0,@(<disp>,GBR)*/{"mov.l",{A_R0,A_DISP_GBR},{HEX_C,HEX_2,IMM1_8BY4}, arch_sh1_up}, /* 0000nnnnmmmm0101 mov.w <REG_M>,@(R0,<REG_N>)*/{"mov.w",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_5}, arch_sh1_up}, @@ -380,9 +387,9 @@ sh_opcode_info sh_table[] = { /* 0010nnnnmmmm0001 mov.w <REG_M>,@<REG_N>*/{"mov.w",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_1}, arch_sh1_up}, -/* 10000101mmmmi4*2 mov.w @(<disp>,<REG_M>),R0*/{"mov.w",{A_DISP_REG_M,A_R0},{HEX_8,HEX_5,REG_M,IMM_4BY2}, arch_sh1_up}, +/* 10000101mmmmi4*2 mov.w @(<disp>,<REG_M>),R0*/{"mov.w",{A_DISP_REG_M,A_R0},{HEX_8,HEX_5,REG_M,IMM0_4BY2}, arch_sh1_up}, -/* 11000101i8*2.... mov.w @(<disp>,GBR),R0*/{"mov.w",{A_DISP_GBR,A_R0},{HEX_C,HEX_5,IMM_8BY2}, arch_sh1_up}, +/* 11000101i8*2.... mov.w @(<disp>,GBR),R0*/{"mov.w",{A_DISP_GBR,A_R0},{HEX_C,HEX_5,IMM0_8BY2}, arch_sh1_up}, /* 1001nnnni8p2.... mov.w @(<disp>,PC),<REG_N>*/{"mov.w",{A_DISP_PC,A_REG_N},{HEX_9,REG_N,PCRELIMM_8BY2}, arch_sh1_up}, @@ -392,9 +399,9 @@ sh_opcode_info sh_table[] = { /* 0110nnnnmmmm0001 mov.w @<REG_M>,<REG_N>*/{"mov.w",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_1}, arch_sh1_up}, -/* 10000001mmmmi4*2 mov.w R0,@(<disp>,<REG_M>)*/{"mov.w",{A_R0,A_DISP_REG_M},{HEX_8,HEX_1,REG_M,IMM_4BY2}, arch_sh1_up}, +/* 10000001mmmmi4*2 mov.w R0,@(<disp>,<REG_M>)*/{"mov.w",{A_R0,A_DISP_REG_M},{HEX_8,HEX_1,REG_M,IMM1_4BY2}, arch_sh1_up}, -/* 11000001i8*2.... mov.w R0,@(<disp>,GBR)*/{"mov.w",{A_R0,A_DISP_GBR},{HEX_C,HEX_1,IMM_8BY2}, arch_sh1_up}, +/* 11000001i8*2.... mov.w R0,@(<disp>,GBR)*/{"mov.w",{A_R0,A_DISP_GBR},{HEX_C,HEX_1,IMM1_8BY2}, arch_sh1_up}, /* 11000111i8p4.... mova @(<disp>,PC),R0*/{"mova",{A_DISP_PC,A_R0},{HEX_C,HEX_7,PCRELIMM_8BY4}, arch_sh1_up}, /* 0000nnnn11000011 movca.l R0,@<REG_N> */{"movca.l",{A_R0,A_IND_N},{HEX_0,REG_N,HEX_C,HEX_3}, arch_sh4_up}, @@ -424,11 +431,11 @@ sh_opcode_info sh_table[] = { /* 0000nnnn10110011 ocbwb @<REG_N> */{"ocbwb",{A_IND_N},{HEX_0,REG_N,HEX_B,HEX_3}, arch_sh4_up}, -/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM_8}, arch_sh1_up}, +/* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh1_up}, /* 0010nnnnmmmm1011 or <REG_M>,<REG_N> */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}, arch_sh1_up}, -/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM_8}, arch_sh1_up}, +/* 11001111i8*1.... or.b #<imm>,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh1_up}, /* 0000nnnn10000011 pref @<REG_N> */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh4_up}, @@ -449,7 +456,11 @@ sh_opcode_info sh_table[] = { /* 0100nnnn00010100 setrc <REG_N> */{"setrc",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_4}, arch_sh_dsp_up}, -/* 10000010i8*1.... setrc #<imm> */{"setrc",{A_IMM},{HEX_8,HEX_2,IMM_8}, arch_sh_dsp_up}, +/* 10000010i8*1.... setrc #<imm> */{"setrc",{A_IMM},{HEX_8,HEX_2,IMM0_8}, arch_sh_dsp_up}, + +/* repeat start end <REG_N> */{"repeat",{A_DISP_PC,A_DISP_PC,A_REG_N},{REPEAT,REG_N,HEX_1,HEX_4}, arch_sh_dsp_up}, + +/* repeat start end #<imm> */{"repeat",{A_DISP_PC,A_DISP_PC,A_IMM},{REPEAT,HEX_2,IMM0_8,HEX_8}, arch_sh_dsp_up}, /* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh3_up}, @@ -513,7 +524,7 @@ sh_opcode_info sh_table[] = { /* 0100nnnn01000011 stc.l SPC,@-<REG_N> */{"stc.l",{A_SPC,A_DEC_N},{HEX_4,REG_N,HEX_4,HEX_3}, arch_sh3_up}, -/* 0100nnnn00010011 stc.l GBR,@-<REG_N> */{"stc.l",{A_GBR,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_3}, arch_sh4_up}, +/* 0100nnnn00010011 stc.l GBR,@-<REG_N> */{"stc.l",{A_GBR,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_3}, arch_sh1_up}, /* 0100nnnn00110010 stc.l SGR,@-<REG_N> */{"stc.l",{A_SGR,A_DEC_N},{HEX_4,REG_N,HEX_3,HEX_2}, arch_sh4_up}, @@ -577,19 +588,19 @@ sh_opcode_info sh_table[] = { /* 0100nnnn00011011 tas.b @<REG_N> */{"tas.b",{A_IND_N},{HEX_4,REG_N,HEX_1,HEX_B}, arch_sh1_up}, -/* 11000011i8*1.... trapa #<imm> */{"trapa",{A_IMM},{HEX_C,HEX_3,IMM_8}, arch_sh1_up}, +/* 11000011i8*1.... trapa #<imm> */{"trapa",{A_IMM},{HEX_C,HEX_3,IMM0_8}, arch_sh1_up}, -/* 11001000i8*1.... tst #<imm>,R0 */{"tst",{A_IMM,A_R0},{HEX_C,HEX_8,IMM_8}, arch_sh1_up}, +/* 11001000i8*1.... tst #<imm>,R0 */{"tst",{A_IMM,A_R0},{HEX_C,HEX_8,IMM0_8}, arch_sh1_up}, /* 0010nnnnmmmm1000 tst <REG_M>,<REG_N> */{"tst",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_8}, arch_sh1_up}, -/* 11001100i8*1.... tst.b #<imm>,@(R0,GBR)*/{"tst.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_C,IMM_8}, arch_sh1_up}, +/* 11001100i8*1.... tst.b #<imm>,@(R0,GBR)*/{"tst.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_C,IMM0_8}, arch_sh1_up}, -/* 11001010i8*1.... xor #<imm>,R0 */{"xor",{A_IMM,A_R0},{HEX_C,HEX_A,IMM_8}, arch_sh1_up}, +/* 11001010i8*1.... xor #<imm>,R0 */{"xor",{A_IMM,A_R0},{HEX_C,HEX_A,IMM0_8}, arch_sh1_up}, /* 0010nnnnmmmm1010 xor <REG_M>,<REG_N> */{"xor",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_A}, arch_sh1_up}, -/* 11001110i8*1.... xor.b #<imm>,@(R0,GBR)*/{"xor.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_E,IMM_8}, arch_sh1_up}, +/* 11001110i8*1.... xor.b #<imm>,@(R0,GBR)*/{"xor.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_E,IMM0_8}, arch_sh1_up}, /* 0010nnnnmmmm1101 xtrct <REG_M>,<REG_N>*/{"xtrct",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_D}, arch_sh1_up}, @@ -609,33 +620,33 @@ sh_opcode_info sh_table[] = { /* 111101nnmmmm0000 movs.w @-<REG_N>,<DSP_REG_M> */ {"movs.w",{A_DEC_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_0}, arch_sh_dsp_up}, -/* 111101nnmmmm0001 movs.w @<REG_N>,<DSP_REG_M> */ {"movs.w",{A_IND_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_1}, arch_sh_dsp_up}, +/* 111101nnmmmm0001 movs.w @<REG_N>,<DSP_REG_M> */ {"movs.w",{A_IND_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_4}, arch_sh_dsp_up}, -/* 111101nnmmmm0010 movs.w @<REG_N>+,<DSP_REG_M> */ {"movs.w",{A_INC_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_2}, arch_sh_dsp_up}, +/* 111101nnmmmm0010 movs.w @<REG_N>+,<DSP_REG_M> */ {"movs.w",{A_INC_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_8}, arch_sh_dsp_up}, -/* 111101nnmmmm0011 movs.w @<REG_N>+r8,<DSP_REG_M> */ {"movs.w",{A_PMOD_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_3}, arch_sh_dsp_up}, +/* 111101nnmmmm0011 movs.w @<REG_N>+r8,<DSP_REG_M> */ {"movs.w",{A_PMOD_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_C}, arch_sh_dsp_up}, -/* 111101nnmmmm0100 movs.w <DSP_REG_M>,@-<REG_N> */ {"movs.w",{DSP_REG_M,A_DEC_N},{HEX_F,SDT_REG_N,REG_M,HEX_4}, arch_sh_dsp_up}, +/* 111101nnmmmm0100 movs.w <DSP_REG_M>,@-<REG_N> */ {"movs.w",{DSP_REG_M,A_DEC_N},{HEX_F,SDT_REG_N,REG_M,HEX_1}, arch_sh_dsp_up}, /* 111101nnmmmm0101 movs.w <DSP_REG_M>,@<REG_N> */ {"movs.w",{DSP_REG_M,A_IND_N},{HEX_F,SDT_REG_N,REG_M,HEX_5}, arch_sh_dsp_up}, -/* 111101nnmmmm0110 movs.w <DSP_REG_M>,@<REG_N>+ */ {"movs.w",{DSP_REG_M,A_INC_N},{HEX_F,SDT_REG_N,REG_M,HEX_6}, arch_sh_dsp_up}, +/* 111101nnmmmm0110 movs.w <DSP_REG_M>,@<REG_N>+ */ {"movs.w",{DSP_REG_M,A_INC_N},{HEX_F,SDT_REG_N,REG_M,HEX_9}, arch_sh_dsp_up}, -/* 111101nnmmmm0111 movs.w <DSP_REG_M>,@<REG_N>+r8 */ {"movs.w",{DSP_REG_M,A_PMOD_N},{HEX_F,SDT_REG_N,REG_M,HEX_7}, arch_sh_dsp_up}, +/* 111101nnmmmm0111 movs.w <DSP_REG_M>,@<REG_N>+r8 */ {"movs.w",{DSP_REG_M,A_PMOD_N},{HEX_F,SDT_REG_N,REG_M,HEX_D}, arch_sh_dsp_up}, -/* 111101nnmmmm1000 movs.l @-<REG_N>,<DSP_REG_M> */ {"movs.l",{A_DEC_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_8}, arch_sh_dsp_up}, +/* 111101nnmmmm1000 movs.l @-<REG_N>,<DSP_REG_M> */ {"movs.l",{A_DEC_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_2}, arch_sh_dsp_up}, -/* 111101nnmmmm1001 movs.l @<REG_N>,<DSP_REG_M> */ {"movs.l",{A_IND_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_9}, arch_sh_dsp_up}, +/* 111101nnmmmm1001 movs.l @<REG_N>,<DSP_REG_M> */ {"movs.l",{A_IND_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_6}, arch_sh_dsp_up}, /* 111101nnmmmm1010 movs.l @<REG_N>+,<DSP_REG_M> */ {"movs.l",{A_INC_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_A}, arch_sh_dsp_up}, -/* 111101nnmmmm1011 movs.l @<REG_N>+r8,<DSP_REG_M> */ {"movs.l",{A_PMOD_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_B}, arch_sh_dsp_up}, +/* 111101nnmmmm1011 movs.l @<REG_N>+r8,<DSP_REG_M> */ {"movs.l",{A_PMOD_N,DSP_REG_M},{HEX_F,SDT_REG_N,REG_M,HEX_E}, arch_sh_dsp_up}, -/* 111101nnmmmm1100 movs.l <DSP_REG_M>,@-<REG_N> */ {"movs.l",{DSP_REG_M,A_DEC_N},{HEX_F,SDT_REG_N,REG_M,HEX_C}, arch_sh_dsp_up}, +/* 111101nnmmmm1100 movs.l <DSP_REG_M>,@-<REG_N> */ {"movs.l",{DSP_REG_M,A_DEC_N},{HEX_F,SDT_REG_N,REG_M,HEX_3}, arch_sh_dsp_up}, -/* 111101nnmmmm1101 movs.l <DSP_REG_M>,@<REG_N> */ {"movs.l",{DSP_REG_M,A_IND_N},{HEX_F,SDT_REG_N,REG_M,HEX_D}, arch_sh_dsp_up}, +/* 111101nnmmmm1101 movs.l <DSP_REG_M>,@<REG_N> */ {"movs.l",{DSP_REG_M,A_IND_N},{HEX_F,SDT_REG_N,REG_M,HEX_7}, arch_sh_dsp_up}, -/* 111101nnmmmm1110 movs.l <DSP_REG_M>,@<REG_N>+ */ {"movs.l",{DSP_REG_M,A_INC_N},{HEX_F,SDT_REG_N,REG_M,HEX_E}, arch_sh_dsp_up}, +/* 111101nnmmmm1110 movs.l <DSP_REG_M>,@<REG_N>+ */ {"movs.l",{DSP_REG_M,A_INC_N},{HEX_F,SDT_REG_N,REG_M,HEX_B}, arch_sh_dsp_up}, /* 111101nnmmmm1111 movs.l <DSP_REG_M>,@<REG_N>+r8 */ {"movs.l",{DSP_REG_M,A_PMOD_N},{HEX_F,SDT_REG_N,REG_M,HEX_F}, arch_sh_dsp_up}, @@ -667,22 +678,22 @@ sh_opcode_info sh_table[] = { {"pwad", {DSP_REG_X,DSP_REG_Y,DSP_REG_N},{PPI,PPI3,HEX_B,HEX_4}, arch_sh_dsp_up}, /* 10001000xxyynnnn pabs <DSP_REG_X>,<DSP_REG_N> */ {"pabs", {DSP_REG_X,DSP_REG_N},{PPI,PPI3,HEX_8,HEX_8}, arch_sh_dsp_up}, -/* 10011000xxyynnnn prnd <DSP_REG_X>,<DSP_REG_N> */ -{"prnd", {DSP_REG_X,DSP_REG_N},{PPI,PPI3,HEX_9,HEX_8}, arch_sh_dsp_up}, /* 10101000xxyynnnn pabs <DSP_REG_Y>,<DSP_REG_N> */ {"pabs", {DSP_REG_Y,DSP_REG_N},{PPI,PPI3,HEX_A,HEX_8}, arch_sh_dsp_up}, +/* 10011000xxyynnnn prnd <DSP_REG_X>,<DSP_REG_N> */ +{"prnd", {DSP_REG_X,DSP_REG_N},{PPI,PPI3,HEX_9,HEX_8}, arch_sh_dsp_up}, /* 10111000xxyynnnn prnd <DSP_REG_Y>,<DSP_REG_N> */ {"prnd", {DSP_REG_Y,DSP_REG_N},{PPI,PPI3,HEX_B,HEX_8}, arch_sh_dsp_up}, {"dct",{0},{PPI,PDC,HEX_1}, arch_sh_dsp_up}, {"dcf",{0},{PPI,PDC,HEX_2}, arch_sh_dsp_up}, -/* 00000iiiiiiinnnn pshl #<imm>,<DSP_REG_N> */ {"pshl",{A_IMM,DSP_REG_N},{PPI,PSH,HEX_0}, arch_sh_dsp_up}, /* 10000001xxyynnnn pshl <DSP_REG_X>,<DSP_REG_Y>,<DSP_REG_N> */ {"pshl", {DSP_REG_X,DSP_REG_Y,DSP_REG_N},{PPI,PPIC,HEX_8,HEX_1}, arch_sh_dsp_up}, -/* 00010iiiiiiinnnn psha #<imm>,<DSP_REG_N> */ {"psha",{A_IMM,DSP_REG_N},{PPI,PSH,HEX_1}, arch_sh_dsp_up}, +/* 00000iiiiiiinnnn pshl #<imm>,<DSP_REG_N> */ {"pshl",{A_IMM,DSP_REG_N},{PPI,PSH,HEX_0}, arch_sh_dsp_up}, /* 10010001xxyynnnn psha <DSP_REG_X>,<DSP_REG_Y>,<DSP_REG_N> */ {"psha", {DSP_REG_X,DSP_REG_Y,DSP_REG_N},{PPI,PPIC,HEX_9,HEX_1}, arch_sh_dsp_up}, +/* 00010iiiiiiinnnn psha #<imm>,<DSP_REG_N> */ {"psha",{A_IMM,DSP_REG_N},{PPI,PSH,HEX_1}, arch_sh_dsp_up}, /* 10100001xxyynnnn psub <DSP_REG_X>,<DSP_REG_Y>,<DSP_REG_N> */ {"psub", {DSP_REG_X,DSP_REG_Y,DSP_REG_N},{PPI,PPIC,HEX_A,HEX_1}, arch_sh_dsp_up}, /* 10110001xxyynnnn padd <DSP_REG_X>,<DSP_REG_Y>,<DSP_REG_N> */ @@ -695,10 +706,10 @@ sh_opcode_info sh_table[] = { {"por", {DSP_REG_X,DSP_REG_Y,DSP_REG_N},{PPI,PPIC,HEX_B,HEX_5}, arch_sh_dsp_up}, /* 10001001xxyynnnn pdec <DSP_REG_X>,<DSP_REG_N> */ {"pdec", {DSP_REG_X,DSP_REG_N},{PPI,PPIC,HEX_8,HEX_9}, arch_sh_dsp_up}, -/* 10011001xxyynnnn pinc <DSP_REG_X>,<DSP_REG_N> */ -{"pinc", {DSP_REG_X,DSP_REG_N},{PPI,PPIC,HEX_9,HEX_9}, arch_sh_dsp_up}, /* 10101001xxyynnnn pdec <DSP_REG_Y>,<DSP_REG_N> */ {"pdec", {DSP_REG_Y,DSP_REG_N},{PPI,PPIC,HEX_A,HEX_9}, arch_sh_dsp_up}, +/* 10011001xxyynnnn pinc <DSP_REG_X>,<DSP_REG_N> */ +{"pinc", {DSP_REG_X,DSP_REG_N},{PPI,PPIC,HEX_9,HEX_9}, arch_sh_dsp_up}, /* 10111001xxyynnnn pinc <DSP_REG_Y>,<DSP_REG_N> */ {"pinc", {DSP_REG_Y,DSP_REG_N},{PPI,PPIC,HEX_B,HEX_9}, arch_sh_dsp_up}, /* 10001101xxyynnnn pclr <DSP_REG_N> */ @@ -709,10 +720,10 @@ sh_opcode_info sh_table[] = { {"pdmsb", {DSP_REG_Y,DSP_REG_N},{PPI,PPIC,HEX_B,HEX_D}, arch_sh_dsp_up}, /* 11001001xxyynnnn pneg <DSP_REG_X>,<DSP_REG_N> */ {"pneg", {DSP_REG_X,DSP_REG_N},{PPI,PPIC,HEX_C,HEX_9}, arch_sh_dsp_up}, -/* 11011001xxyynnnn pcopy <DSP_REG_X>,<DSP_REG_N> */ -{"pcopy", {DSP_REG_X,DSP_REG_N},{PPI,PPIC,HEX_D,HEX_9}, arch_sh_dsp_up}, /* 11101001xxyynnnn pneg <DSP_REG_Y>,<DSP_REG_N> */ {"pneg", {DSP_REG_Y,DSP_REG_N},{PPI,PPIC,HEX_E,HEX_9}, arch_sh_dsp_up}, +/* 11011001xxyynnnn pcopy <DSP_REG_X>,<DSP_REG_N> */ +{"pcopy", {DSP_REG_X,DSP_REG_N},{PPI,PPIC,HEX_D,HEX_9}, arch_sh_dsp_up}, /* 11111001xxyynnnn pcopy <DSP_REG_Y>,<DSP_REG_N> */ {"pcopy", {DSP_REG_Y,DSP_REG_N},{PPI,PPIC,HEX_F,HEX_9}, arch_sh_dsp_up}, /* 11001101xxyynnnn psts MACH,<DSP_REG_N> */ |