diff options
| author | David Xu <davidxu@FreeBSD.org> | 2006-06-19 07:51:47 +0000 |
|---|---|---|
| committer | David Xu <davidxu@FreeBSD.org> | 2006-06-19 07:51:47 +0000 |
| commit | 85b2d575de0138e89b36c00b12b048ed49c47d66 (patch) | |
| tree | cbec7d4c6ee9a5a7bba61ea0f2836cd9d92054f3 | |
| parent | b33484302daafba84a535a95cb7f03cd24c72088 (diff) | |
Notes
| -rw-r--r-- | sys/i386/i386/identcpu.c | 11 | ||||
| -rw-r--r-- | sys/i386/include/specialreg.h | 1 |
2 files changed, 12 insertions, 0 deletions
diff --git a/sys/i386/i386/identcpu.c b/sys/i386/i386/identcpu.c index 53f6618cb5c4..aff022f123cc 100644 --- a/sys/i386/i386/identcpu.c +++ b/sys/i386/i386/identcpu.c @@ -203,6 +203,7 @@ printcpuinfo(void) if (strcmp(cpu_vendor, "GenuineIntel") == 0) { if ((cpu_id & 0xf00) > 0x300) { u_int brand_index; + u_int model; cpu_model[0] = '\0'; @@ -315,6 +316,16 @@ printcpuinfo(void) case 0xf00: strcat(cpu_model, "Pentium 4"); cpu = CPU_P4; + model = (cpu_id & 0x0f0) >> 4; + if (model == 3 || model == 4 || model == 6) { + uint64_t tmp; + + tmp = rdmsr(MSR_IA32_MISC_ENABLE); + wrmsr(MSR_IA32_MISC_ENABLE, + tmp & ~(1LL << 22)); + do_cpuid(0, regs); + cpu_high = regs[0]; + } break; default: strcat(cpu_model, "unknown"); diff --git a/sys/i386/include/specialreg.h b/sys/i386/include/specialreg.h index e189b229a95f..3055b7cad7d6 100644 --- a/sys/i386/include/specialreg.h +++ b/sys/i386/include/specialreg.h @@ -175,6 +175,7 @@ #define MSR_THERM_CONTROL 0x19a #define MSR_THERM_INTERRUPT 0x19b #define MSR_THERM_STATUS 0x19c +#define MSR_IA32_MISC_ENABLE 0x1A0 #define MSR_DEBUGCTLMSR 0x1d9 #define MSR_LASTBRANCHFROMIP 0x1db #define MSR_LASTBRANCHTOIP 0x1dc |