6 files changed, 614 insertions, 434 deletions

diff --git a/sys/dev/advansys/adv_pci.c b/sys/dev/advansys/adv_pci.c
index 8f8fc58f374b..5e145281819b 100644
--- a/sys/dev/advansys/adv_pci.c
+++ b/sys/dev/advansys/adv_pci.c
@@ -3,12 +3,20 @@
  * Advanced Systems Inc. SCSI controllers:
  *
  *   Connectivity Products:
- *	ABP920   - Bus-Master PCI (16 CDB)
- *	ABP930   - Bus-Master PCI (16 CDB) *
- *	ABP930U  - Bus-Master PCI Ultra (16 CDB)
- *	ABP930UA - Bus-Master PCI Ultra (16 CDB)
- *	ABP960   - Bus-Master PCI MAC/PC (16 CDB) **
- *	ABP960U  - Bus-Master PCI MAC/PC Ultra (16 CDB)
+ *	ABP902/3902	- Bus-Master PCI (16 CDB)
+ *	ABP3905		- Bus-Master PCI (16 CDB)
+ *	ABP915		- Bus-Master PCI (16 CDB)
+ *	ABP920		- Bus-Master PCI (16 CDB)
+ *	ABP3922		- Bus-Master PCI (16 CDB)
+ *	ABP3925		- Bus-Master PCI (16 CDB)
+ *	ABP930		- Bus-Master PCI (16 CDB) *
+ *	ABP930U		- Bus-Master PCI Ultra (16 CDB)
+ *	ABP930UA	- Bus-Master PCI Ultra (16 CDB)
+ *	ABP940UA/3940UA - Bus-Master PCI Ultra (240 CDB)
+ *	ABP960		- Bus-Master PCI MAC/PC (16 CDB) **
+ *	ABP960U		- Bus-Master PCI MAC/PC Ultra (16 CDB)
+ *	ABP970U		- Bus-Master PCI MAC/PC Ultra (240 CDB)
+ *	ABP3960UA	- Bus-Master PCI MAC/PC (240 CDB)
  *
  *   Single Channel Products:
  *	ABP940 - Bus-Master PCI (240 CDB)
@@ -18,6 +26,7 @@
  *
  *   Dual Channel Products:  
  *	ABP950 - Dual Channel Bus-Master PCI (240 CDB Per Channel)
+ *	ABP980UA/3980UA - Four Channel Bus-Master PCI Ultra (16 CDB Per Chan.)
  *
  *   Footnotes:
  *	 * This board has been sold by SIIG as the Fast SCSI Pro PCI.
@@ -31,7 +40,7 @@
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions, and the following disclaimer,
- *    without modification, immediately at the beginning of the file.
+ *    without modification.
  * 2. The name of the author may not be used to endorse or promote products
  *    derived from this software without specific prior written permission.
  *
@@ -67,7 +76,7 @@
 
 #define	PCI_DEVICE_ID_ADVANSYS_1200A	0x110010CD
 #define	PCI_DEVICE_ID_ADVANSYS_1200B	0x120010CD
-#define	PCI_DEVICE_ID_ADVANSYS_ULTRA	0x130010CD
+#define	PCI_DEVICE_ID_ADVANSYS_3000	0x130010CD
 #define	PCI_DEVICE_REV_ADVANSYS_3150	0x02
 #define	PCI_DEVICE_REV_ADVANSYS_3050	0x03
 
@@ -98,17 +107,21 @@ COMPAT_PCI_DRIVER (adv_pci, adv_pci_driver);
 static const char*
 advpciprobe(pcici_t tag, pcidi_t type)
 {
-	int rev = pci_conf_read(tag, PCI_CLASS_REG) & 0xff;
+	int rev;
+
+	rev = pci_conf_read(tag, PCI_CLASS_REG) & PCI_REVISION_MASK;
 	switch (type) {
 	case PCI_DEVICE_ID_ADVANSYS_1200A:
 		return ("AdvanSys ASC1200A SCSI controller");
 	case PCI_DEVICE_ID_ADVANSYS_1200B:
 		return ("AdvanSys ASC1200B SCSI controller");
-	case PCI_DEVICE_ID_ADVANSYS_ULTRA:
+	case PCI_DEVICE_ID_ADVANSYS_3000:
 		if (rev == PCI_DEVICE_REV_ADVANSYS_3150)
-			return ("AdvanSys ASC3150 Ultra SCSI controller");
-		else
-			return ("AdvanSys ASC3050 Ultra SCSI controller");
+			return ("AdvanSys ASC3150 SCSI controller");
+		else if (rev == PCI_DEVICE_REV_ADVANSYS_3050)
+			return ("AdvanSys ASC3030/50 SCSI controller");
+		else if (rev >= PCI_DEVICE_REV_ADVANSYS_3150)
+			return ("Unknown AdvanSys controller");
 		break;
 	default:
 		break;
@@ -231,9 +244,7 @@ advpciattach(pcici_t config_id, int unit)
 
 		if (adv->chip_version >= ADV_CHIP_VER_PCI_ULTRA_3150)
 			adv->type |= ADV_ULTRA;
-		if (adv->chip_version == ADV_CHIP_VER_PCI_ULTRA_3150)
-			extra_cfg = ADV_IFC_ACT_NEG | ADV_IFC_SLEW_RATE;
-		else if (adv->chip_version == ADV_CHIP_VER_PCI_ULTRA_3050)
+		if (adv->chip_version == ADV_CHIP_VER_PCI_ULTRA_3050)
 			extra_cfg = ADV_IFC_ACT_NEG | ADV_IFC_WR_EN_FILTER;
 		else
 			extra_cfg = ADV_IFC_ACT_NEG | ADV_IFC_SLEW_RATE;
diff --git a/sys/dev/advansys/advansys.c b/sys/dev/advansys/advansys.c
index 19cb21ad6fb5..7db525e90b2e 100644
--- a/sys/dev/advansys/advansys.c
+++ b/sys/dev/advansys/advansys.c
@@ -8,7 +8,7 @@
  *			ABP940UA, ABP950, ABP960, ABP960U, ABP960UA,
  *			ABP970, ABP970U
  *
- * Copyright (c) 1996-1998 Justin Gibbs.
+ * Copyright (c) 1996-2000 Justin Gibbs.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -88,7 +88,9 @@ static __inline struct adv_ccb_info *
 		adv_get_ccb_info(struct adv_softc *adv);
 static __inline void adv_free_ccb_info(struct adv_softc *adv,
 				       struct adv_ccb_info *cinfo);
-
+static __inline void adv_set_state(struct adv_softc *adv, adv_state state);
+static __inline void adv_clear_state(struct adv_softc *adv, union ccb* ccb);
+static void adv_clear_state_really(struct adv_softc *adv, union ccb* ccb);
 
 struct adv_softc *advsoftcs[NADV];   /* XXX Config should handle this */
 
@@ -120,6 +122,62 @@ adv_free_ccb_info(struct adv_softc *adv, struct adv_ccb_info *cinfo)
 	splx(opri);
 }
 
+static __inline void
+adv_set_state(struct adv_softc *adv, adv_state state)
+{
+	if (adv->state == 0)
+		xpt_freeze_simq(adv->sim, /*count*/1);
+	adv->state |= state;
+}
+
+static __inline void
+adv_clear_state(struct adv_softc *adv, union ccb* ccb)
+{
+	if (adv->state != 0)
+		adv_clear_state_really(adv, ccb);
+}
+
+static void
+adv_clear_state_really(struct adv_softc *adv, union ccb* ccb)
+{
+	if ((adv->state & ADV_BUSDMA_BLOCK_CLEARED) != 0)
+		adv->state &= ~(ADV_BUSDMA_BLOCK_CLEARED|ADV_BUSDMA_BLOCK);
+	if ((adv->state & ADV_RESOURCE_SHORTAGE) != 0) {
+		int openings;
+
+		openings = adv->max_openings - adv->cur_active - ADV_MIN_FREE_Q;
+		if (openings >= adv->openings_needed) {
+			adv->state &= ~ADV_RESOURCE_SHORTAGE;
+			adv->openings_needed = 0;
+		}
+	}
+		
+	if ((adv->state & ADV_IN_TIMEOUT) != 0) {
+		struct adv_ccb_info *cinfo;
+
+		cinfo = (struct adv_ccb_info *)ccb->ccb_h.ccb_cinfo_ptr;
+		if ((cinfo->state & ACCB_RECOVERY_CCB) != 0) {
+			struct ccb_hdr *ccb_h;
+
+			/*
+			 * We now traverse our list of pending CCBs
+			 * and reinstate their timeouts.
+			 */
+			ccb_h = LIST_FIRST(&adv->pending_ccbs);
+			while (ccb_h != NULL) {
+				ccb_h->timeout_ch =
+				    timeout(adv_timeout, (caddr_t)ccb_h,
+					    (ccb_h->timeout * hz) / 1000);
+				ccb_h = LIST_NEXT(ccb_h, sim_links.le);
+			}
+			adv->state &= ~ADV_IN_TIMEOUT;
+			printf("%s: No longer in timeout\n", adv_name(adv));
+		}
+	}
+	if (adv->state == 0)
+		ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
+}
+
 void     
 adv_map(void *arg, bus_dma_segment_t *segs, int nseg, int error)
 {
@@ -162,6 +220,7 @@ adv_action(struct cam_sim *sim, union ccb *ccb)
 			panic("XXX Handle CCB info error!!!");
 
 		ccb_h->ccb_cinfo_ptr = cinfo;
+		cinfo->ccb = ccb;
 
 		/* Only use S/G if there is a transfer */
 		if ((ccb_h->flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
@@ -189,10 +248,8 @@ adv_action(struct cam_sim *sim, union ccb *ccb)
 						 * until our mapping is
 						 * returned.
 						 */
-						xpt_freeze_simq(adv->sim,
-								/*count*/1);
-						cinfo->state |=
-						    ACCB_RELEASE_SIMQ;
+						adv_set_state(adv,
+							      ADV_BUSDMA_BLOCK);
 					}
 					splx(s);
 				} else {
@@ -406,7 +463,7 @@ adv_action(struct cam_sim *sim, union ccb *ccb)
 
 		s = splcam();
 		adv_stop_execution(adv);
-		adv_reset_bus(adv);
+		adv_reset_bus(adv, /*initiate_reset*/TRUE);
 		adv_start_execution(adv);
 		splx(s);
 
@@ -473,6 +530,13 @@ adv_execute_ccb(void *arg, bus_dma_segment_t *dm_segs,
 	adv = (struct adv_softc *)cam_sim_softc(sim);
 	cinfo = (struct adv_ccb_info *)csio->ccb_h.ccb_cinfo_ptr;
 
+	/*
+	 * Setup our done routine to release the simq on
+	 * the next ccb that completes.
+	 */
+	if ((adv->state & ADV_BUSDMA_BLOCK) != 0)
+		adv->state |= ADV_BUSDMA_BLOCK_CLEARED;
+
 	if ((ccb_h->flags & CAM_CDB_POINTER) != 0) {
 		if ((ccb_h->flags & CAM_CDB_PHYS) == 0) {
 			/* XXX Need phystovirt!!!! */
@@ -495,7 +559,7 @@ adv_execute_ccb(void *arg, bus_dma_segment_t *dm_segs,
 	scsiq.q1.target_lun = ccb_h->target_lun;
 	scsiq.q1.sense_len = csio->sense_len;
 	scsiq.q1.extra_bytes = 0;
-	scsiq.q2.ccb_ptr = (u_int32_t)csio;
+	scsiq.q2.ccb_index = cinfo - adv->ccb_infos;
 	scsiq.q2.target_ix = ADV_TIDLUN_TO_IX(ccb_h->target_id,
 					      ccb_h->target_lun);
 	scsiq.q2.flag = 0;
@@ -540,12 +604,9 @@ adv_execute_ccb(void *arg, bus_dma_segment_t *dm_segs,
 	 * be aborted.
 	 */             
 	if (ccb_h->status != CAM_REQ_INPROG) {
-		if (nsegments != 0) {
+		if (nsegments != 0)
 			bus_dmamap_unload(adv->buffer_dmat, cinfo->dmamap);
-		}
-		if ((cinfo->state & ACCB_RELEASE_SIMQ) != 0) {
-			ccb_h->status |= CAM_RELEASE_SIMQ;
-		}
+		adv_clear_state(adv, (union ccb *)csio);
 		adv_free_ccb_info(adv, cinfo);
 		xpt_done((union ccb *)csio);
 		splx(s);
@@ -554,16 +615,11 @@ adv_execute_ccb(void *arg, bus_dma_segment_t *dm_segs,
 
 	if (adv_execute_scsi_queue(adv, &scsiq, csio->dxfer_len) != 0) {
 		/* Temporary resource shortage */
-		if (nsegments != 0) {
+		adv_set_state(adv, ADV_RESOURCE_SHORTAGE);
+		if (nsegments != 0)
 			bus_dmamap_unload(adv->buffer_dmat, cinfo->dmamap);
-		}
-		ccb_h->status = CAM_REQUEUE_REQ;
-		if ((cinfo->state & ACCB_RELEASE_SIMQ) != 0)
-			ccb_h->status |= CAM_RELEASE_SIMQ;
-
-		/* Unfreeze when resources are available */
-		xpt_freeze_simq(adv->sim, /*count*/1);
-
+		csio->ccb_h.status = CAM_REQUEUE_REQ;
+		adv_clear_state(adv, (union ccb *)csio);
 		adv_free_ccb_info(adv, cinfo);
 		xpt_done((union ccb *)csio);
 		splx(s);
@@ -584,20 +640,16 @@ adv_alloc_ccb_info(struct adv_softc *adv)
 	int error;
 	struct adv_ccb_info *cinfo;
 
-	cinfo = malloc(sizeof(*cinfo), M_DEVBUF, M_NOWAIT);
-	if (cinfo == NULL) {
-		printf("%s: Can't malloc CCB info\n", adv_name(adv));
-		return (NULL);
-	}
+	cinfo = &adv->ccb_infos[adv->ccb_infos_allocated];
 	cinfo->state = ACCB_FREE;
 	error = bus_dmamap_create(adv->buffer_dmat, /*flags*/0,
 				  &cinfo->dmamap);
 	if (error != 0) {
 		printf("%s: Unable to allocate CCB info "
 		       "dmamap - error %d\n", adv_name(adv), error);
-		free(cinfo, M_DEVBUF);
-		cinfo = NULL;
+		return (NULL);
 	}
+	adv->ccb_infos_allocated++;
 	return (cinfo);
 }
 
@@ -605,7 +657,6 @@ static void
 adv_destroy_ccb_info(struct adv_softc *adv, struct adv_ccb_info *cinfo)
 {
 	bus_dmamap_destroy(adv->buffer_dmat, cinfo->dmamap);
-	free(cinfo, M_DEVBUF);
 }
 
 void
@@ -645,10 +696,7 @@ adv_timeout(void *arg)
 		 * in attempting to handle errors in parrallel.  Timeouts will
 		 * be reinstated when the recovery process ends.
 		 */
-		if ((cinfo->state & ACCB_RELEASE_SIMQ) == 0) {
-			xpt_freeze_simq(adv->sim, /*count*/1);
-			cinfo->state |= ACCB_RELEASE_SIMQ;
-		}
+		adv_set_state(adv, ADV_IN_TIMEOUT);
 
 		/* This CCB is the CCB representing our recovery actions */
 		cinfo->state |= ACCB_RECOVERY_CCB|ACCB_ABORT_QUEUED;
@@ -674,7 +722,7 @@ adv_timeout(void *arg)
 		printf("Resetting bus\n");		
 		ccb->ccb_h.status &= ~CAM_STATUS_MASK;
 		ccb->ccb_h.status |= CAM_CMD_TIMEOUT;
-		adv_reset_bus(adv);
+		adv_reset_bus(adv, /*initiate_reset*/TRUE);
 	}
 	adv_start_execution(adv);
 	splx(s);
@@ -718,7 +766,7 @@ void
 adv_free(struct adv_softc *adv)
 {
 	switch (adv->init_level) {
-	case 5:
+	case 6:
 	{
 		struct adv_ccb_info *cinfo;
 
@@ -729,15 +777,17 @@ adv_free(struct adv_softc *adv)
 		
 		bus_dmamap_unload(adv->sense_dmat, adv->sense_dmamap);
 	}
-	case 4:
+	case 5:
 		bus_dmamem_free(adv->sense_dmat, adv->sense_buffers,
                                 adv->sense_dmamap);
-	case 3:
+	case 4:
 		bus_dma_tag_destroy(adv->sense_dmat);
-	case 2:
+	case 3:
 		bus_dma_tag_destroy(adv->buffer_dmat);
-	case 1:
+	case 2:
 		bus_dma_tag_destroy(adv->parent_dmat);
+	case 1:
+		free(adv->ccb_infos, M_DEVBUF);
 	case 0:
 		break;
 	}
@@ -749,18 +799,18 @@ adv_init(struct adv_softc *adv)
 {
 	struct	  adv_eeprom_config eeprom_config;
 	int	  checksum, i;
+	int	  max_sync;
 	u_int16_t config_lsw;
 	u_int16_t config_msw;
 
-	adv_reset_chip_and_scsi_bus(adv);
 	adv_lib_init(adv);
 
-        /*
-         * Stop script execution.
-         */  
-        adv_write_lram_16(adv, ADV_HALTCODE_W, 0x00FE);
-        adv_stop_execution(adv);
-	if (adv_is_chip_halted(adv) == 0) {
+  	/*
+	 * Stop script execution.
+	 */  
+	adv_write_lram_16(adv, ADV_HALTCODE_W, 0x00FE);
+	adv_stop_execution(adv);
+	if (adv_stop_chip(adv) == 0 || adv_is_chip_halted(adv) == 0) {
 		printf("adv%d: Unable to halt adapter. Initialization"
 		       "failed\n", adv->unit);
 		return (1);
@@ -776,7 +826,7 @@ adv_init(struct adv_softc *adv)
 	config_lsw = ADV_INW(adv, ADV_CONFIG_LSW);
 
 	if ((config_msw & ADV_CFG_MSW_CLR_MASK) != 0) {
-		config_msw &= (~(ADV_CFG_MSW_CLR_MASK));
+		config_msw &= ~ADV_CFG_MSW_CLR_MASK;
 		/*
 		 * XXX The Linux code flags this as an error,
 		 * but what should we report to the user???
@@ -789,8 +839,6 @@ adv_init(struct adv_softc *adv)
 	/* Suck in the configuration from the EEProm */
 	checksum = adv_get_eeprom_config(adv, &eeprom_config);
 
-	eeprom_config.cfg_msw &= (~(ADV_CFG_MSW_CLR_MASK));
-
 	if (ADV_INW(adv, ADV_CHIP_STATUS) & ADV_CSW_AUTO_CONFIG) {
 		/*
 		 * XXX The Linux code sets a warning level for this
@@ -798,38 +846,15 @@ adv_init(struct adv_softc *adv)
 		 * the user.  What does this mean???
 		 */
 		if (adv->chip_version == 3) {
-			if (eeprom_config.cfg_lsw != config_lsw) {
-				eeprom_config.cfg_lsw =
-						ADV_INW(adv, ADV_CONFIG_LSW);
-			}
+			if (eeprom_config.cfg_lsw != config_lsw)
+				eeprom_config.cfg_lsw = config_lsw;
 			if (eeprom_config.cfg_msw != config_msw) {
-				eeprom_config.cfg_msw =
-						ADV_INW(adv, ADV_CONFIG_MSW);
+				eeprom_config.cfg_msw = config_msw;
 			}
 		}
 	}
-	eeprom_config.cfg_lsw |= ADV_CFG_LSW_HOST_INT_ON;
-	if (adv_test_external_lram(adv) == 0) {
-		/*
-		 * XXX What about non PCI cards with no
-		 *     external LRAM????
-		 */
-		if ((adv->type & (ADV_PCI|ADV_ULTRA)) == (ADV_PCI|ADV_ULTRA)) {
-			eeprom_config.max_total_qng =
-			    ADV_MAX_PCI_ULTRA_INRAM_TOTAL_QNG;
-			eeprom_config.max_tag_qng =
-			    ADV_MAX_PCI_ULTRA_INRAM_TAG_QNG;
-		} else {
-			eeprom_config.cfg_msw |= 0x0800;
-			config_msw |= 0x0800;
-			ADV_OUTW(adv, ADV_CONFIG_MSW, config_msw);
-			eeprom_config.max_total_qng =
-			     ADV_MAX_PCI_INRAM_TOTAL_QNG;
-			eeprom_config.max_tag_qng = ADV_MAX_INRAM_TAG_QNG;
-		}
-		adv->max_openings = eeprom_config.max_total_qng;
-	}
 	if (checksum == eeprom_config.chksum) {
+
 		/* Range/Sanity checking */
 		if (eeprom_config.max_total_qng < ADV_MIN_TOTAL_QNG) {
 			eeprom_config.max_total_qng = ADV_MIN_TOTAL_QNG;
@@ -844,19 +869,27 @@ adv_init(struct adv_softc *adv)
 			eeprom_config.max_tag_qng = ADV_MIN_TAG_Q_PER_DVC;
 		}
 		adv->max_openings = eeprom_config.max_total_qng;
-
 		adv->user_disc_enable = eeprom_config.disc_enable;
 		adv->user_cmd_qng_enabled = eeprom_config.use_cmd_qng;
 		adv->isa_dma_speed = EEPROM_DMA_SPEED(eeprom_config);
 		adv->scsi_id = EEPROM_SCSIID(eeprom_config) & ADV_MAX_TID;
 		EEPROM_SET_SCSIID(eeprom_config, adv->scsi_id);
 		adv->control = eeprom_config.cntl;
-		for (i = 0; i <= ADV_MAX_TID; i++)
+		for (i = 0; i <= ADV_MAX_TID; i++) {
+			u_int8_t sync_data;
+
+			if ((eeprom_config.init_sdtr & (0x1 << i)) == 0)
+				sync_data = 0;
+			else
+				sync_data = eeprom_config.sdtr_data[i];
 			adv_sdtr_to_period_offset(adv,
-						  eeprom_config.sdtr_data[i],
+						  sync_data,
 						  &adv->tinfo[i].user.period,
 						  &adv->tinfo[i].user.offset,
 						  i);
+		}
+		config_lsw = eeprom_config.cfg_lsw;
+		eeprom_config.cfg_msw = config_msw;
 	} else {
 		u_int8_t sync_data;
 
@@ -871,18 +904,63 @@ adv_init(struct adv_softc *adv)
 		adv->cmd_qng_enabled = TARGET_BIT_VECTOR_SET;
 		adv->user_cmd_qng_enabled = TARGET_BIT_VECTOR_SET;
 		adv->scsi_id = 7;
+		adv->control = 0xFFFF;
 
+		if (adv->chip_version == ADV_CHIP_VER_PCI_ULTRA_3050)
+			/* Default to no Ultra to support the 3030 */
+			adv->control &= ~ADV_CNTL_SDTR_ENABLE_ULTRA;
 		sync_data = ADV_DEF_SDTR_OFFSET | (ADV_DEF_SDTR_INDEX << 4);
-		for (i = 0; i <= ADV_MAX_TID; i++)
+		for (i = 0; i <= ADV_MAX_TID; i++) {
 			adv_sdtr_to_period_offset(adv, sync_data,
 						  &adv->tinfo[i].user.period,
 						  &adv->tinfo[i].user.offset,
 						  i);
+		}
+		config_lsw |= ADV_CFG_LSW_SCSI_PARITY_ON;
+	}
+	config_msw &= ~ADV_CFG_MSW_CLR_MASK;
+	config_lsw |= ADV_CFG_LSW_HOST_INT_ON;
+	if ((adv->type & (ADV_PCI|ADV_ULTRA)) == (ADV_PCI|ADV_ULTRA)
+	 && (adv->control & ADV_CNTL_SDTR_ENABLE_ULTRA) == 0)
+		/* 25ns or 10MHz */
+		max_sync = 25;
+	else
+		/* Unlimited */
+		max_sync = 0;
+	for (i = 0; i <= ADV_MAX_TID; i++) {
+		if (adv->tinfo[i].user.period < max_sync)
+			adv->tinfo[i].user.period = max_sync;
 	}
 
+	if (adv_test_external_lram(adv) == 0) {
+		printf("No external RAM\n");
+		if ((adv->type & (ADV_PCI|ADV_ULTRA)) == (ADV_PCI|ADV_ULTRA)) {
+			eeprom_config.max_total_qng =
+			    ADV_MAX_PCI_ULTRA_INRAM_TOTAL_QNG;
+			eeprom_config.max_tag_qng =
+			    ADV_MAX_PCI_ULTRA_INRAM_TAG_QNG;
+		} else {
+			eeprom_config.cfg_msw |= 0x0800;
+			config_msw |= 0x0800;
+			eeprom_config.max_total_qng =
+			     ADV_MAX_PCI_INRAM_TOTAL_QNG;
+			eeprom_config.max_tag_qng = ADV_MAX_INRAM_TAG_QNG;
+		}
+		adv->max_openings = eeprom_config.max_total_qng;
+	}
+	ADV_OUTW(adv, ADV_CONFIG_MSW, config_msw);
+	ADV_OUTW(adv, ADV_CONFIG_LSW, config_lsw);
+#if 0
+	/*
+	 * Don't write the eeprom data back for now.
+	 * I'd rather not mess up the user's card.  We also don't
+	 * fully sanitize the eeprom settings above for the write-back
+	 * to be 100% correct.
+	 */
 	if (adv_set_eeprom_config(adv, &eeprom_config) != 0)
 		printf("%s: WARNING! Failure writing to EEPROM.\n",
 		       adv_name(adv));
+#endif
 
 	adv_set_chip_scsiid(adv, adv->scsi_id);
 	if (adv_init_lram_and_mcode(adv))
@@ -910,7 +988,8 @@ adv_init(struct adv_softc *adv)
 	adv_write_lram_8(adv, ADVV_USE_TAGGED_QNG_B, TARGET_BIT_VECTOR_SET);
 	adv_write_lram_8(adv, ADVV_CAN_TAGGED_QNG_B, TARGET_BIT_VECTOR_SET);
 	printf("adv%d: AdvanSys %s Host Adapter, SCSI ID %d, queue depth %d\n",
-	       adv->unit, (adv->type & ADV_ULTRA) ? "Ultra SCSI" : "SCSI",
+	       adv->unit, (adv->type & ADV_ULTRA) && (max_sync == 0)
+			  ? "Ultra SCSI" : "SCSI",
 	       adv->scsi_id, adv->max_openings);
 	return (0);
 }
@@ -927,13 +1006,24 @@ adv_intr(void *arg)
 
 	adv = (struct adv_softc *)arg;
 
+	chipstat = ADV_INW(adv, ADV_CHIP_STATUS);
+
+	/* Is it for us? */
+	if ((chipstat & (ADV_CSW_INT_PENDING|ADV_CSW_SCSI_RESET_LATCH)) == 0)
+		return;
+
 	ctrl_reg = ADV_INB(adv, ADV_CHIP_CTRL);
 	saved_ctrl_reg = ctrl_reg & (~(ADV_CC_SCSI_RESET | ADV_CC_CHIP_RESET |
 				       ADV_CC_SINGLE_STEP | ADV_CC_DIAG |
 				       ADV_CC_TEST));
 
+	if ((chipstat & (ADV_CSW_SCSI_RESET_LATCH|ADV_CSW_SCSI_RESET_ACTIVE))) {
+		printf("Detected Bus Reset\n");
+		adv_reset_bus(adv, /*initiate_reset*/FALSE);
+		return;
+	}
 
-	if ((chipstat = ADV_INW(adv, ADV_CHIP_STATUS)) & ADV_CSW_INT_PENDING) {
+	if ((chipstat & ADV_CSW_INT_PENDING) != 0) {
 		
 		saved_ram_addr = ADV_INW(adv, ADV_LRAM_ADDR);
 		host_flag = adv_read_lram_8(adv, ADVV_HOST_FLAG_B);
@@ -942,8 +1032,8 @@ adv_intr(void *arg)
 
 		adv_ack_interrupt(adv);
 		
-		if ((chipstat & ADV_CSW_HALTED)
-		    && (ctrl_reg & ADV_CC_SINGLE_STEP)) {
+		if ((chipstat & ADV_CSW_HALTED) != 0
+		 && (ctrl_reg & ADV_CC_SINGLE_STEP) != 0) {
 			adv_isr_chip_halted(adv);
 			saved_ctrl_reg &= ~ADV_CC_HALT;
 		} else {
@@ -972,6 +1062,7 @@ adv_run_doneq(struct adv_softc *adv)
 				   + ADV_SCSIQ_B_FWD);
 	while (done_qno != ADV_QLINK_END) {
 		union ccb* ccb;
+		struct adv_ccb_info *cinfo;
 		u_int done_qaddr;
 		u_int sg_queue_cnt;
 		int   aborted;
@@ -1035,9 +1126,10 @@ adv_run_doneq(struct adv_softc *adv)
 			}
 		}
 
-		ccb = (union ccb *)scsiq.d2.ccb_ptr;
+		cinfo = &adv->ccb_infos[scsiq.d2.ccb_index];
+		ccb = cinfo->ccb;
 		ccb->csio.resid = scsiq.remain_bytes;
-		adv_done(adv, (union ccb *)scsiq.d2.ccb_ptr,
+		adv_done(adv, ccb,
 			 scsiq.d3.done_stat, scsiq.d3.host_stat,
 			 scsiq.d3.scsi_stat, scsiq.q_no);
 
@@ -1055,12 +1147,6 @@ adv_done(struct adv_softc *adv, union ccb *ccb, u_int done_stat,
 	struct	   adv_ccb_info *cinfo;
 
 	cinfo = (struct adv_ccb_info *)ccb->ccb_h.ccb_cinfo_ptr;
-	/*
-	 * Null this out so that we catch driver bugs that cause a
-	 * ccb to be completed twice.
-	 */
-	ccb->ccb_h.ccb_cinfo_ptr = NULL;
-
 	LIST_REMOVE(&ccb->ccb_h, sim_links.le);
 	untimeout(adv_timeout, ccb, ccb->ccb_h.timeout_ch);
 	if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
@@ -1156,7 +1242,7 @@ adv_done(struct adv_softc *adv, union ccb *ccb, u_int done_stat,
 		case QHSTA_M_HUNG_REQ_SCSI_BUS_RESET:
 			/* The SCSI bus hung in a phase */
 			ccb->ccb_h.status = CAM_SEQUENCE_FAIL;
-			adv_reset_bus(adv);
+			adv_reset_bus(adv, /*initiate_reset*/TRUE);
 			break;
 		case QHSTA_M_AUTO_REQ_SENSE_FAIL:
 			ccb->ccb_h.status = CAM_AUTOSENSE_FAIL;
@@ -1189,39 +1275,18 @@ adv_done(struct adv_softc *adv, union ccb *ccb, u_int done_stat,
 		ccb->ccb_h.status = CAM_REQ_CMP_ERR;
 		break;
 	}
-	if ((cinfo->state & ACCB_RELEASE_SIMQ) != 0)
-		ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
-	else if (adv->openings_needed > 0) {
-		int openings;
-
-		openings = adv->max_openings - adv->cur_active - ADV_MIN_FREE_Q;
-		if (openings >= adv->openings_needed) {
-			ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
-			adv->openings_needed = 0;
-		}
-	}
-	if ((cinfo->state & ACCB_RECOVERY_CCB) != 0) {
-		/*
-		 * We now traverse our list of pending CCBs and reinstate
-		 * their timeouts.
-		 */
-		struct ccb_hdr *ccb_h;
-
-		ccb_h = LIST_FIRST(&adv->pending_ccbs);
-		while (ccb_h != NULL) {
-			ccb_h->timeout_ch =
-			    timeout(adv_timeout, (caddr_t)ccb_h,
-					    (ccb_h->timeout * hz) / 1000);
-			ccb_h = LIST_NEXT(ccb_h, sim_links.le);
-		}
-		printf("%s: No longer in timeout\n", adv_name(adv));
-	}
+	adv_clear_state(adv, ccb);
 	if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP
 	 && (ccb->ccb_h.status & CAM_DEV_QFRZN) == 0) {
 		xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
 		ccb->ccb_h.status |= CAM_DEV_QFRZN;
 	}
 	adv_free_ccb_info(adv, cinfo);
+	/*
+	 * Null this out so that we catch driver bugs that cause a
+	 * ccb to be completed twice.
+	 */
+	ccb->ccb_h.ccb_cinfo_ptr = NULL;
 	ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
 	xpt_done(ccb);
 }
@@ -1245,8 +1310,23 @@ adv_attach(adv)
 {
 	struct ccb_setasync csa;
 	struct cam_devq *devq;
+	int max_sg;
 
 	/*
+	 * Allocate an array of ccb mapping structures.  We put the
+	 * index of the ccb_info structure into the queue representing
+	 * a transaction and use it for mapping the queue to the
+	 * upper level SCSI transaction it represents.
+	 */
+	adv->ccb_infos = malloc(sizeof(*adv->ccb_infos) * adv->max_openings,
+				M_DEVBUF, M_NOWAIT);
+
+	if (adv->ccb_infos == NULL)
+		goto error_exit;
+
+	adv->init_level++;
+		
+	/*
 	 * Create our DMA tags.  These tags define the kinds of device
 	 * accessable memory allocations and memory mappings we will 
 	 * need to perform during normal operation.
@@ -1254,15 +1334,33 @@ adv_attach(adv)
 	 * Unless we need to further restrict the allocation, we rely
 	 * on the restrictions of the parent dmat, hence the common
 	 * use of MAXADDR and MAXSIZE.
+	 *
+	 * The ASC boards use chains of "queues" (the transactional
+	 * resources on the board) to represent long S/G lists.
+	 * The first queue represents the command and holds a
+	 * single address and data pair.  The queues that follow
+	 * can each hold ADV_SG_LIST_PER_Q entries.  Given the
+	 * total number of queues, we can express the largest
+	 * transaction we can map.  We reserve a few queues for
+	 * error recovery.  Take those into account as well.
+	 *
+	 * There is a way to take an interrupt to download the
+	 * next batch of S/G entries if there are more than 255
+	 * of them (the counter in the queue structure is a u_int8_t).
+	 * We don't use this feature, so limit the S/G list size
+	 * accordingly.
 	 */
+	max_sg = (adv->max_openings - ADV_MIN_FREE_Q - 1) * ADV_SG_LIST_PER_Q;
+	if (max_sg > 255)
+		max_sg = 255;
 
 	/* DMA tag for mapping buffers into device visible space. */
 	if (bus_dma_tag_create(adv->parent_dmat, /*alignment*/1, /*boundary*/0,
 			       /*lowaddr*/BUS_SPACE_MAXADDR,
 			       /*highaddr*/BUS_SPACE_MAXADDR,
 			       /*filter*/NULL, /*filterarg*/NULL,
-			       /*maxsize*/MAXBSIZE,
-			       /*nsegments*/ADV_MAX_SG_LIST,
+			       /*maxsize*/MAXPHYS,
+			       /*nsegments*/max_sg,
 			       /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
 			       /*flags*/BUS_DMA_ALLOCNOW,
 			       &adv->buffer_dmat) != 0) {
diff --git a/sys/dev/advansys/advlib.c b/sys/dev/advansys/advlib.c
index ad5469f31978..9bbf33d9cc10 100644
--- a/sys/dev/advansys/advlib.c
+++ b/sys/dev/advansys/advlib.c
@@ -1,7 +1,7 @@
 /*
  * Low level routines for the Advanced Systems Inc. SCSI controllers chips
  *
- * Copyright (c) 1996-1997 Justin Gibbs.
+ * Copyright (c) 1996-1997, 1999-2000 Justin Gibbs.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -234,7 +234,6 @@ static void	 adv_enable_interrupt(struct adv_softc *adv);
 static void	 adv_toggle_irq_act(struct adv_softc *adv);
 
 /* Chip Control */
-static int	 adv_stop_chip(struct adv_softc *adv);
 static int	 adv_host_req_chip_halt(struct adv_softc *adv);
 static void	 adv_set_chip_ih(struct adv_softc *adv, u_int16_t ins_code);
 #if UNUSED
@@ -536,19 +535,25 @@ adv_set_eeprom_config(struct adv_softc *adv,
 }
 
 int
-adv_reset_chip_and_scsi_bus(struct adv_softc *adv)
+adv_reset_chip(struct adv_softc *adv, int reset_bus)
 {
 	adv_stop_chip(adv);
-	ADV_OUTB(adv, ADV_CHIP_CTRL,
-		 ADV_CC_CHIP_RESET | ADV_CC_SCSI_RESET | ADV_CC_HALT);
-	DELAY(200 * 1000);
+	ADV_OUTB(adv, ADV_CHIP_CTRL, ADV_CC_CHIP_RESET | ADV_CC_HALT
+				     | (reset_bus ? ADV_CC_SCSI_RESET : 0));
+	DELAY(60);
 
 	adv_set_chip_ih(adv, ADV_INS_RFLAG_WTM);
 	adv_set_chip_ih(adv, ADV_INS_HALT);
 
-	ADV_OUTB(adv, ADV_CHIP_CTRL, ADV_CC_CHIP_RESET | ADV_CC_HALT);
+	if (reset_bus)
+		ADV_OUTB(adv, ADV_CHIP_CTRL, ADV_CC_CHIP_RESET | ADV_CC_HALT);
+
 	ADV_OUTB(adv, ADV_CHIP_CTRL, ADV_CC_HALT);
-	DELAY(200 * 1000);
+	if (reset_bus)
+		DELAY(200 * 1000);
+
+	ADV_OUTW(adv, ADV_CHIP_STATUS, ADV_CIW_CLR_SCSI_RESET_INT);
+	ADV_OUTW(adv, ADV_CHIP_STATUS, 0);
 	return (adv_is_chip_halted(adv));
 }
 
@@ -712,7 +717,7 @@ adv_execute_scsi_queue(struct adv_softc *adv, struct adv_scsi_q *scsiq,
 			panic("adv_execute_scsi_queue: "
 			      "Queue with too many segs.");
 
-		if (adv->type & (ADV_ISA | ADV_VL | ADV_EISA)) {
+		if ((adv->type & (ADV_ISA | ADV_VL | ADV_EISA)) != 0) {
 			int i;
 
 			for (i = 0; i < sg_entry_cnt_minus_one; i++) {
@@ -819,15 +824,14 @@ adv_copy_lram_doneq(struct adv_softc *adv, u_int16_t q_addr,
 	scsiq->extra_bytes = (val >> 8) & 0xFF;
 
 	/*
-	 * XXX 
-	 * Due to a bug in accessing LRAM on the 940UA, we only pull
-	 * the low 16bits of residual information.  In the future, we'll
-	 * want to allow transfers larger than 64K, but hopefully we'll
-	 * get a new firmware revision from AdvanSys that address this
-	 * problem before we up the transfer size.
+	 * Due to a bug in accessing LRAM on the 940UA, the residual
+	 * is split into separate high and low 16bit quantities.
 	 */
 	scsiq->remain_bytes =
 	    adv_read_lram_16(adv, q_addr + ADV_SCSIQ_DW_REMAIN_XFER_CNT);
+	scsiq->remain_bytes |=
+	    adv_read_lram_16(adv, q_addr + ADV_SCSIQ_W_ALT_DC1) << 16;
+
 	/*
 	 * XXX Is this just a safeguard or will the counter really
 	 * have bogus upper bits?
@@ -955,10 +959,11 @@ adv_isr_chip_halted(struct adv_softc *adv)
 		adv_handle_extmsg_in(adv, halt_q_addr, q_cntl,
 				     target_mask, tid_no);
 	} else if (int_halt_code == ADV_HALT_CHK_CONDITION) {
-		struct	 adv_target_transinfo* tinfo;
-		union	 ccb *ccb;
-		u_int8_t tag_code;
-		u_int8_t q_status;
+		struct	  adv_target_transinfo* tinfo;
+		union	  ccb *ccb;
+		u_int32_t cinfo_index;
+		u_int8_t  tag_code;
+		u_int8_t  q_status;
 
 		tinfo = &adv->tinfo[tid_no];
 		q_cntl |= QC_REQ_SENSE;
@@ -995,8 +1000,9 @@ adv_isr_chip_halted(struct adv_softc *adv)
 		/*
 		 * Freeze the devq until we can handle the sense condition.
 		 */
-		ccb = (union ccb *) adv_read_lram_32(adv, halt_q_addr
-							 + ADV_SCSIQ_D_CCBPTR);
+		cinfo_index =
+		    adv_read_lram_32(adv, halt_q_addr + ADV_SCSIQ_D_CINFO_IDX);
+		ccb = adv->ccb_infos[cinfo_index].ccb;
 		xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
 		ccb->ccb_h.status |= CAM_DEV_QFRZN;
 		adv_abort_ccb(adv, tid_no, ADV_TIX_TO_LUN(target_ix),
@@ -1033,11 +1039,13 @@ adv_isr_chip_halted(struct adv_softc *adv)
 	} else if (int_halt_code == ADV_HALT_SS_QUEUE_FULL) {
 		u_int8_t scsi_status;
 		union ccb *ccb;
+		u_int32_t cinfo_index;
 		
 		scsi_status = adv_read_lram_8(adv, halt_q_addr
 					      + ADV_SCSIQ_SCSI_STATUS);
-		ccb = (union ccb *) adv_read_lram_32(adv, halt_q_addr
-						     + ADV_SCSIQ_D_CCBPTR);
+		cinfo_index =
+		    adv_read_lram_32(adv, halt_q_addr + ADV_SCSIQ_D_CINFO_IDX);
+		ccb = adv->ccb_infos[cinfo_index].ccb;
 		xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
 		ccb->ccb_h.status |= CAM_DEV_QFRZN|CAM_SCSI_STATUS_ERROR;
 		ccb->csio.scsi_status = SCSI_STATUS_QUEUE_FULL; 
@@ -1047,6 +1055,8 @@ adv_isr_chip_halted(struct adv_softc *adv)
 		scsi_busy = adv_read_lram_8(adv, ADVV_SCSIBUSY_B);
 		scsi_busy &= ~target_mask;
 		adv_write_lram_8(adv, ADVV_SCSIBUSY_B, scsi_busy);		
+	} else {
+		printf("Unhandled Halt Code %x\n", int_halt_code);
 	}
 	adv_write_lram_16(adv, ADVV_HALTCODE_W, 0);
 }
@@ -1556,7 +1566,7 @@ adv_start_execution(struct adv_softc *adv)
 	}
 }
 
-static int
+int
 adv_stop_chip(struct adv_softc *adv)
 {
 	u_int8_t cc_val;
@@ -1869,15 +1879,17 @@ adv_handle_extmsg_in(struct adv_softc *adv, u_int16_t halt_q_addr,
 	if ((ext_msg.msg_type == MSG_EXTENDED)
 	 && (ext_msg.msg_req == MSG_EXT_SDTR)
 	 && (ext_msg.msg_len == MSG_EXT_SDTR_LEN)) {
-		union	 ccb *ccb;
-		struct	 adv_target_transinfo* tinfo;
+		union	  ccb *ccb;
+		struct	  adv_target_transinfo* tinfo;
+		u_int32_t cinfo_index;
 		u_int	 period;
 		u_int	 offset;
 		int	 sdtr_accept;
 		u_int8_t orig_offset;
 
-		ccb = (union ccb *) adv_read_lram_32(adv, halt_q_addr
-							 + ADV_SCSIQ_D_CCBPTR);
+		cinfo_index =
+		    adv_read_lram_32(adv, halt_q_addr + ADV_SCSIQ_D_CINFO_IDX);
+		ccb = adv->ccb_infos[cinfo_index].ccb;
 		tinfo = &adv->tinfo[tid_no];
 		sdtr_accept = TRUE;
 
@@ -1966,23 +1978,25 @@ adv_abort_ccb(struct adv_softc *adv, int target, int lun, union ccb *ccb,
 	target_ix = ADV_TIDLUN_TO_IX(target, lun);
 	count = 0;
 	for (q_no = ADV_MIN_ACTIVE_QNO; q_no <= adv->max_openings; q_no++) {
+		struct adv_ccb_info *ccb_info;
 		q_addr = ADV_QNO_TO_QADDR(q_no);
 
 		adv_copy_lram_doneq(adv, q_addr, scsiq, adv->max_dma_count);
+		ccb_info = &adv->ccb_infos[scsiq->d2.ccb_index];
 		if (((scsiq->q_status & QS_READY) != 0)
 		 && ((scsiq->q_status & QS_ABORTED) == 0)
 		 && ((scsiq->cntl & QCSG_SG_XFER_LIST) == 0)
 		 && (scsiq->d2.target_ix == target_ix)
 		 && (queued_only == 0
 		  || !(scsiq->q_status & (QS_DISC1|QS_DISC2|QS_BUSY|QS_DONE)))
-		 && (ccb == NULL || (ccb == (union ccb *)scsiq->d2.ccb_ptr))) {
+		 && (ccb == NULL || (ccb == ccb_info->ccb))) {
 			union ccb *aborted_ccb;
 			struct adv_ccb_info *cinfo;
 
 			scsiq->q_status |= QS_ABORTED;
 			adv_write_lram_8(adv, q_addr + ADV_SCSIQ_B_STATUS,
 					 scsiq->q_status);
-			aborted_ccb = (union ccb *)scsiq->d2.ccb_ptr;
+			aborted_ccb = ccb_info->ccb;
 			/* Don't clobber earlier error codes */
 			if ((aborted_ccb->ccb_h.status & CAM_STATUS_MASK)
 			  == CAM_REQ_INPROG)
@@ -1997,19 +2011,21 @@ adv_abort_ccb(struct adv_softc *adv, int target, int lun, union ccb *ccb,
 }
 
 int
-adv_reset_bus(struct adv_softc *adv)
+adv_reset_bus(struct adv_softc *adv, int initiate_bus_reset)
 {
 	int count; 
 	int i;
 	union ccb *ccb;
 
-	adv_reset_chip_and_scsi_bus(adv);
+	i = 200;
+	while ((ADV_INW(adv, ADV_CHIP_STATUS) & ADV_CSW_SCSI_RESET_ACTIVE) != 0
+	    && i--)
+		DELAY(1000);
+	adv_reset_chip(adv, initiate_bus_reset);
 	adv_reinit_lram(adv);
-	for (i = 0; i <= ADV_MAX_TID; i++) {
-		if (adv->fix_asyn_xfer & (0x01 << i))
-			adv_set_sdtr_reg_at_id(adv, i,
-					       ASYN_SDTR_DATA_FIX_PCI_REV_AB);
-        }
+	for (i = 0; i <= ADV_MAX_TID; i++)
+		adv_set_syncrate(adv, NULL, i, /*period*/0,
+				 /*offset*/0, ADV_TRANS_CUR);
 	ADV_OUTW(adv, ADV_REG_PROG_COUNTER, ADV_MCODE_START_ADDR);
 
 	/* Tell the XPT layer that a bus reset occured */
diff --git a/sys/dev/advansys/advlib.h b/sys/dev/advansys/advlib.h
index 8146b9d1dcda..ea5a792914d6 100644
--- a/sys/dev/advansys/advlib.h
+++ b/sys/dev/advansys/advlib.h
@@ -2,7 +2,7 @@
  * Definitions for low level routines and data structures
  * for the Advanced Systems Inc. SCSI controllers chips.
  *
- * Copyright (c) 1996-1997 Justin T. Gibbs.
+ * Copyright (c) 1996-1997, 1999-2000 Justin T. Gibbs.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -74,20 +74,25 @@ typedef enum {
 } adv_btype;
 
 typedef enum {
-	ADV_STATE_NONE			= 0x00
+	ADV_STATE_NONE			= 0x00,
+	ADV_RESOURCE_SHORTAGE		= 0x01,
+	ADV_IN_TIMEOUT			= 0x02,
+	ADV_BUSDMA_BLOCK		= 0x04,
+	ADV_BUSDMA_BLOCK_CLEARED	= 0x08
+	
 } adv_state;
 
 typedef enum {
 	ACCB_FREE		= 0x00,
 	ACCB_ACTIVE		= 0x01,
 	ACCB_ABORT_QUEUED	= 0x02,
-	ACCB_RECOVERY_CCB	= 0x04,
-	ACCB_RELEASE_SIMQ	= 0x08
+	ACCB_RECOVERY_CCB	= 0x04
 } adv_ccb_state;
 
 struct adv_ccb_info {
 	adv_ccb_state	state;
 	bus_dmamap_t	dmamap;
+	union ccb*	ccb;
 	SLIST_ENTRY(adv_ccb_info) links;
 };
 
@@ -292,7 +297,6 @@ struct adv_eeprom_config {
 #define		EEPROM_SET_SCSIID(ep, id)			\
 		(ep).scsi_id_dma_speed &= ~EEPROM_SCSI_ID_MASK; \
 		(ep).scsi_id_dma_speed |= ((id) & EEPROM_SCSI_ID_MASK)
-	/* XXX What about wide controllers??? */
 	u_int8_t	sdtr_data[8];
 	u_int8_t	adapter_info[6];
 
@@ -379,7 +383,7 @@ struct adv_eeprom_config {
 #define	ADV_SCSIQ_D_DATA_CNT		12
 #define	ADV_SCSIQ_B_SENSE_LEN		20
 #define	ADV_SCSIQ_DONE_INFO_BEG		22
-#define	ADV_SCSIQ_D_CCBPTR		22
+#define	ADV_SCSIQ_D_CINFO_IDX		22
 #define	ADV_SCSIQ_B_TARGET_IX		26
 #define	ADV_SCSIQ_B_CDB_LEN		28
 #define	ADV_SCSIQ_B_TAG_CODE		29
@@ -388,9 +392,10 @@ struct adv_eeprom_config {
 #define	ADV_SCSIQ_HOST_STATUS		33
 #define	ADV_SCSIQ_SCSI_STATUS		34
 #define	ADV_SCSIQ_CDB_BEG		36
+#define ADV_SCSIQ_B_FIRST_SG_QK_QP	48
 #define	ADV_SCSIQ_B_SG_WK_QP		49
 #define	ADV_SCSIQ_B_SG_WK_IX		50
-#define	ADV_SCSIQ_W_REQ_COUNT		52
+#define	ADV_SCSIQ_W_ALT_DC1		52
 #define	ADV_SCSIQ_DW_REMAIN_XFER_ADDR	56
 #define	ADV_SCSIQ_DW_REMAIN_XFER_CNT	60
 
@@ -430,6 +435,7 @@ struct adv_eeprom_config {
 #define		ADV_HALT_DISABLE_ASYN_USE_SYN_FIX	0x8300
 #define		ADV_HALT_ENABLE_ASYN_USE_SYN_FIX	0x8400
 #define		ADV_HALT_SDTR_REJECTED			0x4000
+#define		ADV_HALT_HOST_COPY_SG_LIST_TO_RISC	0x2000
 
 #define ADVV_CHKSUM_W			0x0042
 #define ADVV_MC_DATE_W			0x0044
@@ -488,24 +494,28 @@ struct adv_target_transinfo {
 
 struct adv_softc
 {
-	bus_space_tag_t		tag;
-	bus_space_handle_t	bsh;
-	bus_dma_tag_t		parent_dmat;
-	bus_dma_tag_t		buffer_dmat;
-	bus_dma_tag_t		sense_dmat;
-	bus_dmamap_t		sense_dmamap;
+	bus_space_tag_t		 tag;
+	bus_space_handle_t	 bsh;
+	struct cam_sim		*sim;
+	LIST_HEAD(, ccb_hdr)	 pending_ccbs;
+	struct adv_ccb_info	*ccb_infos;
+	SLIST_HEAD(, adv_ccb_info) free_ccb_infos;
+	bus_dma_tag_t		 parent_dmat;
+	bus_dma_tag_t		 buffer_dmat;
+	bus_dma_tag_t		 sense_dmat;
+	bus_dmamap_t		 sense_dmamap;
 	struct scsi_sense_data	*sense_buffers;
-	bus_addr_t		sense_physbase;
-	bus_addr_t		overrun_physbase;
-	adv_btype		type;
-	struct			adv_target_transinfo tinfo[8];
-	target_bit_vector	fix_asyn_xfer;
-	target_bit_vector	fix_asyn_xfer_always;
-	target_bit_vector	disc_enable;
-	target_bit_vector	user_disc_enable;
-	target_bit_vector	cmd_qng_enabled;
-	target_bit_vector	user_cmd_qng_enabled;
-	u_int16_t		control;
+	bus_addr_t		 sense_physbase;
+	bus_addr_t		 overrun_physbase;
+	adv_btype		 type;
+	struct			 adv_target_transinfo tinfo[8];
+	target_bit_vector	 fix_asyn_xfer;
+	target_bit_vector	 fix_asyn_xfer_always;
+	target_bit_vector	 disc_enable;
+	target_bit_vector	 user_disc_enable;
+	target_bit_vector	 cmd_qng_enabled;
+	target_bit_vector	 user_cmd_qng_enabled;
+	u_int16_t		 control;
 #define		ADV_CNTL_INITIATOR		0x0001
 #define		ADV_CNTL_BIOS_GT_1GB		0x0002
 #define		ADV_CNTL_BIOS_GT_2_DISK		0x0004
@@ -521,29 +531,27 @@ struct adv_softc
 #define		ADV_CNTL_BURST_MODE		0x2000
 #define		ADV_CNTL_SDTR_ENABLE_ULTRA	0x4000
 	
-	u_int16_t		bug_fix_control;
+	u_int16_t		 bug_fix_control;
 #define		ADV_BUG_FIX_IF_NOT_DWB		0x0001
 #define		ADV_BUG_FIX_ASYN_USE_SYN	0x0002
 	
-	adv_state		state;
+	adv_state		 state;
 	struct cam_path		*path;
-	int			unit;
-	int			init_level;
-	u_int32_t		max_dma_addr;
-	u_int32_t		max_dma_count;
-	u_int8_t		isa_dma_speed;
-	u_int8_t		isa_dma_channel;
-	u_int8_t		scsi_id;
-	u_int8_t		chip_version;
-	u_int8_t		max_tags_per_target;
-	u_int8_t		max_openings;
-	u_int8_t		cur_active;
-	u_int8_t		openings_needed;
+	int			 unit;
+	int			 init_level;
+	u_int32_t		 max_dma_addr;
+	u_int32_t		 max_dma_count;
+	u_int8_t		 isa_dma_speed;
+	u_int8_t		 isa_dma_channel;
+	u_int8_t		 scsi_id;
+	u_int8_t		 chip_version;
+	u_int8_t		 max_tags_per_target;
+	u_int8_t		 max_openings;
+	u_int8_t		 cur_active;
+	u_int8_t		 openings_needed;
+	u_int8_t		 ccb_infos_allocated;
 	u_int8_t		*sdtr_period_tbl;
-	u_int8_t		sdtr_period_tbl_size;
-	struct cam_sim		*sim;
-	LIST_HEAD(, ccb_hdr)	pending_ccbs;
-	SLIST_HEAD(, adv_ccb_info) free_ccb_infos;
+	u_int8_t		 sdtr_period_tbl_size;
 };
 
 /*
@@ -597,7 +605,7 @@ struct adv_scsiq_1 {
 };
 
 struct adv_scsiq_2 {
-	u_int32_t		ccb_ptr;	/* Pointer to our CCB */
+	u_int32_t		ccb_index;	/* Index to our CCB Info */
 	u_int8_t		target_ix;      /* Combined TID and LUN */
 
 	u_int8_t		flag;
@@ -790,7 +798,7 @@ u_int16_t adv_get_eeprom_config(struct adv_softc *adv,
 				struct adv_eeprom_config *eeprom_config);
 int	  adv_set_eeprom_config(struct adv_softc *adv,
 				struct adv_eeprom_config *eeprom_config);
-int	  adv_reset_chip_and_scsi_bus(struct adv_softc *adv);
+int	  adv_reset_chip(struct adv_softc *adv, int reset_bus);
 int	  adv_test_external_lram(struct adv_softc* adv);
 int	  adv_init_lram_and_mcode(struct adv_softc *adv);
 u_int8_t  adv_get_chip_irq(struct adv_softc *adv);
@@ -808,6 +816,7 @@ u_int8_t  adv_copy_lram_doneq(struct adv_softc *adv, u_int16_t q_addr,
 int	  adv_start_chip(struct adv_softc *adv);
 void	  adv_start_execution(struct adv_softc *adv);
 int	  adv_stop_execution(struct adv_softc *adv);
+int	  adv_stop_chip(struct adv_softc *adv);
 int	  adv_is_chip_halted(struct adv_softc *adv);
 
 /* Interrupt processing */
@@ -828,7 +837,7 @@ u_int8_t  adv_period_offset_to_sdtr(struct adv_softc *adv, u_int *period,
 union ccb;
 int	  adv_abort_ccb(struct adv_softc *adv, int target, int lun,
 			union ccb *ccb, u_int32_t status, int queued_only);
-int	  adv_reset_bus(struct adv_softc *adv);
+int	  adv_reset_bus(struct adv_softc *adv, int initiate_reset);
 
 /* Async event callback */
 void	advasync(void *callback_arg, u_int32_t code,
diff --git a/sys/dev/advansys/advmcode.c b/sys/dev/advansys/advmcode.c
index 22491297f6cb..d53a4c6fe0e5 100644
--- a/sys/dev/advansys/advmcode.c
+++ b/sys/dev/advansys/advmcode.c
@@ -6,7 +6,7 @@
  * Obtained from:
  * advansys.c - Linux Host Driver for AdvanSys SCSI Adapters
  *
- * Copyright (c) 1995-1997 Advanced System Products, Inc.
+ * Copyright (c) 1995-1999 Advanced System Products, Inc.
  * All Rights Reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -20,217 +20,263 @@
 
 u_int8_t adv_mcode[] =
 {
-	0x01, 0x03, 0x01, 0x19, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F,
-	0x0F, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x91, 0x10, 0x0A, 0x05, 0x01, 0x00, 0x00, 0x00, 0x00,
-	0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x80, 0xFF, 0xFF,
-	0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x23, 0x00, 0x24, 0x00, 0x00, 0x00, 0x07, 0x00, 0xFF, 0x00, 0x00,
-	0x00, 0x00, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0xE2, 0x88, 0x00, 0x00, 0x00, 0x00, 0x80, 0x73, 0x48, 0x04,
-	0x36, 0x00, 0x00, 0xA2, 0xC2, 0x00, 0x80, 0x73, 0x03, 0x23, 0x36,
-	0x40, 0xB6, 0x00, 0x36, 0x00, 0x05, 0xD6, 0x0C, 0xD2, 0x12, 0xDA,
-	0x00, 0xA2, 0xC2, 0x00, 0x92, 0x80, 0x1E, 0x98, 0x50, 0x00, 0xF5,
-	0x00, 0x48, 0x98, 0xDF, 0x23, 0x36, 0x60, 0xB6, 0x00, 0x92, 0x80,
-	0x4F, 0x00, 0xF5, 0x00, 0x48, 0x98, 0xEF, 0x23, 0x36, 0x60, 0xB6,
-	0x00, 0x92, 0x80, 0x80, 0x62, 0x92, 0x80, 0x00, 0x46, 0x17, 0xEE,
-	0x13, 0xEA, 0x02, 0x01, 0x09, 0xD8, 0xCD, 0x04, 0x4D, 0x00, 0x00,
-	0xA3, 0xD6, 0x00, 0xA6, 0x97, 0x7F, 0x23, 0x04, 0x61, 0x84, 0x01,
-	0xE6, 0x84, 0xD2, 0xC1, 0x80, 0x73, 0xCD, 0x04, 0x4D, 0x00, 0x00,
-	0xA3, 0xE2, 0x01, 0xA6, 0x97, 0xCE, 0x81, 0x00, 0x33, 0x02, 0x00,
-	0xC0, 0x88, 0x80, 0x73, 0x80, 0x77, 0x00, 0x01, 0x01, 0xA1, 0x02,
-	0x01, 0x4F, 0x00, 0x84, 0x97, 0x07, 0xA6, 0x0C, 0x01, 0x00, 0x33,
-	0x03, 0x00, 0xC0, 0x88, 0x03, 0x03, 0x03, 0xDE, 0x00, 0x33, 0x05,
-	0x00, 0xC0, 0x88, 0xCE, 0x00, 0x69, 0x60, 0xCE, 0x00, 0x02, 0x03,
-	0x4A, 0x60, 0x00, 0xA2, 0x80, 0x01, 0x80, 0x63, 0x07, 0xA6, 0x2C,
-	0x01, 0x80, 0x81, 0x03, 0x03, 0x80, 0x63, 0xE2, 0x00, 0x07, 0xA6,
-	0x3C, 0x01, 0x00, 0x33, 0x04, 0x00, 0xC0, 0x88, 0x03, 0x07, 0x02,
-	0x01, 0x04, 0xCA, 0x0D, 0x23, 0x68, 0x98, 0x4D, 0x04, 0x04, 0x85,
-	0x05, 0xD8, 0x0D, 0x23, 0x68, 0x98, 0xCD, 0x04, 0x15, 0x23, 0xF6,
-	0x88, 0xFB, 0x23, 0x02, 0x61, 0x82, 0x01, 0x80, 0x63, 0x02, 0x03,
-	0x06, 0xA3, 0x6A, 0x01, 0x00, 0x33, 0x0A, 0x00, 0xC0, 0x88, 0x4E,
-	0x00, 0x07, 0xA3, 0x76, 0x01, 0x00, 0x33, 0x0B, 0x00, 0xC0, 0x88,
-	0xCD, 0x04, 0x36, 0x2D, 0x00, 0x33, 0x1A, 0x00, 0xC0, 0x88, 0x50,
-	0x04, 0x90, 0x81, 0x06, 0xAB, 0x8A, 0x01, 0x90, 0x81, 0x4E, 0x00,
-	0x07, 0xA3, 0x9A, 0x01, 0x50, 0x00, 0x00, 0xA3, 0x44, 0x01, 0x00,
-	0x05, 0x84, 0x81, 0x46, 0x97, 0x02, 0x01, 0x05, 0xC6, 0x04, 0x23,
-	0xA0, 0x01, 0x15, 0x23, 0xA1, 0x01, 0xC6, 0x81, 0xFD, 0x23, 0x02,
-	0x61, 0x82, 0x01, 0x0A, 0xDA, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA0,
-	0xBC, 0x01, 0x80, 0x63, 0xCD, 0x04, 0x36, 0x2D, 0x00, 0x33, 0x1B,
-	0x00, 0xC0, 0x88, 0x06, 0x23, 0x68, 0x98, 0xCD, 0x04, 0xE6, 0x84,
-	0x06, 0x01, 0x00, 0xA2, 0xDC, 0x01, 0x57, 0x60, 0x00, 0xA0, 0xE2,
-	0x01, 0xE6, 0x84, 0x80, 0x23, 0xA0, 0x01, 0xE6, 0x84, 0x80, 0x73,
-	0x4B, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x08, 0x02, 0x04, 0x01, 0x0C,
-	0xDE, 0x02, 0x01, 0x03, 0xCC, 0x4F, 0x00, 0x84, 0x97, 0x04, 0x82,
-	0x08, 0x23, 0x02, 0x41, 0x82, 0x01, 0x4F, 0x00, 0x62, 0x97, 0x48,
-	0x04, 0x84, 0x80, 0xF0, 0x97, 0x00, 0x46, 0x56, 0x00, 0x03, 0xC0,
-	0x01, 0x23, 0xE8, 0x00, 0x81, 0x73, 0x06, 0x29, 0x03, 0x42, 0x06,
-	0xE2, 0x03, 0xEE, 0x67, 0xEB, 0x11, 0x23, 0xF6, 0x88, 0x04, 0x98,
-	0xF4, 0x80, 0x80, 0x73, 0x80, 0x77, 0x07, 0xA4, 0x32, 0x02, 0x7C,
-	0x95, 0x06, 0xA6, 0x3C, 0x02, 0x03, 0xA6, 0x4C, 0x04, 0xC0, 0x88,
-	0x04, 0x01, 0x03, 0xD8, 0xB2, 0x98, 0x6A, 0x96, 0x4E, 0x82, 0xFE,
-	0x95, 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0xB6, 0x2D, 0x02, 0xA6,
-	0x78, 0x02, 0x07, 0xA6, 0x66, 0x02, 0x06, 0xA6, 0x6A, 0x02, 0x03,
-	0xA6, 0x6E, 0x02, 0x00, 0x33, 0x10, 0x00, 0xC0, 0x88, 0x7C, 0x95,
-	0x50, 0x82, 0x60, 0x96, 0x50, 0x82, 0x04, 0x23, 0xA0, 0x01, 0x14,
-	0x23, 0xA1, 0x01, 0x3C, 0x84, 0x04, 0x01, 0x0C, 0xDC, 0xE0, 0x23,
-	0x25, 0x61, 0xEF, 0x00, 0x14, 0x01, 0x4F, 0x04, 0xA8, 0x01, 0x6F,
-	0x00, 0xA5, 0x01, 0x03, 0x23, 0xA4, 0x01, 0x06, 0x23, 0x9C, 0x01,
-	0x24, 0x2B, 0x1C, 0x01, 0x02, 0xA6, 0xB6, 0x02, 0x07, 0xA6, 0x66,
-	0x02, 0x06, 0xA6, 0x6A, 0x02, 0x03, 0xA6, 0x20, 0x04, 0x01, 0xA6,
-	0xC0, 0x02, 0x00, 0xA6, 0xC0, 0x02, 0x00, 0x33, 0x12, 0x00, 0xC0,
-	0x88, 0x00, 0x0E, 0x80, 0x63, 0x00, 0x43, 0x00, 0xA0, 0x98, 0x02,
-	0x4D, 0x04, 0x04, 0x01, 0x0B, 0xDC, 0xE7, 0x23, 0x04, 0x61, 0x84,
-	0x01, 0x10, 0x31, 0x12, 0x35, 0x14, 0x01, 0xEC, 0x00, 0x6C, 0x38,
-	0x00, 0x3F, 0x00, 0x00, 0xF6, 0x82, 0x18, 0x23, 0x04, 0x61, 0x18,
-	0xA0, 0xEE, 0x02, 0x04, 0x01, 0x9C, 0xC8, 0x00, 0x33, 0x1F, 0x00,
-	0xC0, 0x88, 0x08, 0x31, 0x0A, 0x35, 0x0C, 0x39, 0x0E, 0x3D, 0x7E,
-	0x98, 0xB6, 0x2D, 0x01, 0xA6, 0x20, 0x03, 0x00, 0xA6, 0x20, 0x03,
-	0x07, 0xA6, 0x18, 0x03, 0x06, 0xA6, 0x1C, 0x03, 0x03, 0xA6, 0x20,
-	0x04, 0x02, 0xA6, 0x78, 0x02, 0x00, 0x33, 0x33, 0x00, 0xC0, 0x88,
-	0x7C, 0x95, 0xFA, 0x82, 0x60, 0x96, 0xFA, 0x82, 0x82, 0x98, 0x80,
-	0x42, 0x7E, 0x98, 0x60, 0xE4, 0x04, 0x01, 0x29, 0xC8, 0x31, 0x05,
-	0x07, 0x01, 0x00, 0xA2, 0x60, 0x03, 0x00, 0x43, 0x87, 0x01, 0x05,
-	0x05, 0x86, 0x98, 0x7E, 0x98, 0x00, 0xA6, 0x22, 0x03, 0x07, 0xA6,
-	0x58, 0x03, 0x03, 0xA6, 0x3C, 0x04, 0x06, 0xA6, 0x5C, 0x03, 0x01,
-	0xA6, 0x22, 0x03, 0x00, 0x33, 0x25, 0x00, 0xC0, 0x88, 0x7C, 0x95,
-	0x3E, 0x83, 0x60, 0x96, 0x3E, 0x83, 0x04, 0x01, 0x0C, 0xCE, 0x03,
-	0xC8, 0x00, 0x33, 0x42, 0x00, 0xC0, 0x88, 0x00, 0x01, 0x05, 0x05,
-	0xFF, 0xA2, 0x7E, 0x03, 0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x3A,
-	0x83, 0x05, 0x05, 0x15, 0x01, 0x00, 0xA2, 0x9E, 0x03, 0xEC, 0x00,
-	0x6E, 0x00, 0x95, 0x01, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00, 0x01,
-	0xA6, 0x9A, 0x03, 0x00, 0xA6, 0x9A, 0x03, 0x12, 0x84, 0x80, 0x42,
-	0x7E, 0x98, 0x01, 0xA6, 0xA8, 0x03, 0x00, 0xA6, 0xC0, 0x03, 0x12,
-	0x84, 0xA6, 0x98, 0x80, 0x42, 0x01, 0xA6, 0xA8, 0x03, 0x07, 0xA6,
-	0xB6, 0x03, 0xD8, 0x83, 0x7C, 0x95, 0xAC, 0x83, 0x00, 0x33, 0x2F,
-	0x00, 0xC0, 0x88, 0xA6, 0x98, 0x80, 0x42, 0x00, 0xA6, 0xC0, 0x03,
-	0x07, 0xA6, 0xCE, 0x03, 0xD8, 0x83, 0x7C, 0x95, 0xC4, 0x83, 0x00,
-	0x33, 0x26, 0x00, 0xC0, 0x88, 0x38, 0x2B, 0x80, 0x32, 0x80, 0x36,
-	0x04, 0x23, 0xA0, 0x01, 0x12, 0x23, 0xA1, 0x01, 0x12, 0x84, 0x06,
-	0xF0, 0x06, 0xA4, 0xF6, 0x03, 0x80, 0x6B, 0x05, 0x23, 0x83, 0x03,
-	0x80, 0x63, 0x03, 0xA6, 0x10, 0x04, 0x07, 0xA6, 0x08, 0x04, 0x06,
-	0xA6, 0x0C, 0x04, 0x00, 0x33, 0x17, 0x00, 0xC0, 0x88, 0x7C, 0x95,
-	0xF6, 0x83, 0x60, 0x96, 0xF6, 0x83, 0x20, 0x84, 0x06, 0xF0, 0x06,
-	0xA4, 0x20, 0x04, 0x80, 0x6B, 0x05, 0x23, 0x83, 0x03, 0x80, 0x63,
-	0xB6, 0x2D, 0x03, 0xA6, 0x3C, 0x04, 0x07, 0xA6, 0x34, 0x04, 0x06,
-	0xA6, 0x38, 0x04, 0x00, 0x33, 0x30, 0x00, 0xC0, 0x88, 0x7C, 0x95,
-	0x20, 0x84, 0x60, 0x96, 0x20, 0x84, 0x1D, 0x01, 0x06, 0xCC, 0x00,
-	0x33, 0x00, 0x84, 0xC0, 0x20, 0x00, 0x23, 0xEA, 0x00, 0x81, 0x62,
-	0xA2, 0x0D, 0x80, 0x63, 0x07, 0xA6, 0x5A, 0x04, 0x00, 0x33, 0x18,
-	0x00, 0xC0, 0x88, 0x03, 0x03, 0x80, 0x63, 0xA3, 0x01, 0x07, 0xA4,
-	0x64, 0x04, 0x23, 0x01, 0x00, 0xA2, 0x86, 0x04, 0x0A, 0xA0, 0x76,
-	0x04, 0xE0, 0x00, 0x00, 0x33, 0x1D, 0x00, 0xC0, 0x88, 0x0B, 0xA0,
-	0x82, 0x04, 0xE0, 0x00, 0x00, 0x33, 0x1E, 0x00, 0xC0, 0x88, 0x42,
-	0x23, 0xF6, 0x88, 0x00, 0x23, 0x22, 0xA3, 0xE6, 0x04, 0x08, 0x23,
-	0x22, 0xA3, 0xA2, 0x04, 0x28, 0x23, 0x22, 0xA3, 0xAE, 0x04, 0x02,
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+	0x20, 0x04, 0x01, 0xA6, 0xB4, 0x02, 0x00, 0xA6, 0xB4,
+	0x02, 0x00, 0x33, 0x12, 0x00, 0xC2, 0x88, 0x00, 0x0E,
+	0x80, 0x63, 0x00, 0x43, 0x00, 0xA0, 0x8C, 0x02, 0x4D,
+	0x04, 0x04, 0x01, 0x0B, 0xDC, 0xE7, 0x23, 0x04, 0x61,
+	0x84, 0x01, 0x10, 0x31, 0x12, 0x35, 0x14, 0x01, 0xEC,
+	0x00, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00, 0xEA, 0x82,
+	0x18, 0x23, 0x04, 0x61, 0x18, 0xA0, 0xE2, 0x02, 0x04,
+	0x01, 0xA2, 0xC8, 0x00, 0x33, 0x1F, 0x00, 0xC2, 0x88,
+	0x08, 0x31, 0x0A, 0x35, 0x0C, 0x39, 0x0E, 0x3D, 0x7E,
+	0x98, 0xB6, 0x2D, 0x01, 0xA6, 0x14, 0x03, 0x00, 0xA6,
+	0x14, 0x03, 0x07, 0xA6, 0x0C, 0x03, 0x06, 0xA6, 0x10,
+	0x03, 0x03, 0xA6, 0x20, 0x04, 0x02, 0xA6, 0x6C, 0x02,
+	0x00, 0x33, 0x33, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0xEE,
+	0x82, 0x60, 0x96, 0xEE, 0x82, 0x82, 0x98, 0x80, 0x42,
+	0x7E, 0x98, 0x64, 0xE4, 0x04, 0x01, 0x2D, 0xC8, 0x31,
+	0x05, 0x07, 0x01, 0x00, 0xA2, 0x54, 0x03, 0x00, 0x43,
+	0x87, 0x01, 0x05, 0x05, 0x86, 0x98, 0x7E, 0x98, 0x00,
+	0xA6, 0x16, 0x03, 0x07, 0xA6, 0x4C, 0x03, 0x03, 0xA6,
+	0x3C, 0x04, 0x06, 0xA6, 0x50, 0x03, 0x01, 0xA6, 0x16,
+	0x03, 0x00, 0x33, 0x25, 0x00, 0xC2, 0x88, 0x7C, 0x95,
+	0x32, 0x83, 0x60, 0x96, 0x32, 0x83, 0x04, 0x01, 0x10,
+	0xCE, 0x07, 0xC8, 0x05, 0x05, 0xEB, 0x04, 0x00, 0x33,
+	0x00, 0x20, 0xC0, 0x20, 0x81, 0x62, 0x72, 0x83, 0x00,
+	0x01, 0x05, 0x05, 0xFF, 0xA2, 0x7A, 0x03, 0xB1, 0x01,
+	0x08, 0x23, 0xB2, 0x01, 0x2E, 0x83, 0x05, 0x05, 0x15,
+	0x01, 0x00, 0xA2, 0x9A, 0x03, 0xEC, 0x00, 0x6E, 0x00,
+	0x95, 0x01, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00, 0x01,
+	0xA6, 0x96, 0x03, 0x00, 0xA6, 0x96, 0x03, 0x10, 0x84,
+	0x80, 0x42, 0x7E, 0x98, 0x01, 0xA6, 0xA4, 0x03, 0x00,
+	0xA6, 0xBC, 0x03, 0x10, 0x84, 0xA8, 0x98, 0x80, 0x42,
+	0x01, 0xA6, 0xA4, 0x03, 0x07, 0xA6, 0xB2, 0x03, 0xD4,
+	0x83, 0x7C, 0x95, 0xA8, 0x83, 0x00, 0x33, 0x2F, 0x00,
+	0xC2, 0x88, 0xA8, 0x98, 0x80, 0x42, 0x00, 0xA6, 0xBC,
+	0x03, 0x07, 0xA6, 0xCA, 0x03, 0xD4, 0x83, 0x7C, 0x95,
+	0xC0, 0x83, 0x00, 0x33, 0x26, 0x00, 0xC2, 0x88, 0x38,
+	0x2B, 0x80, 0x32, 0x80, 0x36, 0x04, 0x23, 0xA0, 0x01,
+	0x12, 0x23, 0xA1, 0x01, 0x10, 0x84, 0x07, 0xF0, 0x06,
+	0xA4, 0xF4, 0x03, 0x80, 0x6B, 0x80, 0x67, 0x05, 0x23,
+	0x83, 0x03, 0x80, 0x63, 0x03, 0xA6, 0x0E, 0x04, 0x07,
+	0xA6, 0x06, 0x04, 0x06, 0xA6, 0x0A, 0x04, 0x00, 0x33,
+	0x17, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0xF4, 0x83, 0x60,
+	0x96, 0xF4, 0x83, 0x20, 0x84, 0x07, 0xF0, 0x06, 0xA4,
+	0x20, 0x04, 0x80, 0x6B, 0x80, 0x67, 0x05, 0x23, 0x83,
+	0x03, 0x80, 0x63, 0xB6, 0x2D, 0x03, 0xA6, 0x3C, 0x04,
+	0x07, 0xA6, 0x34, 0x04, 0x06, 0xA6, 0x38, 0x04, 0x00,
+	0x33, 0x30, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0x20, 0x84,
+	0x60, 0x96, 0x20, 0x84, 0x1D, 0x01, 0x06, 0xCC, 0x00,
+	0x33, 0x00, 0x84, 0xC0, 0x20, 0x00, 0x23, 0xEA, 0x00,
+	0x81, 0x62, 0xA2, 0x0D, 0x80, 0x63, 0x07, 0xA6, 0x5A,
+	0x04, 0x00, 0x33, 0x18, 0x00, 0xC2, 0x88, 0x03, 0x03,
+	0x80, 0x63, 0xA3, 0x01, 0x07, 0xA4, 0x64, 0x04, 0x23,
+	0x01, 0x00, 0xA2, 0x86, 0x04, 0x0A, 0xA0, 0x76, 0x04,
+	0xE0, 0x00, 0x00, 0x33, 0x1D, 0x00, 0xC2, 0x88, 0x0B,
+	0xA0, 0x82, 0x04, 0xE0, 0x00, 0x00, 0x33, 0x1E, 0x00,
+	0xC2, 0x88, 0x42, 0x23, 0xF8, 0x88, 0x00, 0x23, 0x22,
+	0xA3, 0xE6, 0x04, 0x08, 0x23, 0x22, 0xA3, 0xA2, 0x04,
+	0x28, 0x23, 0x22, 0xA3, 0xAE, 0x04, 0x02, 0x23, 0x22,
+	0xA3, 0xC4, 0x04, 0x42, 0x23, 0xF8, 0x88, 0x4A, 0x00,
+	0x06, 0x61, 0x00, 0xA0, 0xAE, 0x04, 0x45, 0x23, 0xF8,
+	0x88, 0x04, 0x98, 0x00, 0xA2, 0xC0, 0x04, 0xB4, 0x98,
+	0x00, 0x33, 0x00, 0x82, 0xC0, 0x20, 0x81, 0x62, 0xE8,
+	0x81, 0x47, 0x23, 0xF8, 0x88, 0x04, 0x01, 0x0B, 0xDE,
+	0x04, 0x98, 0xB4, 0x98, 0x00, 0x33, 0x00, 0x81, 0xC0,
+	0x20, 0x81, 0x62, 0x14, 0x01, 0x00, 0xA0, 0x00, 0x02,
+	0x43, 0x23, 0xF8, 0x88, 0x04, 0x23, 0xA0, 0x01, 0x44,
+	0x23, 0xA1, 0x01, 0x80, 0x73, 0x4D, 0x00, 0x03, 0xA3,
+	0xF4, 0x04, 0x00, 0x33, 0x27, 0x00, 0xC2, 0x88, 0x04,
+	0x01, 0x04, 0xDC, 0x02, 0x23, 0xA2, 0x01, 0x04, 0x23,
+	0xA0, 0x01, 0x04, 0x98, 0x26, 0x95, 0x4B, 0x00, 0xF6,
+	0x00, 0x4F, 0x04, 0x4F, 0x00, 0x00, 0xA3, 0x22, 0x05,
+	0x00, 0x05, 0x76, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x1C,
+	0x05, 0x0A, 0x85, 0x46, 0x97, 0xCD, 0x04, 0x24, 0x85,
+	0x48, 0x04, 0x84, 0x80, 0x02, 0x01, 0x03, 0xDA, 0x80,
+	0x23, 0x82, 0x01, 0x34, 0x85, 0x02, 0x23, 0xA0, 0x01,
+	0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x40, 0x05, 0x1D,
+	0x01, 0x04, 0xD6, 0xFF, 0x23, 0x86, 0x41, 0x4B, 0x60,
+	0xCB, 0x00, 0xFF, 0x23, 0x80, 0x01, 0x49, 0x00, 0x81,
+	0x01, 0x04, 0x01, 0x02, 0xC8, 0x30, 0x01, 0x80, 0x01,
+	0xF7, 0x04, 0x03, 0x01, 0x49, 0x04, 0x80, 0x01, 0xC9,
+	0x00, 0x00, 0x05, 0x00, 0x01, 0xFF, 0xA0, 0x60, 0x05,
+	0x77, 0x04, 0x01, 0x23, 0xEA, 0x00, 0x5D, 0x00, 0xFE,
+	0xC7, 0x00, 0x62, 0x00, 0x23, 0xEA, 0x00, 0x00, 0x63,
+	0x07, 0xA4, 0xF8, 0x05, 0x03, 0x03, 0x02, 0xA0, 0x8E,
+	0x05, 0xF4, 0x85, 0x00, 0x33, 0x2D, 0x00, 0xC2, 0x88,
+	0x04, 0xA0, 0xB8, 0x05, 0x80, 0x63, 0x00, 0x23, 0xDF,
+	0x00, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0xA4, 0x05,
+	0x1D, 0x01, 0x06, 0xD6, 0x02, 0x23, 0x02, 0x41, 0x82,
+	0x01, 0x50, 0x00, 0x62, 0x97, 0x04, 0x85, 0x04, 0x23,
+	0x02, 0x41, 0x82, 0x01, 0x04, 0x85, 0x08, 0xA0, 0xBE,
+	0x05, 0xF4, 0x85, 0x03, 0xA0, 0xC4, 0x05, 0xF4, 0x85,
+	0x01, 0xA0, 0xCE, 0x05, 0x88, 0x00, 0x80, 0x63, 0xCC,
+	0x86, 0x07, 0xA0, 0xEE, 0x05, 0x5F, 0x00, 0x00, 0x2B,
+	0xDF, 0x08, 0x00, 0xA2, 0xE6, 0x05, 0x80, 0x67, 0x80,
+	0x63, 0x01, 0xA2, 0x7A, 0x06, 0x7C, 0x85, 0x06, 0x23,
+	0x68, 0x98, 0x48, 0x23, 0xF8, 0x88, 0x07, 0x23, 0x80,
+	0x00, 0x06, 0x87, 0x80, 0x63, 0x7C, 0x85, 0x00, 0x23,
+	0xDF, 0x00, 0x00, 0x63, 0x4A, 0x00, 0x06, 0x61, 0x00,
+	0xA2, 0x36, 0x06, 0x1D, 0x01, 0x16, 0xD4, 0xC0, 0x23,
+	0x07, 0x41, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6, 0x1C,
+	0x06, 0x00, 0x33, 0x37, 0x00, 0xC2, 0x88, 0x1D, 0x01,
+	0x01, 0xD6, 0x20, 0x23, 0x63, 0x60, 0x83, 0x03, 0x80,
+	0x63, 0x02, 0x23, 0xDF, 0x00, 0x07, 0xA6, 0x7C, 0x05,
+	0xEF, 0x04, 0x6F, 0x00, 0x00, 0x63, 0x4B, 0x00, 0x06,
+	0x41, 0xCB, 0x00, 0x52, 0x00, 0x06, 0x61, 0x00, 0xA2,
+	0x4E, 0x06, 0x1D, 0x01, 0x03, 0xCA, 0xC0, 0x23, 0x07,
+	0x41, 0x00, 0x63, 0x1D, 0x01, 0x04, 0xCC, 0x00, 0x33,
+	0x00, 0x83, 0xC0, 0x20, 0x81, 0x62, 0x80, 0x23, 0x07,
+	0x41, 0x00, 0x63, 0x80, 0x67, 0x08, 0x23, 0x83, 0x03,
+	0x80, 0x63, 0x00, 0x63, 0x01, 0x23, 0xDF, 0x00, 0x06,
+	0xA6, 0x84, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x80, 0x67,
+	0x80, 0x63, 0x00, 0x33, 0x00, 0x40, 0xC0, 0x20, 0x81,
+	0x62, 0x00, 0x63, 0x00, 0x00, 0xFE, 0x95, 0x83, 0x03,
+	0x80, 0x63, 0x06, 0xA6, 0x94, 0x06, 0x07, 0xA6, 0x7C,
+	0x05, 0x00, 0x00, 0x01, 0xA0, 0x14, 0x07, 0x00, 0x2B,
+	0x40, 0x0E, 0x80, 0x63, 0x01, 0x00, 0x06, 0xA6, 0xAA,
+	0x06, 0x07, 0xA6, 0x7C, 0x05, 0x40, 0x0E, 0x80, 0x63,
+	0x00, 0x43, 0x00, 0xA0, 0xA2, 0x06, 0x06, 0xA6, 0xBC,
+	0x06, 0x07, 0xA6, 0x7C, 0x05, 0x80, 0x67, 0x40, 0x0E,
+	0x80, 0x63, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x23, 0xDF,
+	0x00, 0x00, 0x63, 0x07, 0xA6, 0xD6, 0x06, 0x00, 0x33,
+	0x2A, 0x00, 0xC2, 0x88, 0x03, 0x03, 0x80, 0x63, 0x89,
+	0x00, 0x0A, 0x2B, 0x07, 0xA6, 0xE8, 0x06, 0x00, 0x33,
+	0x29, 0x00, 0xC2, 0x88, 0x00, 0x43, 0x00, 0xA2, 0xF4,
+	0x06, 0xC0, 0x0E, 0x80, 0x63, 0xDE, 0x86, 0xC0, 0x0E,
+	0x00, 0x33, 0x00, 0x80, 0xC0, 0x20, 0x81, 0x62, 0x04,
+	0x01, 0x02, 0xDA, 0x80, 0x63, 0x7C, 0x85, 0x80, 0x7B,
+	0x80, 0x63, 0x06, 0xA6, 0x8C, 0x06, 0x00, 0x33, 0x2C,
+	0x00, 0xC2, 0x88, 0x0C, 0xA2, 0x2E, 0x07, 0xFE, 0x95,
+	0x83, 0x03, 0x80, 0x63, 0x06, 0xA6, 0x2C, 0x07, 0x07,
+	0xA6, 0x7C, 0x05, 0x00, 0x33, 0x3D, 0x00, 0xC2, 0x88,
+	0x00, 0x00, 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0x0C,
+	0xA0, 0x44, 0x07, 0x07, 0xA6, 0x7C, 0x05, 0xBF, 0x23,
+	0x04, 0x61, 0x84, 0x01, 0xE6, 0x84, 0x00, 0x63, 0xF0,
+	0x04, 0x01, 0x01, 0xF1, 0x00, 0x00, 0x01, 0xF2, 0x00,
+	0x01, 0x05, 0x80, 0x01, 0x72, 0x04, 0x71, 0x00, 0x81,
+	0x01, 0x70, 0x04, 0x80, 0x05, 0x81, 0x05, 0x00, 0x63,
+	0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x01, 0x01, 0xF1,
+	0x00, 0x70, 0x00, 0x81, 0x01, 0x70, 0x04, 0x71, 0x00,
+	0x81, 0x01, 0x72, 0x00, 0x80, 0x01, 0x71, 0x04, 0x70,
+	0x00, 0x80, 0x01, 0x70, 0x04, 0x00, 0x63, 0xF0, 0x04,
+	0xF2, 0x00, 0x72, 0x04, 0x00, 0x01, 0xF1, 0x00, 0x70,
+	0x00, 0x80, 0x01, 0x70, 0x04, 0x71, 0x00, 0x80, 0x01,
+	0x72, 0x00, 0x81, 0x01, 0x71, 0x04, 0x70, 0x00, 0x81,
+	0x01, 0x70, 0x04, 0x00, 0x63, 0x00, 0x23, 0xB3, 0x01,
+	0x83, 0x05, 0xA3, 0x01, 0xA2, 0x01, 0xA1, 0x01, 0x01,
+	0x23, 0xA0, 0x01, 0x00, 0x01, 0xC8, 0x00, 0x03, 0xA1,
+	0xC4, 0x07, 0x00, 0x33, 0x07, 0x00, 0xC2, 0x88, 0x80,
+	0x05, 0x81, 0x05, 0x04, 0x01, 0x11, 0xC8, 0x48, 0x00,
+	0xB0, 0x01, 0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x05,
+	0x01, 0x48, 0x04, 0x00, 0x43, 0x00, 0xA2, 0xE4, 0x07,
+	0x00, 0x05, 0xDA, 0x87, 0x00, 0x01, 0xC8, 0x00, 0xFF,
+	0x23, 0x80, 0x01, 0x05, 0x05, 0x00, 0x63, 0xF7, 0x04,
+	0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, 0x00, 0x02, 0x80,
+	0x43, 0x76, 0x08, 0x80, 0x02, 0x77, 0x04, 0x00, 0x63,
+	0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, 0x00,
+	0x02, 0x00, 0xA0, 0x14, 0x08, 0x16, 0x88, 0x00, 0x43,
+	0x76, 0x08, 0x80, 0x02, 0x77, 0x04, 0x00, 0x63, 0xF3,
+	0x04, 0x00, 0x23, 0xF4, 0x00, 0x74, 0x00, 0x80, 0x43,
+	0xF4, 0x00, 0xCF, 0x40, 0x00, 0xA2, 0x44, 0x08, 0x74,
+	0x04, 0x02, 0x01, 0xF7, 0xC9, 0xF6, 0xD9, 0x00, 0x01,
+	0x01, 0xA1, 0x24, 0x08, 0x04, 0x98, 0x26, 0x95, 0x24,
+	0x88, 0x73, 0x04, 0x00, 0x63, 0xF3, 0x04, 0x75, 0x04,
+	0x5A, 0x88, 0x02, 0x01, 0x04, 0xD8, 0x46, 0x97, 0x04,
+	0x98, 0x26, 0x95, 0x4A, 0x88, 0x75, 0x00, 0x00, 0xA3,
+	0x64, 0x08, 0x00, 0x05, 0x4E, 0x88, 0x73, 0x04, 0x00,
+	0x63, 0x80, 0x7B, 0x80, 0x63, 0x06, 0xA6, 0x76, 0x08,
+	0x00, 0x33, 0x3E, 0x00, 0xC2, 0x88, 0x80, 0x67, 0x83,
+	0x03, 0x80, 0x63, 0x00, 0x63, 0x38, 0x2B, 0x9C, 0x88,
+	0x38, 0x2B, 0x92, 0x88, 0x32, 0x09, 0x31, 0x05, 0x92,
+	0x98, 0x05, 0x05, 0xB2, 0x09, 0x00, 0x63, 0x00, 0x32,
+	0x00, 0x36, 0x00, 0x3A, 0x00, 0x3E, 0x00, 0x63, 0x80,
+	0x32, 0x80, 0x36, 0x80, 0x3A, 0x80, 0x3E, 0xB4, 0x3D,
+	0x00, 0x63, 0x38, 0x2B, 0x40, 0x32, 0x40, 0x36, 0x40,
+	0x3A, 0x40, 0x3E, 0x00, 0x63, 0x5A, 0x20, 0xC9, 0x40,
+	0x00, 0xA0, 0xB4, 0x08, 0x5D, 0x00, 0xFE, 0xC3, 0x00,
+	0x63, 0x80, 0x73, 0xE6, 0x20, 0x02, 0x23, 0xE8, 0x00,
+	0x82, 0x73, 0xFF, 0xFD, 0x80, 0x73, 0x13, 0x23, 0xF8,
+	0x88, 0x66, 0x20, 0xC0, 0x20, 0x04, 0x23, 0xA0, 0x01,
+	0xA1, 0x23, 0xA1, 0x01, 0x81, 0x62, 0xE2, 0x88, 0x80,
+	0x73, 0x80, 0x77, 0x68, 0x00, 0x00, 0xA2, 0x80, 0x00,
+	0x03, 0xC2, 0xF1, 0xC7, 0x41, 0x23, 0xF8, 0x88, 0x11,
+	0x23, 0xA1, 0x01, 0x04, 0x23, 0xA0, 0x01, 0xE6, 0x84
 };
 
 u_int16_t adv_mcode_size = sizeof(adv_mcode);
-u_int32_t adv_mcode_chksum = 0x012B5442;
+u_int32_t adv_mcode_chksum = 0x012C453F;
diff --git a/sys/dev/advansys/advmcode.h b/sys/dev/advansys/advmcode.h
index 666bb774e0eb..b9430b75fdc0 100644
--- a/sys/dev/advansys/advmcode.h
+++ b/sys/dev/advansys/advmcode.h
@@ -5,7 +5,7 @@
  *
  * Obtained from:
  *
- * Copyright (c) 1995-1997 Advanced System Products, Inc.
+ * Copyright (c) 1995-1999 Advanced System Products, Inc.
  * All Rights Reserved.
  *   
  * Redistribution and use in source and binary forms, with or without