diff options
| author | Hidetoshi Shimokawa <simokawa@FreeBSD.org> | 2004-01-06 14:24:01 +0000 |
|---|---|---|
| committer | Hidetoshi Shimokawa <simokawa@FreeBSD.org> | 2004-01-06 14:24:01 +0000 |
| commit | c3e840a89b64a9c2ff84496bd454e0b82da7d33e (patch) | |
| tree | 80ff440394c0271b73596a095300bf5186ea13cf | |
| parent | a36805bd93d322d3b086db80beaa86bbba70aa98 (diff) | |
Notes
| -rw-r--r-- | sys/dev/firewire/fwohcireg.h | 67 |
1 files changed, 34 insertions, 33 deletions
diff --git a/sys/dev/firewire/fwohcireg.h b/sys/dev/firewire/fwohcireg.h index 5295cd53fed0..e4543b9f0336 100644 --- a/sys/dev/firewire/fwohcireg.h +++ b/sys/dev/firewire/fwohcireg.h @@ -171,6 +171,40 @@ struct fwohcidb { #define FWOHCIEV_MASK 0x1f +struct ohci_dma{ + fwohcireg_t cntl; + +#define OHCI_CNTL_CYCMATCH_S (0x1 << 31) + +#define OHCI_CNTL_BUFFIL (0x1 << 31) +#define OHCI_CNTL_ISOHDR (0x1 << 30) +#define OHCI_CNTL_CYCMATCH_R (0x1 << 29) +#define OHCI_CNTL_MULTICH (0x1 << 28) + +#define OHCI_CNTL_DMA_RUN (0x1 << 15) +#define OHCI_CNTL_DMA_WAKE (0x1 << 12) +#define OHCI_CNTL_DMA_DEAD (0x1 << 11) +#define OHCI_CNTL_DMA_ACTIVE (0x1 << 10) +#define OHCI_CNTL_DMA_BT (0x1 << 8) +#define OHCI_CNTL_DMA_BAD (0x1 << 7) +#define OHCI_CNTL_DMA_STAT (0xff) + + fwohcireg_t cntl_clr; + fwohcireg_t dummy0; + fwohcireg_t cmd; + fwohcireg_t match; + fwohcireg_t dummy1; + fwohcireg_t dummy2; + fwohcireg_t dummy3; +}; + +struct ohci_itdma{ + fwohcireg_t cntl; + fwohcireg_t cntl_clr; + fwohcireg_t dummy0; + fwohcireg_t cmd; +}; + struct ohci_registers { fwohcireg_t ver; /* Version No. 0x0 */ fwohcireg_t guid; /* GUID_ROM No. 0x4 */ @@ -262,32 +296,6 @@ struct ohci_registers { fwohcireg_t dummy7[23]; /* dummy 0x124-0x17c */ - struct ohci_dma{ - fwohcireg_t cntl; - -#define OHCI_CNTL_CYCMATCH_S (0x1 << 31) - -#define OHCI_CNTL_BUFFIL (0x1 << 31) -#define OHCI_CNTL_ISOHDR (0x1 << 30) -#define OHCI_CNTL_CYCMATCH_R (0x1 << 29) -#define OHCI_CNTL_MULTICH (0x1 << 28) - -#define OHCI_CNTL_DMA_RUN (0x1 << 15) -#define OHCI_CNTL_DMA_WAKE (0x1 << 12) -#define OHCI_CNTL_DMA_DEAD (0x1 << 11) -#define OHCI_CNTL_DMA_ACTIVE (0x1 << 10) -#define OHCI_CNTL_DMA_BT (0x1 << 8) -#define OHCI_CNTL_DMA_BAD (0x1 << 7) -#define OHCI_CNTL_DMA_STAT (0xff) - - fwohcireg_t cntl_clr; - fwohcireg_t dummy0; - fwohcireg_t cmd; - fwohcireg_t match; - fwohcireg_t dummy1; - fwohcireg_t dummy2; - fwohcireg_t dummy3; - } dummy8; /* 0x180, 0x184, 0x188, 0x18c */ /* 0x190, 0x194, 0x198, 0x19c */ /* 0x1a0, 0x1a4, 0x1a8, 0x1ac */ @@ -300,17 +308,10 @@ struct ohci_registers { /* 0x200, 0x204, 0x208, 0x20c */ /* 0x210, 0x204, 0x208, 0x20c */ - struct ohci_itdma{ - fwohcireg_t cntl; - fwohcireg_t cntl_clr; - fwohcireg_t dummy0; - fwohcireg_t cmd; - } dummy9; struct ohci_itdma dma_itch[0x20]; /* 0x400, 0x404, 0x408, 0x40c */ /* 0x410, 0x404, 0x408, 0x40c */ - struct ohci_dma dma_irch[0x20]; }; |