6 files changed, 37 insertions, 140 deletions

diff --git a/sys/arm/at91/at91.c b/sys/arm/at91/at91.c
index da3aa72b0508..e26b0db0ad7b 100644
--- a/sys/arm/at91/at91.c
+++ b/sys/arm/at91/at91.c
@@ -247,10 +247,12 @@ at91_attach(device_t dev)
 {
 	struct at91_softc *sc = device_get_softc(dev);
 	const struct pmap_devmap *pdevmap;
+	int i;
 
 	at91_softc = sc;
 	sc->sc_st = &at91_bs_tag;
 	sc->sc_sh = AT91_BASE;
+	sc->sc_aic_sh = AT91_BASE + AT91_SYS_BASE;
 	sc->dev = dev;
 
 	sc->sc_irq_rman.rm_type = RMAN_ARRAY;
@@ -269,13 +271,35 @@ at91_attach(device_t dev)
 			panic("at91_attach: failed to set up memory rman");
 	}
 
+	/*
+	 * Setup the interrupt table.
+	 */
+	if (soc_info.soc_data == NULL || soc_info.soc_data->soc_irq_prio == NULL)
+		panic("Interrupt priority table missing\n");
+	for (i = 0; i < 32; i++) {
+		bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SVR +
+		    i * 4, i);
+		/* Priority. */
+		bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SMR + i * 4,
+		    soc_info.soc_data->soc_irq_prio[i]);
+		if (i < 8)
+			bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_EOICR,
+			    1);
+	}
+
+	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SPU, 32);
+	/* No debug. */
+	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_DCR, 0);
+	/* Disable and clear all interrupts. */
+	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_IDCR, 0xffffffff);
+	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_ICCR, 0xffffffff);
 
 	/*
-         * Our device list will be added automatically by the cpu device
+	 * Our device list will be added automatically by the cpu device
 	 * e.g. at91rm9200.c when it is identified. To ensure that the
 	 * CPU and PMC are attached first any other "identified" devices
 	 * call BUS_ADD_CHILD(9) with an "order" of at least 2.
-         */
+	 */
 
 	bus_generic_probe(dev);
 	bus_generic_attach(dev);
diff --git a/sys/arm/at91/at91rm9200.c b/sys/arm/at91/at91rm9200.c
index 51627f05ad7d..f50bd67bef8d 100644
--- a/sys/arm/at91/at91rm9200.c
+++ b/sys/arm/at91/at91rm9200.c
@@ -183,8 +183,6 @@ at91_attach(device_t dev)
 {
 	struct at91_pmc_clock *clk;
 	struct at91rm92_softc *sc = device_get_softc(dev);
-	int i;
-
 	struct at91_softc *at91sc = device_get_softc(device_get_parent(dev));
 
 	sc->sc_st = at91sc->sc_st;
@@ -195,31 +193,6 @@ at91_attach(device_t dev)
 	    AT91RM92_SYS_SIZE, &sc->sc_sys_sh) != 0)
 		panic("Enable to map system registers");
 
-	if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91RM92_AIC_BASE,
-	    AT91RM92_AIC_SIZE, &sc->sc_aic_sh) != 0)
-		panic("Enable to map system registers");
-
-	/* XXX Hack to tell atmelarm about the AIC */
-	at91sc->sc_aic_sh = sc->sc_aic_sh;
-
-	for (i = 0; i < 32; i++) {
-		bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SVR +
-		    i * 4, i);
-		/* Priority. */
-		bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SMR + i * 4,
-		    at91_irq_prio[i]);
-		if (i < 8)
-			bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_EOICR,
-			    1);
-	}
-
-	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SPU, 32);
-	/* No debug. */
-	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_DCR, 0);
-	/* Disable and clear all interrupts. */
-	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_IDCR, 0xffffffff);
-	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_ICCR, 0xffffffff);
-
 	/* Disable all interrupts for RTC (0xe24 == RTC_IDR) */
 	bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xe24, 0xffffffff);
 
@@ -283,7 +256,8 @@ DRIVER_MODULE(at91rm920, atmelarm, at91rm92_driver, at91rm92_devclass, 0, 0);
 
 static struct at91_soc_data soc_data = {
 	.soc_delay = at91_st_delay,
-	.soc_reset = at91_st_cpu_reset
+	.soc_reset = at91_st_cpu_reset,
+	.soc_irq_prio = at91_irq_prio,
 };
 
 AT91_SOC(AT91_T_RM9200, &soc_data);
diff --git a/sys/arm/at91/at91sam9260.c b/sys/arm/at91/at91sam9260.c
index 9ea0335ca8ac..aeeb62cd3f53 100644
--- a/sys/arm/at91/at91sam9260.c
+++ b/sys/arm/at91/at91sam9260.c
@@ -51,8 +51,6 @@ struct at91sam9_softc {
 	device_t dev;
 	bus_space_tag_t sc_st;
 	bus_space_handle_t sc_sh;
-	bus_space_handle_t sc_sys_sh;
-	bus_space_handle_t sc_aic_sh;
 	bus_space_handle_t sc_matrix_sh;
 };
 
@@ -184,43 +182,13 @@ at91_attach(device_t dev)
 {
 	struct at91_pmc_clock *clk;
 	struct at91sam9_softc *sc = device_get_softc(dev);
-	int i;
-
 	struct at91_softc *at91sc = device_get_softc(device_get_parent(dev));
+	uint32_t i;
 
 	sc->sc_st = at91sc->sc_st;
 	sc->sc_sh = at91sc->sc_sh;
 	sc->dev = dev;
 
-	if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9260_SYS_BASE,
-	    AT91SAM9260_SYS_SIZE, &sc->sc_sys_sh) != 0)
-		panic("Enable to map system registers");
-
-	if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9260_AIC_BASE,
-	    AT91SAM9260_AIC_SIZE, &sc->sc_aic_sh) != 0)
-		panic("Enable to map system registers");
-
-	/* XXX Hack to tell atmelarm about the AIC */
-	at91sc->sc_aic_sh = sc->sc_aic_sh;
-
-	for (i = 0; i < 32; i++) {
-		bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SVR +
-		    i * 4, i);
-		/* Priority. */
-		bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SMR + i * 4,
-		    at91_irq_prio[i]);
-		if (i < 8)
-			bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_EOICR,
-			    1);
-	}
-
-	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SPU, 32);
-	/* No debug. */
-	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_DCR, 0);
-	/* Disable and clear all interrupts. */
-	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_IDCR, 0xffffffff);
-	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_ICCR, 0xffffffff);
-
 	if (bus_space_subregion(sc->sc_st, sc->sc_sh,
 	    AT91SAM9260_MATRIX_BASE, AT91SAM9260_MATRIX_SIZE,
 	    &sc->sc_matrix_sh) != 0)
@@ -299,7 +267,8 @@ DRIVER_MODULE(at91sam9260, atmelarm, at91sam9260_driver, at91sam9260_devclass,
 
 static struct at91_soc_data soc_data = {
 	.soc_delay = at91_pit_delay,
-	.soc_reset = at91_rst_cpu_reset
+	.soc_reset = at91_rst_cpu_reset,
+	.soc_irq_prio = at91_irq_prio,
 };
 
 AT91_SOC(AT91_T_SAM9260, &soc_data);
diff --git a/sys/arm/at91/at91sam9g20.c b/sys/arm/at91/at91sam9g20.c
index 4b87ad02876d..905d0ea9a8f0 100644
--- a/sys/arm/at91/at91sam9g20.c
+++ b/sys/arm/at91/at91sam9g20.c
@@ -51,8 +51,6 @@ struct at91sam9_softc {
 	device_t dev;
 	bus_space_tag_t sc_st;
 	bus_space_handle_t sc_sh;
-	bus_space_handle_t sc_sys_sh;
-	bus_space_handle_t sc_aic_sh;
 	bus_space_handle_t sc_matrix_sh;
 };
 
@@ -191,47 +189,13 @@ at91_attach(device_t dev)
 {
 	struct at91_pmc_clock *clk;
 	struct at91sam9_softc *sc = device_get_softc(dev);
-	int i;
-
 	struct at91_softc *at91sc = device_get_softc(device_get_parent(dev));
+	uint32_t i;
 
 	sc->sc_st = at91sc->sc_st;
 	sc->sc_sh = at91sc->sc_sh;
 	sc->dev = dev;
 
-	/*
-	 * XXX These values work for the RM9200, SAM926[01], and SAM9G20
-	 * will have to fix this when we want to support anything else. XXX
-	 */
-	if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9G20_SYS_BASE,
-	    AT91SAM9G20_SYS_SIZE, &sc->sc_sys_sh) != 0)
-		panic("Enable to map system registers");
-
-	if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9G20_AIC_BASE,
-	    AT91SAM9G20_AIC_SIZE, &sc->sc_aic_sh) != 0)
-		panic("Enable to map system registers");
-
-	/* XXX Hack to tell atmelarm about the AIC */
-	at91sc->sc_aic_sh = sc->sc_aic_sh;
-
-	for (i = 0; i < 32; i++) {
-		bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SVR +
-		    i * 4, i);
-		/* Priority. */
-		bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SMR + i * 4,
-		    at91_irq_prio[i]);
-		if (i < 8)
-			bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_EOICR,
-			    1);
-	}
-
-	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SPU, 32);
-	/* No debug. */
-	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_DCR, 0);
-	/* Disable and clear all interrupts. */
-	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_IDCR, 0xffffffff);
-	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_ICCR, 0xffffffff);
-
 	if (bus_space_subregion(sc->sc_st, sc->sc_sh,
 	    AT91SAM9G20_MATRIX_BASE, AT91SAM9G20_MATRIX_SIZE,
 	    &sc->sc_matrix_sh) != 0)
@@ -301,7 +265,8 @@ DRIVER_MODULE(at91sam, atmelarm, at91sam9_driver, at91sam9_devclass, 0, 0);
 
 static struct at91_soc_data soc_data = {
 	.soc_delay = at91_pit_delay,
-	.soc_reset = at91_rst_cpu_reset
+	.soc_reset = at91_rst_cpu_reset,
+	.soc_irq_prio = at91_irq_prio,
 };
 
 AT91_SOC(AT91_T_SAM9G20, &soc_data);
diff --git a/sys/arm/at91/at91sam9x25.c b/sys/arm/at91/at91sam9x25.c
index b84d30c5398e..ac2c4f84c490 100644
--- a/sys/arm/at91/at91sam9x25.c
+++ b/sys/arm/at91/at91sam9x25.c
@@ -51,8 +51,6 @@ struct at91sam9x25_softc {
 	device_t dev;
 	bus_space_tag_t sc_st;
 	bus_space_handle_t sc_sh;
-	bus_space_handle_t sc_sys_sh;
-	bus_space_handle_t sc_aic_sh;
 };
 
 /*
@@ -193,47 +191,12 @@ at91_attach(device_t dev)
 {
 	struct at91_pmc_clock *clk;
 	struct at91sam9x25_softc *sc = device_get_softc(dev);
-	int i;
-
 	struct at91_softc *at91sc = device_get_softc(device_get_parent(dev));
 
 	sc->sc_st = at91sc->sc_st;
 	sc->sc_sh = at91sc->sc_sh;
 	sc->dev = dev;
 
-	/* 
-	 * XXX These values work for the RM9200, SAM926[01], and SAM9X25
-	 * will have to fix this when we want to support anything else. XXX
-	 */
-	if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9X25_SYS_BASE,
-	    AT91SAM9X25_SYS_SIZE, &sc->sc_sys_sh) != 0)
-		panic("Enable to map system registers");
-
-	if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9X25_AIC_BASE,
-	    AT91SAM9X25_AIC_SIZE, &sc->sc_aic_sh) != 0)
-		panic("Enable to map system registers");
-
-	/* XXX Hack to tell atmelarm about the AIC */
-	at91sc->sc_aic_sh = sc->sc_aic_sh;
-
-	for (i = 0; i < 32; i++) {
-		bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SVR + 
-		    i * 4, i);
-		/* Priority. */
-		bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SMR + i * 4,
-		    at91_irq_prio[i]);
-		if (i < 8)
-			bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_EOICR,
-			    1);
-	}
-
-	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SPU, 32);
-	/* No debug. */
-	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_DCR, 0);
-	/* Disable and clear all interrupts. */
-	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_IDCR, 0xffffffff);
-	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_ICCR, 0xffffffff);
-
 	/* Update USB device port clock info */
 	clk = at91_pmc_clock_ref("udpck");
 	clk->pmc_mask  = PMC_SCER_UDP_SAM9;
@@ -290,7 +253,8 @@ DRIVER_MODULE(at91sam9x25, atmelarm, at91sam9x25_driver, at91sam9x25_devclass, 0
 
 static struct at91_soc_data soc_data = {
 	.soc_delay = at91_pit_delay,
-	.soc_reset = at91_rst_cpu_reset
+	.soc_reset = at91_rst_cpu_reset,
+	.soc_irq_prio = at91_irq_prio,
 };
 
 AT91_SOC_SUB(AT91_T_SAM9X5, AT91_ST_SAM9X25, &soc_data);
diff --git a/sys/arm/at91/at91var.h b/sys/arm/at91/at91var.h
index 183b7236b66b..84355e1d5ecf 100644
--- a/sys/arm/at91/at91var.h
+++ b/sys/arm/at91/at91var.h
@@ -108,6 +108,7 @@ typedef void (*cpu_reset_t)(void);
 struct at91_soc_data {
 	DELAY_t		soc_delay;
 	cpu_reset_t	soc_reset;
+	const int	*soc_irq_prio;
 };
 
 struct at91_soc_info {