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author | Warner Losh <imp@FreeBSD.org> | 2014-02-27 19:39:44 +0000 |
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committer | Warner Losh <imp@FreeBSD.org> | 2014-02-27 19:39:44 +0000 |
commit | 0d4a4b13019e01c1eab30b74c983040450010b81 (patch) | |
tree | ff6e99cffa59c3e85a311d8dd06e6f6dab4988b2 /Bindings/powerpc/fsl/cpm_qe/gpio.txt | |
download | src-test2-0d4a4b13019e01c1eab30b74c983040450010b81.tar.gz src-test2-0d4a4b13019e01c1eab30b74c983040450010b81.zip |
Notes
Diffstat (limited to 'Bindings/powerpc/fsl/cpm_qe/gpio.txt')
-rw-r--r-- | Bindings/powerpc/fsl/cpm_qe/gpio.txt | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/Bindings/powerpc/fsl/cpm_qe/gpio.txt b/Bindings/powerpc/fsl/cpm_qe/gpio.txt new file mode 100644 index 000000000000..349f79fd7076 --- /dev/null +++ b/Bindings/powerpc/fsl/cpm_qe/gpio.txt @@ -0,0 +1,38 @@ +Every GPIO controller node must have #gpio-cells property defined, +this information will be used to translate gpio-specifiers. + +On CPM1 devices, all ports are using slightly different register layouts. +Ports A, C and D are 16bit ports and Ports B and E are 32bit ports. + +On CPM2 devices, all ports are 32bit ports and use a common register layout. + +Required properties: +- compatible : "fsl,cpm1-pario-bank-a", "fsl,cpm1-pario-bank-b", + "fsl,cpm1-pario-bank-c", "fsl,cpm1-pario-bank-d", + "fsl,cpm1-pario-bank-e", "fsl,cpm2-pario-bank" +- #gpio-cells : Should be two. The first cell is the pin number and the + second cell is used to specify optional parameters (currently unused). +- gpio-controller : Marks the port as GPIO controller. + +Example of three SOC GPIO banks defined as gpio-controller nodes: + + CPM1_PIO_A: gpio-controller@950 { + #gpio-cells = <2>; + compatible = "fsl,cpm1-pario-bank-a"; + reg = <0x950 0x10>; + gpio-controller; + }; + + CPM1_PIO_B: gpio-controller@ab8 { + #gpio-cells = <2>; + compatible = "fsl,cpm1-pario-bank-b"; + reg = <0xab8 0x10>; + gpio-controller; + }; + + CPM1_PIO_E: gpio-controller@ac8 { + #gpio-cells = <2>; + compatible = "fsl,cpm1-pario-bank-e"; + reg = <0xac8 0x18>; + gpio-controller; + }; |