diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2020-01-24 22:00:03 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2020-01-24 22:00:03 +0000 |
| commit | 480093f4440d54b30b3025afeac24b48f2ba7a2e (patch) | |
| tree | 162e72994062888647caf0d875428db9445491a8 /contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 489b1cf2ecf5b9b4a394857987014bfb09067726 (diff) | |
| parent | 706b4fc47bbc608932d3b491ae19a3b9cde9497b (diff) | |
Notes
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp index 15943ba42156..1461a40227bf 100644 --- a/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp +++ b/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp @@ -38,7 +38,6 @@ public: DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size, ArrayRef<uint8_t> Bytes, uint64_t Address, - raw_ostream &VStream, raw_ostream &CStream) const override; }; } // end anonymous namespace @@ -49,7 +48,7 @@ static MCDisassembler *createRISCVDisassembler(const Target &T, return new RISCVDisassembler(STI, Ctx); } -extern "C" void LLVMInitializeRISCVDisassembler() { +extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVDisassembler() { // Register the disassembler for each target. TargetRegistry::RegisterMCDisassembler(getTheRISCV32Target(), createRISCVDisassembler); @@ -315,7 +314,6 @@ static DecodeStatus decodeRVCInstrRdRs1Rs2(MCInst &Inst, unsigned Insn, DecodeStatus RISCVDisassembler::getInstruction(MCInst &MI, uint64_t &Size, ArrayRef<uint8_t> Bytes, uint64_t Address, - raw_ostream &OS, raw_ostream &CS) const { // TODO: This will need modification when supporting instruction set // extensions with instructions > 32-bits (up to 176 bits wide). |