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authorDimitry Andric <dim@FreeBSD.org>2010-10-30 23:02:32 +0000
committerDimitry Andric <dim@FreeBSD.org>2010-10-30 23:02:32 +0000
commitb3cded65e92ba4d9b5e5a33fb95c4d551bda9c1b (patch)
tree69d40fbef2c0c4ee32fe97b7a28b510f2e3c2dbc /gas/doc/c-bfin.texi
parent7a815afd9b5121ee0f65dc1e1de1c0de6de97679 (diff)
Notes
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diff --git a/gas/doc/c-bfin.texi b/gas/doc/c-bfin.texi
index dcf649a2b890..0b8ae1d9f3e4 100644
--- a/gas/doc/c-bfin.texi
+++ b/gas/doc/c-bfin.texi
@@ -97,9 +97,9 @@ The set of 32-bit registers (R0, R1, R2, R3, R4, R5, R6 and R7) that
normally contain data for manipulation. These are abbreviated as
D-register or Dreg. Data registers can be accessed as 32-bit registers
or as two independent 16-bit registers. The least significant 16 bits
-of each register is called the "low" half and is desginated with ".L"
+of each register is called the "low" half and is designated with ".L"
following the register name. The most significant 16 bits are called
-the "high" half and is designated with ".H". following the name.
+the "high" half and is designated with ".H" following the name.
@smallexample
R7.L, r2.h, r4.L, R0.H