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author | Emmanuel Vadot <manu@FreeBSD.org> | 2017-03-07 12:41:06 +0000 |
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committer | Emmanuel Vadot <manu@FreeBSD.org> | 2017-03-07 12:41:06 +0000 |
commit | ff018dbf5bb142aa83bd955e5b6c55d66e9e9c1e (patch) | |
tree | 5cd0b74d984dae06ea54b6b09998163538d3c162 /include/dt-bindings/clock/r8a7794-clock.h | |
parent | c7716441be3a4a48aa7b7cdf69a15625c1cd8ef5 (diff) | |
download | src-test2-ff018dbf5bb142aa83bd955e5b6c55d66e9e9c1e.tar.gz src-test2-ff018dbf5bb142aa83bd955e5b6c55d66e9e9c1e.zip |
Notes
Diffstat (limited to 'include/dt-bindings/clock/r8a7794-clock.h')
-rw-r--r-- | include/dt-bindings/clock/r8a7794-clock.h | 29 |
1 files changed, 26 insertions, 3 deletions
diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index 4d3ecd626c1f..88e64846cf37 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -20,8 +20,7 @@ #define R8A7794_CLK_QSPI 5 #define R8A7794_CLK_SDH 6 #define R8A7794_CLK_SD0 7 -#define R8A7794_CLK_Z 8 -#define R8A7794_CLK_RCAN 9 +#define R8A7794_CLK_RCAN 8 /* MSTP0 */ #define R8A7794_CLK_MSIOF0 0 @@ -67,7 +66,7 @@ #define R8A7794_CLK_IRQC 7 /* MSTP5 */ -#define R8A7794_CLK_THERMAL 22 +#define R8A7794_CLK_AUDIO_DMAC0 2 #define R8A7794_CLK_PWM 23 /* MSTP7 */ @@ -108,6 +107,30 @@ #define R8A7794_CLK_I2C1 30 #define R8A7794_CLK_I2C0 31 +/* MSTP10 */ +#define R8A7794_CLK_SSI_ALL 5 +#define R8A7794_CLK_SSI9 6 +#define R8A7794_CLK_SSI8 7 +#define R8A7794_CLK_SSI7 8 +#define R8A7794_CLK_SSI6 9 +#define R8A7794_CLK_SSI5 10 +#define R8A7794_CLK_SSI4 11 +#define R8A7794_CLK_SSI3 12 +#define R8A7794_CLK_SSI2 13 +#define R8A7794_CLK_SSI1 14 +#define R8A7794_CLK_SSI0 15 +#define R8A7794_CLK_SCU_ALL 17 +#define R8A7794_CLK_SCU_DVC1 18 +#define R8A7794_CLK_SCU_DVC0 19 +#define R8A7794_CLK_SCU_CTU1_MIX1 20 +#define R8A7794_CLK_SCU_CTU0_MIX0 21 +#define R8A7794_CLK_SCU_SRC6 25 +#define R8A7794_CLK_SCU_SRC5 26 +#define R8A7794_CLK_SCU_SRC4 27 +#define R8A7794_CLK_SCU_SRC3 28 +#define R8A7794_CLK_SCU_SRC2 29 +#define R8A7794_CLK_SCU_SRC1 30 + /* MSTP11 */ #define R8A7794_CLK_SCIFA3 6 #define R8A7794_CLK_SCIFA4 7 |