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authorEmmanuel Vadot <manu@FreeBSD.org>2018-08-13 05:53:54 +0000
committerEmmanuel Vadot <manu@FreeBSD.org>2018-08-13 05:53:54 +0000
commitc4fc09e238494b428e1e0abfd881425a86d8bfe7 (patch)
treef214adda0feb0a7e86c69f9225d8845129b46288 /include/dt-bindings/memory/tegra20-mc.h
parentc19dc8ed9745602cc89c0f0c31220c71d7ac2063 (diff)
downloadsrc-test2-c4fc09e238494b428e1e0abfd881425a86d8bfe7.tar.gz
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Diffstat (limited to 'include/dt-bindings/memory/tegra20-mc.h')
-rw-r--r--include/dt-bindings/memory/tegra20-mc.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/include/dt-bindings/memory/tegra20-mc.h b/include/dt-bindings/memory/tegra20-mc.h
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index 000000000000..35e131eee198
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+++ b/include/dt-bindings/memory/tegra20-mc.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef DT_BINDINGS_MEMORY_TEGRA20_MC_H
+#define DT_BINDINGS_MEMORY_TEGRA20_MC_H
+
+#define TEGRA20_MC_RESET_AVPC 0
+#define TEGRA20_MC_RESET_DC 1
+#define TEGRA20_MC_RESET_DCB 2
+#define TEGRA20_MC_RESET_EPP 3
+#define TEGRA20_MC_RESET_2D 4
+#define TEGRA20_MC_RESET_HC 5
+#define TEGRA20_MC_RESET_ISP 6
+#define TEGRA20_MC_RESET_MPCORE 7
+#define TEGRA20_MC_RESET_MPEA 8
+#define TEGRA20_MC_RESET_MPEB 9
+#define TEGRA20_MC_RESET_MPEC 10
+#define TEGRA20_MC_RESET_3D 11
+#define TEGRA20_MC_RESET_PPCS 12
+#define TEGRA20_MC_RESET_VDE 13
+#define TEGRA20_MC_RESET_VI 14
+
+#endif