diff options
| author | Ed Schouten <ed@FreeBSD.org> | 2009-06-22 08:08:12 +0000 |
|---|---|---|
| committer | Ed Schouten <ed@FreeBSD.org> | 2009-06-22 08:08:12 +0000 |
| commit | b2f21fb044b6b5c52cff6227f9f79ca4ed42b18f (patch) | |
| tree | 86c1bc482baa6c81fc70b8d715153bfa93377186 /include/llvm/CodeGen/MachineRegisterInfo.h | |
| parent | 600c6fa13de5c407dc36dbb0ab73807868741ae0 (diff) | |
Notes
Diffstat (limited to 'include/llvm/CodeGen/MachineRegisterInfo.h')
| -rw-r--r-- | include/llvm/CodeGen/MachineRegisterInfo.h | 29 |
1 files changed, 28 insertions, 1 deletions
diff --git a/include/llvm/CodeGen/MachineRegisterInfo.h b/include/llvm/CodeGen/MachineRegisterInfo.h index 02f9b7c686e2..80c37b39ca0c 100644 --- a/include/llvm/CodeGen/MachineRegisterInfo.h +++ b/include/llvm/CodeGen/MachineRegisterInfo.h @@ -37,6 +37,15 @@ class MachineRegisterInfo { /// virtual registers. For each target register class, it keeps a list of /// virtual registers belonging to the class. std::vector<std::vector<unsigned> > RegClass2VRegMap; + + /// RegAllocHints - This vector records register allocation hints for virtual + /// registers. For each virtual register, it keeps a register and hint type + /// pair making up the allocation hint. Hint type is target specific except + /// for the value 0 which means the second value of the pair is the preferred + /// register for allocation. For example, if the hint is <0, 1024>, it means + /// the allocator should prefer the physical register allocated to the virtual + /// register of the hint. + std::vector<std::pair<unsigned, unsigned> > RegAllocHints; /// PhysRegUseDefLists - This is an array of the head of the use/def list for /// physical registers. @@ -170,7 +179,25 @@ public: std::vector<unsigned> &getRegClassVirtRegs(const TargetRegisterClass *RC) { return RegClass2VRegMap[RC->getID()]; } - + + /// setRegAllocationHint - Specify a register allocation hint for the + /// specified virtual register. + void setRegAllocationHint(unsigned Reg, unsigned Type, unsigned PrefReg) { + Reg -= TargetRegisterInfo::FirstVirtualRegister; + assert(Reg < VRegInfo.size() && "Invalid vreg!"); + RegAllocHints[Reg].first = Type; + RegAllocHints[Reg].second = PrefReg; + } + + /// getRegAllocationHint - Return the register allocation hint for the + /// specified virtual register. + std::pair<unsigned, unsigned> + getRegAllocationHint(unsigned Reg) const { + Reg -= TargetRegisterInfo::FirstVirtualRegister; + assert(Reg < VRegInfo.size() && "Invalid vreg!"); + return RegAllocHints[Reg]; + } + //===--------------------------------------------------------------------===// // Physical Register Use Info //===--------------------------------------------------------------------===// |
