diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2012-08-15 19:34:23 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2012-08-15 19:34:23 +0000 |
commit | 58b69754af0cbff56b1cfce9be9392e4451f6628 (patch) | |
tree | eacfc83d988e4b9d11114387ae7dc41243f2a363 /include/llvm/CodeGen/MachineScheduler.h | |
parent | 0378662f5bd3dbe8305a485b0282bceb8b52f465 (diff) |
Diffstat (limited to 'include/llvm/CodeGen/MachineScheduler.h')
-rw-r--r-- | include/llvm/CodeGen/MachineScheduler.h | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/include/llvm/CodeGen/MachineScheduler.h b/include/llvm/CodeGen/MachineScheduler.h index e852009f7e8b..8da2045ad0be 100644 --- a/include/llvm/CodeGen/MachineScheduler.h +++ b/include/llvm/CodeGen/MachineScheduler.h @@ -19,7 +19,7 @@ // createCustomMachineSched); // // Inside <Target>PassConfig: -// enablePass(MachineSchedulerID); +// enablePass(&MachineSchedulerID); // MachineSchedRegistry::setDefault(createCustomMachineSched); // //===----------------------------------------------------------------------===// @@ -35,6 +35,7 @@ class AliasAnalysis; class LiveIntervals; class MachineDominatorTree; class MachineLoopInfo; +class RegisterClassInfo; class ScheduleDAGInstrs; /// MachineSchedContext provides enough context from the MachineScheduler pass @@ -47,7 +48,10 @@ struct MachineSchedContext { AliasAnalysis *AA; LiveIntervals *LIS; - MachineSchedContext(): MF(0), MLI(0), MDT(0), PassConfig(0), AA(0), LIS(0) {} + RegisterClassInfo *RegClassInfo; + + MachineSchedContext(); + virtual ~MachineSchedContext(); }; /// MachineSchedRegistry provides a selection of available machine instruction @@ -81,6 +85,9 @@ public: static void setDefault(ScheduleDAGCtor C) { Registry.setDefault((MachinePassCtor)C); } + static void setDefault(StringRef Name) { + Registry.setDefault(Name); + } static void setListener(MachinePassRegistryListener *L) { Registry.setListener(L); } |