diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2017-06-10 13:44:06 +0000 |
---|---|---|
committer | Dimitry Andric <dim@FreeBSD.org> | 2017-06-10 13:44:06 +0000 |
commit | 7ab83427af0f77b59941ceba41d509d7d097b065 (patch) | |
tree | cc41c05b1db454e3d802f34df75e636ee922ad87 /include/llvm/CodeGen/TargetPassConfig.h | |
parent | d288ef4c1788d3a951a7558c68312c2d320612b1 (diff) |
Diffstat (limited to 'include/llvm/CodeGen/TargetPassConfig.h')
-rw-r--r-- | include/llvm/CodeGen/TargetPassConfig.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/include/llvm/CodeGen/TargetPassConfig.h b/include/llvm/CodeGen/TargetPassConfig.h index fcf1937c186e..c109b7489cca 100644 --- a/include/llvm/CodeGen/TargetPassConfig.h +++ b/include/llvm/CodeGen/TargetPassConfig.h @@ -119,6 +119,10 @@ protected: /// callers. bool RequireCodeGenSCCOrder; + /// Add the actual instruction selection passes. This does not include + /// preparation passes on IR. + bool addCoreISelPasses(); + public: TargetPassConfig(LLVMTargetMachine &TM, PassManagerBase &pm); // Dummy constructor. @@ -206,6 +210,13 @@ public: /// has not be overriden on the command line with '-regalloc=...' bool usingDefaultRegAlloc() const; + /// High level function that adds all passes necessary to go from llvm IR + /// representation to the MI representation. + /// Adds IR based lowering and target specific optimization passes and finally + /// the core instruction selection passes. + /// \returns true if an error occured, false otherwise. + bool addISelPasses(); + /// Add common target configurable passes that perform LLVM IR to IR /// transforms following machine independent optimization. virtual void addIRPasses(); |