diff options
author | Ed Schouten <ed@FreeBSD.org> | 2009-06-22 08:08:12 +0000 |
---|---|---|
committer | Ed Schouten <ed@FreeBSD.org> | 2009-06-22 08:08:12 +0000 |
commit | b2f21fb044b6b5c52cff6227f9f79ca4ed42b18f (patch) | |
tree | 86c1bc482baa6c81fc70b8d715153bfa93377186 /include/llvm/CodeGen | |
parent | 600c6fa13de5c407dc36dbb0ab73807868741ae0 (diff) |
Notes
Diffstat (limited to 'include/llvm/CodeGen')
-rw-r--r-- | include/llvm/CodeGen/DebugLoc.h | 101 | ||||
-rw-r--r-- | include/llvm/CodeGen/FastISel.h | 1 | ||||
-rw-r--r-- | include/llvm/CodeGen/LiveInterval.h | 148 | ||||
-rw-r--r-- | include/llvm/CodeGen/MachineFunction.h | 2 | ||||
-rw-r--r-- | include/llvm/CodeGen/MachineInstr.h | 4 | ||||
-rw-r--r-- | include/llvm/CodeGen/MachineOperand.h | 18 | ||||
-rw-r--r-- | include/llvm/CodeGen/MachineRegisterInfo.h | 29 | ||||
-rw-r--r-- | include/llvm/CodeGen/RuntimeLibcalls.h | 4 | ||||
-rw-r--r-- | include/llvm/CodeGen/SelectionDAGNodes.h | 2 |
9 files changed, 172 insertions, 137 deletions
diff --git a/include/llvm/CodeGen/DebugLoc.h b/include/llvm/CodeGen/DebugLoc.h deleted file mode 100644 index 77e6733f696a..000000000000 --- a/include/llvm/CodeGen/DebugLoc.h +++ /dev/null @@ -1,101 +0,0 @@ -//===---- llvm/CodeGen/DebugLoc.h - Debug Location Information --*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file defines a number of light weight data structures used by the code -// generator to describe and track debug location information. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_CODEGEN_DEBUGLOC_H -#define LLVM_CODEGEN_DEBUGLOC_H - -#include "llvm/ADT/DenseMap.h" -#include <vector> - -namespace llvm { - class GlobalVariable; - - /// DebugLocTuple - Debug location tuple of filename id, line and column. - /// - struct DebugLocTuple { - GlobalVariable *CompileUnit; - unsigned Line, Col; - - DebugLocTuple(GlobalVariable *v, unsigned l, unsigned c) - : CompileUnit(v), Line(l), Col(c) {}; - - bool operator==(const DebugLocTuple &DLT) const { - return CompileUnit == DLT.CompileUnit && - Line == DLT.Line && Col == DLT.Col; - } - bool operator!=(const DebugLocTuple &DLT) const { - return !(*this == DLT); - } - }; - - /// DebugLoc - Debug location id. This is carried by SDNode and MachineInstr - /// to index into a vector of unique debug location tuples. - class DebugLoc { - unsigned Idx; - - public: - DebugLoc() : Idx(~0U) {} // Defaults to invalid. - - static DebugLoc getUnknownLoc() { DebugLoc L; L.Idx = ~0U; return L; } - static DebugLoc get(unsigned idx) { DebugLoc L; L.Idx = idx; return L; } - - unsigned getIndex() const { return Idx; } - - /// isUnknown - Return true if there is no debug info for the SDNode / - /// MachineInstr. - bool isUnknown() const { return Idx == ~0U; } - - bool operator==(const DebugLoc &DL) const { return Idx == DL.Idx; } - bool operator!=(const DebugLoc &DL) const { return !(*this == DL); } - }; - - // Partially specialize DenseMapInfo for DebugLocTyple. - template<> struct DenseMapInfo<DebugLocTuple> { - static inline DebugLocTuple getEmptyKey() { - return DebugLocTuple(0, ~0U, ~0U); - } - static inline DebugLocTuple getTombstoneKey() { - return DebugLocTuple((GlobalVariable*)~1U, ~1U, ~1U); - } - static unsigned getHashValue(const DebugLocTuple &Val) { - return DenseMapInfo<GlobalVariable*>::getHashValue(Val.CompileUnit) ^ - DenseMapInfo<unsigned>::getHashValue(Val.Line) ^ - DenseMapInfo<unsigned>::getHashValue(Val.Col); - } - static bool isEqual(const DebugLocTuple &LHS, const DebugLocTuple &RHS) { - return LHS.CompileUnit == RHS.CompileUnit && - LHS.Line == RHS.Line && - LHS.Col == RHS.Col; - } - - static bool isPod() { return true; } - }; - - /// DebugLocTracker - This class tracks debug location information. - /// - struct DebugLocTracker { - /// DebugLocations - A vector of unique DebugLocTuple's. - /// - std::vector<DebugLocTuple> DebugLocations; - - /// DebugIdMap - This maps DebugLocTuple's to indices into the - /// DebugLocations vector. - DenseMap<DebugLocTuple, unsigned> DebugIdMap; - - DebugLocTracker() {} - }; - -} // end namespace llvm - -#endif /* LLVM_CODEGEN_DEBUGLOC_H */ diff --git a/include/llvm/CodeGen/FastISel.h b/include/llvm/CodeGen/FastISel.h index 38c1710d7103..c7b1a42d06b6 100644 --- a/include/llvm/CodeGen/FastISel.h +++ b/include/llvm/CodeGen/FastISel.h @@ -16,7 +16,6 @@ #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/SmallSet.h" -#include "llvm/CodeGen/DebugLoc.h" #include "llvm/CodeGen/SelectionDAGNodes.h" namespace llvm { diff --git a/include/llvm/CodeGen/LiveInterval.h b/include/llvm/CodeGen/LiveInterval.h index f1ae587ac195..0cb7e9004387 100644 --- a/include/llvm/CodeGen/LiveInterval.h +++ b/include/llvm/CodeGen/LiveInterval.h @@ -29,29 +29,112 @@ namespace llvm { class MachineInstr; + class MachineRegisterInfo; class TargetRegisterInfo; struct LiveInterval; - /// VNInfo - If the value number definition is undefined (e.g. phi - /// merge point), it contains ~0u,x. If the value number is not in use, it - /// contains ~1u,x to indicate that the value # is not used. - /// def - Instruction # of the definition. - /// - or reg # of the definition if it's a stack slot liveinterval. - /// copy - Copy iff val# is defined by a copy; zero otherwise. - /// hasPHIKill - One or more of the kills are PHI nodes. - /// redefByEC - Re-defined by early clobber somewhere during the live range. - /// kills - Instruction # of the kills. - struct VNInfo { + /// VNInfo - Value Number Information. + /// This class holds information about a machine level values, including + /// definition and use points. + /// + /// Care must be taken in interpreting the def index of the value. The + /// following rules apply: + /// + /// If the isDefAccurate() method returns false then def does not contain the + /// index of the defining MachineInstr, or even (necessarily) to a + /// MachineInstr at all. In general such a def index is not meaningful + /// and should not be used. The exception is that, for values originally + /// defined by PHI instructions, after PHI elimination def will contain the + /// index of the MBB in which the PHI originally existed. This can be used + /// to insert code (spills or copies) which deals with the value, which will + /// be live in to the block. + + class VNInfo { + private: + enum { + HAS_PHI_KILL = 1, + REDEF_BY_EC = 1 << 1, + IS_PHI_DEF = 1 << 2, + IS_UNUSED = 1 << 3, + IS_DEF_ACCURATE = 1 << 4 + }; + + unsigned char flags; + + public: + /// The ID number of this value. unsigned id; + + /// The index of the defining instruction (if isDefAccurate() returns true). unsigned def; MachineInstr *copy; - bool hasPHIKill : 1; - bool redefByEC : 1; SmallVector<unsigned, 4> kills; + VNInfo() - : id(~1U), def(~1U), copy(0), hasPHIKill(false), redefByEC(false) {} + : flags(IS_UNUSED), id(~1U), def(0), copy(0) {} + + /// VNInfo constructor. + /// d is presumed to point to the actual defining instr. If it doesn't + /// setIsDefAccurate(false) should be called after construction. VNInfo(unsigned i, unsigned d, MachineInstr *c) - : id(i), def(d), copy(c), hasPHIKill(false), redefByEC(false) {} + : flags(IS_DEF_ACCURATE), id(i), def(d), copy(c) {} + + /// VNInfo construtor, copies values from orig, except for the value number. + VNInfo(unsigned i, const VNInfo &orig) + : flags(orig.flags), id(i), def(orig.def), copy(orig.copy), + kills(orig.kills) {} + + /// Used for copying value number info. + unsigned getFlags() const { return flags; } + void setFlags(unsigned flags) { this->flags = flags; } + + /// Returns true if one or more kills are PHI nodes. + bool hasPHIKill() const { return flags & HAS_PHI_KILL; } + void setHasPHIKill(bool hasKill) { + if (hasKill) + flags |= HAS_PHI_KILL; + else + flags &= ~HAS_PHI_KILL; + } + + /// Returns true if this value is re-defined by an early clobber somewhere + /// during the live range. + bool hasRedefByEC() const { return flags & REDEF_BY_EC; } + void setHasRedefByEC(bool hasRedef) { + if (hasRedef) + flags |= REDEF_BY_EC; + else + flags &= ~REDEF_BY_EC; + } + + /// Returns true if this value is defined by a PHI instruction (or was, + /// PHI instrucions may have been eliminated). + bool isPHIDef() const { return flags & IS_PHI_DEF; } + void setIsPHIDef(bool phiDef) { + if (phiDef) + flags |= IS_PHI_DEF; + else + flags &= ~IS_PHI_DEF; + } + + /// Returns true if this value is unused. + bool isUnused() const { return flags & IS_UNUSED; } + void setIsUnused(bool unused) { + if (unused) + flags |= IS_UNUSED; + else + flags &= ~IS_UNUSED; + } + + /// Returns true if the def is accurate. + bool isDefAccurate() const { return flags & IS_DEF_ACCURATE; } + void setIsDefAccurate(bool defAccurate) { + if (defAccurate) + flags |= IS_DEF_ACCURATE; + else + flags &= ~IS_DEF_ACCURATE; + } + }; /// LiveRange structure - This represents a simple register range in the @@ -108,7 +191,6 @@ namespace llvm { unsigned reg; // the register or stack slot of this interval // if the top bits is set, it represents a stack slot. float weight; // weight of this interval - unsigned short preference; // preferred register for this interval Ranges ranges; // the ranges in which this register is live VNInfoList valnos; // value#'s @@ -134,7 +216,7 @@ namespace llvm { }; LiveInterval(unsigned Reg, float Weight, bool IsSS = false) - : reg(Reg), weight(Weight), preference(0) { + : reg(Reg), weight(Weight) { if (IsSS) reg = reg | (1U << (sizeof(unsigned)*CHAR_BIT-1)); } @@ -210,15 +292,17 @@ namespace llvm { void copyValNumInfo(VNInfo *DstValNo, const VNInfo *SrcValNo) { DstValNo->def = SrcValNo->def; DstValNo->copy = SrcValNo->copy; - DstValNo->hasPHIKill = SrcValNo->hasPHIKill; - DstValNo->redefByEC = SrcValNo->redefByEC; + DstValNo->setFlags(SrcValNo->getFlags()); DstValNo->kills = SrcValNo->kills; } /// getNextValue - Create a new value number and return it. MIIdx specifies /// the instruction that defines the value number. VNInfo *getNextValue(unsigned MIIdx, MachineInstr *CopyMI, - BumpPtrAllocator &VNInfoAllocator) { + bool isDefAccurate, BumpPtrAllocator &VNInfoAllocator) { + + assert(MIIdx != ~0u && MIIdx != ~1u && + "PHI def / unused flags should now be passed explicitly."); #ifdef __GNUC__ unsigned Alignment = (unsigned)__alignof__(VNInfo); #else @@ -229,6 +313,26 @@ namespace llvm { static_cast<VNInfo*>(VNInfoAllocator.Allocate((unsigned)sizeof(VNInfo), Alignment)); new (VNI) VNInfo((unsigned)valnos.size(), MIIdx, CopyMI); + VNI->setIsDefAccurate(isDefAccurate); + valnos.push_back(VNI); + return VNI; + } + + /// Create a copy of the given value. The new value will be identical except + /// for the Value number. + VNInfo *createValueCopy(const VNInfo *orig, BumpPtrAllocator &VNInfoAllocator) { + +#ifdef __GNUC__ + unsigned Alignment = (unsigned)__alignof__(VNInfo); +#else + // FIXME: ugly. + unsigned Alignment = 8; +#endif + VNInfo *VNI = + static_cast<VNInfo*>(VNInfoAllocator.Allocate((unsigned)sizeof(VNInfo), + Alignment)); + + new (VNI) VNInfo((unsigned)valnos.size(), *orig); valnos.push_back(VNI); return VNI; } @@ -339,7 +443,8 @@ namespace llvm { /// Copy - Copy the specified live interval. This copies all the fields /// except for the register of the interval. - void Copy(const LiveInterval &RHS, BumpPtrAllocator &VNInfoAllocator); + void Copy(const LiveInterval &RHS, MachineRegisterInfo *MRI, + BumpPtrAllocator &VNInfoAllocator); bool empty() const { return ranges.empty(); } @@ -416,7 +521,8 @@ namespace llvm { /// the intervals are not joinable, this aborts. void join(LiveInterval &Other, const int *ValNoAssignments, const int *RHSValNoAssignments, - SmallVector<VNInfo*, 16> &NewVNInfo); + SmallVector<VNInfo*, 16> &NewVNInfo, + MachineRegisterInfo *MRI); /// isInOneLiveRange - Return true if the range specified is entirely in the /// a single LiveRange of the live interval. diff --git a/include/llvm/CodeGen/MachineFunction.h b/include/llvm/CodeGen/MachineFunction.h index a110e5846ac9..0074f1a5f2ca 100644 --- a/include/llvm/CodeGen/MachineFunction.h +++ b/include/llvm/CodeGen/MachineFunction.h @@ -19,7 +19,7 @@ #define LLVM_CODEGEN_MACHINEFUNCTION_H #include "llvm/ADT/ilist.h" -#include "llvm/CodeGen/DebugLoc.h" +#include "llvm/Support/DebugLoc.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/Support/Annotation.h" #include "llvm/Support/Allocator.h" diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index d61e5d8a5eb4..2b2f24a88371 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -22,7 +22,7 @@ #include "llvm/CodeGen/MachineOperand.h" #include "llvm/CodeGen/MachineMemOperand.h" #include "llvm/Target/TargetInstrDesc.h" -#include "llvm/CodeGen/DebugLoc.h" +#include "llvm/Support/DebugLoc.h" #include <list> #include <vector> @@ -104,7 +104,7 @@ public: /// getDebugLoc - Returns the debug location id of this MachineInstr. /// - const DebugLoc getDebugLoc() const { return debugLoc; } + DebugLoc getDebugLoc() const { return debugLoc; } /// getDesc - Returns the target instruction descriptor of this /// MachineInstr. diff --git a/include/llvm/CodeGen/MachineOperand.h b/include/llvm/CodeGen/MachineOperand.h index 7a4168447b62..ba538d795ffd 100644 --- a/include/llvm/CodeGen/MachineOperand.h +++ b/include/llvm/CodeGen/MachineOperand.h @@ -33,15 +33,15 @@ class raw_ostream; class MachineOperand { public: enum MachineOperandType { - MO_Register, ///< Register operand. - MO_Immediate, ///< Immediate operand - MO_FPImmediate, ///< Floating-point immediate operand - MO_MachineBasicBlock, ///< MachineBasicBlock reference - MO_FrameIndex, ///< Abstract Stack Frame Index - MO_ConstantPoolIndex, ///< Address of indexed Constant in Constant Pool - MO_JumpTableIndex, ///< Address of indexed Jump Table for switch - MO_ExternalSymbol, ///< Name of external global symbol - MO_GlobalAddress ///< Address of a global value + MO_Register, ///< Register operand. + MO_Immediate, ///< Immediate operand + MO_FPImmediate, ///< Floating-point immediate operand + MO_MachineBasicBlock, ///< MachineBasicBlock reference + MO_FrameIndex, ///< Abstract Stack Frame Index + MO_ConstantPoolIndex, ///< Address of indexed Constant in Constant Pool + MO_JumpTableIndex, ///< Address of indexed Jump Table for switch + MO_ExternalSymbol, ///< Name of external global symbol + MO_GlobalAddress ///< Address of a global value }; private: diff --git a/include/llvm/CodeGen/MachineRegisterInfo.h b/include/llvm/CodeGen/MachineRegisterInfo.h index 02f9b7c686e2..80c37b39ca0c 100644 --- a/include/llvm/CodeGen/MachineRegisterInfo.h +++ b/include/llvm/CodeGen/MachineRegisterInfo.h @@ -37,6 +37,15 @@ class MachineRegisterInfo { /// virtual registers. For each target register class, it keeps a list of /// virtual registers belonging to the class. std::vector<std::vector<unsigned> > RegClass2VRegMap; + + /// RegAllocHints - This vector records register allocation hints for virtual + /// registers. For each virtual register, it keeps a register and hint type + /// pair making up the allocation hint. Hint type is target specific except + /// for the value 0 which means the second value of the pair is the preferred + /// register for allocation. For example, if the hint is <0, 1024>, it means + /// the allocator should prefer the physical register allocated to the virtual + /// register of the hint. + std::vector<std::pair<unsigned, unsigned> > RegAllocHints; /// PhysRegUseDefLists - This is an array of the head of the use/def list for /// physical registers. @@ -170,7 +179,25 @@ public: std::vector<unsigned> &getRegClassVirtRegs(const TargetRegisterClass *RC) { return RegClass2VRegMap[RC->getID()]; } - + + /// setRegAllocationHint - Specify a register allocation hint for the + /// specified virtual register. + void setRegAllocationHint(unsigned Reg, unsigned Type, unsigned PrefReg) { + Reg -= TargetRegisterInfo::FirstVirtualRegister; + assert(Reg < VRegInfo.size() && "Invalid vreg!"); + RegAllocHints[Reg].first = Type; + RegAllocHints[Reg].second = PrefReg; + } + + /// getRegAllocationHint - Return the register allocation hint for the + /// specified virtual register. + std::pair<unsigned, unsigned> + getRegAllocationHint(unsigned Reg) const { + Reg -= TargetRegisterInfo::FirstVirtualRegister; + assert(Reg < VRegInfo.size() && "Invalid vreg!"); + return RegAllocHints[Reg]; + } + //===--------------------------------------------------------------------===// // Physical Register Use Info //===--------------------------------------------------------------------===// diff --git a/include/llvm/CodeGen/RuntimeLibcalls.h b/include/llvm/CodeGen/RuntimeLibcalls.h index dd76fcc11b5e..7f2c8bc36840 100644 --- a/include/llvm/CodeGen/RuntimeLibcalls.h +++ b/include/llvm/CodeGen/RuntimeLibcalls.h @@ -153,6 +153,8 @@ namespace RTLIB { FPROUND_PPCF128_F32, FPROUND_F80_F64, FPROUND_PPCF128_F64, + FPTOSINT_F32_I8, + FPTOSINT_F32_I16, FPTOSINT_F32_I32, FPTOSINT_F32_I64, FPTOSINT_F32_I128, @@ -165,6 +167,8 @@ namespace RTLIB { FPTOSINT_PPCF128_I32, FPTOSINT_PPCF128_I64, FPTOSINT_PPCF128_I128, + FPTOUINT_F32_I8, + FPTOUINT_F32_I16, FPTOUINT_F32_I32, FPTOUINT_F32_I64, FPTOUINT_F32_I128, diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index ad485103fb7e..1b6fecd556e1 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -31,7 +31,7 @@ #include "llvm/Support/Allocator.h" #include "llvm/Support/RecyclingAllocator.h" #include "llvm/Support/DataTypes.h" -#include "llvm/CodeGen/DebugLoc.h" +#include "llvm/Support/DebugLoc.h" #include <cassert> #include <climits> |