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authorDimitry Andric <dim@FreeBSD.org>2015-01-18 16:17:27 +0000
committerDimitry Andric <dim@FreeBSD.org>2015-01-18 16:17:27 +0000
commit67c32a98315f785a9ec9d531c1f571a0196c7463 (patch)
tree4abb9cbeecc7901726dd0b4a37369596c852e9ef /lib/CodeGen/LiveIntervalUnion.cpp
parent9f61947910e6ab40de38e6b4034751ef1513200f (diff)
downloadsrc-test2-67c32a98315f785a9ec9d531c1f571a0196c7463.tar.gz
src-test2-67c32a98315f785a9ec9d531c1f571a0196c7463.zip
Notes
Diffstat (limited to 'lib/CodeGen/LiveIntervalUnion.cpp')
-rw-r--r--lib/CodeGen/LiveIntervalUnion.cpp18
1 files changed, 9 insertions, 9 deletions
diff --git a/lib/CodeGen/LiveIntervalUnion.cpp b/lib/CodeGen/LiveIntervalUnion.cpp
index d81221b6a526..025d99ce7881 100644
--- a/lib/CodeGen/LiveIntervalUnion.cpp
+++ b/lib/CodeGen/LiveIntervalUnion.cpp
@@ -26,14 +26,14 @@ using namespace llvm;
// Merge a LiveInterval's segments. Guarantee no overlaps.
-void LiveIntervalUnion::unify(LiveInterval &VirtReg) {
- if (VirtReg.empty())
+void LiveIntervalUnion::unify(LiveInterval &VirtReg, const LiveRange &Range) {
+ if (Range.empty())
return;
++Tag;
// Insert each of the virtual register's live segments into the map.
- LiveInterval::iterator RegPos = VirtReg.begin();
- LiveInterval::iterator RegEnd = VirtReg.end();
+ LiveRange::const_iterator RegPos = Range.begin();
+ LiveRange::const_iterator RegEnd = Range.end();
SegmentIter SegPos = Segments.find(RegPos->start);
while (SegPos.valid()) {
@@ -53,14 +53,14 @@ void LiveIntervalUnion::unify(LiveInterval &VirtReg) {
}
// Remove a live virtual register's segments from this union.
-void LiveIntervalUnion::extract(LiveInterval &VirtReg) {
- if (VirtReg.empty())
+void LiveIntervalUnion::extract(LiveInterval &VirtReg, const LiveRange &Range) {
+ if (Range.empty())
return;
++Tag;
// Remove each of the virtual register's live segments from the map.
- LiveInterval::iterator RegPos = VirtReg.begin();
- LiveInterval::iterator RegEnd = VirtReg.end();
+ LiveRange::const_iterator RegPos = Range.begin();
+ LiveRange::const_iterator RegEnd = Range.end();
SegmentIter SegPos = Segments.find(RegPos->start);
for (;;) {
@@ -70,7 +70,7 @@ void LiveIntervalUnion::extract(LiveInterval &VirtReg) {
return;
// Skip all segments that may have been coalesced.
- RegPos = VirtReg.advanceTo(RegPos, SegPos.start());
+ RegPos = Range.advanceTo(RegPos, SegPos.start());
if (RegPos == RegEnd)
return;