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| author | Dimitry Andric <dim@FreeBSD.org> | 2017-01-06 20:13:21 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2017-01-06 20:13:21 +0000 |
| commit | 7e7b6700743285c0af506ac6299ddf82ebd434b9 (patch) | |
| tree | 578d2ea1868b77f3dff145df7f8f3fe73272c09e /lib/CodeGen/MIRPrinter.cpp | |
| parent | 4b570baa7e867c652fa7d690585098278082fae9 (diff) | |
| download | src-test2-44292a5ff3ad94eff0947957bc66af7b68bdbe82.tar.gz src-test2-44292a5ff3ad94eff0947957bc66af7b68bdbe82.zip | |
Diffstat (limited to 'lib/CodeGen/MIRPrinter.cpp')
| -rw-r--r-- | lib/CodeGen/MIRPrinter.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/CodeGen/MIRPrinter.cpp b/lib/CodeGen/MIRPrinter.cpp index eb13d2d3ec0c..db87092177ca 100644 --- a/lib/CodeGen/MIRPrinter.cpp +++ b/lib/CodeGen/MIRPrinter.cpp @@ -488,16 +488,16 @@ void MIPrinter::print(const MachineBasicBlock &MBB) { } // Print the live in registers. - const auto *TRI = MBB.getParent()->getSubtarget().getRegisterInfo(); - assert(TRI && "Expected target register info"); - if (!MBB.livein_empty()) { + const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); + if (MRI.tracksLiveness() && !MBB.livein_empty()) { + const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); OS.indent(2) << "liveins: "; bool First = true; for (const auto &LI : MBB.liveins()) { if (!First) OS << ", "; First = false; - printReg(LI.PhysReg, OS, TRI); + printReg(LI.PhysReg, OS, &TRI); if (!LI.LaneMask.all()) OS << ":0x" << PrintLaneMask(LI.LaneMask); } |