diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2015-12-30 11:46:15 +0000 | 
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2015-12-30 11:46:15 +0000 | 
| commit | dd58ef019b700900793a1eb48b52123db01b654e (patch) | |
| tree | fcfbb4df56a744f4ddc6122c50521dd3f1c5e196 /lib/CodeGen/MachineRegisterInfo.cpp | |
| parent | 2fe5752e3a7c345cdb59e869278d36af33c13fa4 (diff) | |
Notes
Diffstat (limited to 'lib/CodeGen/MachineRegisterInfo.cpp')
| -rw-r--r-- | lib/CodeGen/MachineRegisterInfo.cpp | 32 | 
1 files changed, 20 insertions, 12 deletions
diff --git a/lib/CodeGen/MachineRegisterInfo.cpp b/lib/CodeGen/MachineRegisterInfo.cpp index e883ce523134..03c82f46da63 100644 --- a/lib/CodeGen/MachineRegisterInfo.cpp +++ b/lib/CodeGen/MachineRegisterInfo.cpp @@ -27,13 +27,11 @@ void MachineRegisterInfo::Delegate::anchor() {}  MachineRegisterInfo::MachineRegisterInfo(const MachineFunction *MF)    : MF(MF), TheDelegate(nullptr), IsSSA(true), TracksLiveness(true),      TracksSubRegLiveness(false) { +  unsigned NumRegs = getTargetRegisterInfo()->getNumRegs();    VRegInfo.reserve(256);    RegAllocHints.reserve(256); -  UsedRegUnits.resize(getTargetRegisterInfo()->getNumRegUnits()); -  UsedPhysRegMask.resize(getTargetRegisterInfo()->getNumRegs()); - -  // Create the physreg use/def lists. -  PhysRegUseDefLists.resize(getTargetRegisterInfo()->getNumRegs(), nullptr); +  UsedPhysRegMask.resize(NumRegs); +  PhysRegUseDefLists.reset(new MachineOperand*[NumRegs]());  }  /// setRegClass - Set the register class of the specified virtual register. @@ -117,6 +115,8 @@ void MachineRegisterInfo::clearVirtRegs() {    }  #endif    VRegInfo.clear(); +  for (auto &I : LiveIns) +    I.second = 0;  }  void MachineRegisterInfo::verifyUseList(unsigned Reg) const { @@ -394,8 +394,7 @@ MachineRegisterInfo::EmitLiveInCopies(MachineBasicBlock *EntryMBB,      }  } -unsigned MachineRegisterInfo::getMaxLaneMaskForVReg(unsigned Reg) const -{ +LaneBitmask MachineRegisterInfo::getMaxLaneMaskForVReg(unsigned Reg) const {    // Lane masks are only defined for vregs.    assert(TargetRegisterInfo::isVirtualRegister(Reg));    const TargetRegisterClass &TRC = *getRegClass(Reg); @@ -468,11 +467,8 @@ static bool isNoReturnDef(const MachineOperand &MO) {    if (MF.getFunction()->hasFnAttribute(Attribute::UWTable))      return false;    const Function *Called = getCalledFunction(MI); -  if (Called == nullptr || !Called->hasFnAttribute(Attribute::NoReturn) -      || !Called->hasFnAttribute(Attribute::NoUnwind)) -    return false; - -  return true; +  return !(Called == nullptr || !Called->hasFnAttribute(Attribute::NoReturn) || +           !Called->hasFnAttribute(Attribute::NoUnwind));  }  bool MachineRegisterInfo::isPhysRegModified(unsigned PhysReg) const { @@ -488,3 +484,15 @@ bool MachineRegisterInfo::isPhysRegModified(unsigned PhysReg) const {    }    return false;  } + +bool MachineRegisterInfo::isPhysRegUsed(unsigned PhysReg) const { +  if (UsedPhysRegMask.test(PhysReg)) +    return true; +  const TargetRegisterInfo *TRI = getTargetRegisterInfo(); +  for (MCRegAliasIterator AliasReg(PhysReg, TRI, true); AliasReg.isValid(); +       ++AliasReg) { +    if (!reg_nodbg_empty(*AliasReg)) +      return true; +  } +  return false; +}  | 
