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authorDimitry Andric <dim@FreeBSD.org>2011-10-20 21:10:27 +0000
committerDimitry Andric <dim@FreeBSD.org>2011-10-20 21:10:27 +0000
commit30815c536baacc07e925f0aef23a5395883173dc (patch)
tree2cbcf22585e99f8a87d12d5ff94f392c0d266819 /lib/CodeGen/SelectionDAG/InstrEmitter.h
parent411bd29eea3c360d5b48a18a17b5e87f5671af0e (diff)
Diffstat (limited to 'lib/CodeGen/SelectionDAG/InstrEmitter.h')
-rw-r--r--lib/CodeGen/SelectionDAG/InstrEmitter.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/InstrEmitter.h b/lib/CodeGen/SelectionDAG/InstrEmitter.h
index 19fc0445b166..c081f38be024 100644
--- a/lib/CodeGen/SelectionDAG/InstrEmitter.h
+++ b/lib/CodeGen/SelectionDAG/InstrEmitter.h
@@ -77,6 +77,12 @@ class InstrEmitter {
DenseMap<SDValue, unsigned> &VRBaseMap,
bool IsDebug, bool IsClone, bool IsCloned);
+ /// ConstrainForSubReg - Try to constrain VReg to a register class that
+ /// supports SubIdx sub-registers. Emit a copy if that isn't possible.
+ /// Return the virtual register to use.
+ unsigned ConstrainForSubReg(unsigned VReg, unsigned SubIdx,
+ EVT VT, DebugLoc DL);
+
/// EmitSubregNode - Generate machine code for subreg nodes.
///
void EmitSubregNode(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap,