diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2015-01-18 16:17:27 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2015-01-18 16:17:27 +0000 |
commit | 67c32a98315f785a9ec9d531c1f571a0196c7463 (patch) | |
tree | 4abb9cbeecc7901726dd0b4a37369596c852e9ef /lib/MC/MCSubtargetInfo.cpp | |
parent | 9f61947910e6ab40de38e6b4034751ef1513200f (diff) |
Diffstat (limited to 'lib/MC/MCSubtargetInfo.cpp')
-rw-r--r-- | lib/MC/MCSubtargetInfo.cpp | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/lib/MC/MCSubtargetInfo.cpp b/lib/MC/MCSubtargetInfo.cpp index 4424c91eaa7f..b8e42bd0c1bc 100644 --- a/lib/MC/MCSubtargetInfo.cpp +++ b/lib/MC/MCSubtargetInfo.cpp @@ -17,8 +17,6 @@ using namespace llvm; -MCSchedModel MCSchedModel::DefaultSchedModel; // For unknown processors. - /// InitMCProcessorInfo - Set or change the CPU (optionally supplemented /// with feature string). Recompute feature bits and scheduling model. void @@ -33,7 +31,7 @@ MCSubtargetInfo::InitCPUSchedModel(StringRef CPU) { if (!CPU.empty()) CPUSchedModel = getSchedModelForCPU(CPU); else - CPUSchedModel = &MCSchedModel::DefaultSchedModel; + CPUSchedModel = MCSchedModel::GetDefaultSchedModel(); } void @@ -78,7 +76,7 @@ uint64_t MCSubtargetInfo::ToggleFeature(StringRef FS) { } -const MCSchedModel * +MCSchedModel MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const { assert(ProcSchedModels && "Processor machine model not available!"); @@ -97,15 +95,15 @@ MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const { errs() << "'" << CPU << "' is not a recognized processor for this target" << " (ignoring processor)\n"; - return &MCSchedModel::DefaultSchedModel; + return MCSchedModel::GetDefaultSchedModel(); } assert(Found->Value && "Missing processor SchedModel value"); - return (const MCSchedModel *)Found->Value; + return *(const MCSchedModel *)Found->Value; } InstrItineraryData MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const { - const MCSchedModel *SchedModel = getSchedModelForCPU(CPU); + const MCSchedModel SchedModel = getSchedModelForCPU(CPU); return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths); } |