diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2018-02-01 21:07:55 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2018-02-01 21:07:55 +0000 |
| commit | 4a6a1ccbecd7e34f40b05b4ba0a05d0031dd1eff (patch) | |
| tree | bd998e25df07b7abd964ad088180d19152336f8d /lib/Target/AArch64/AArch64InstructionSelector.cpp | |
| parent | a096e0bdf6cfa020569afca490d8e4c9ac8ebb01 (diff) | |
Notes
Diffstat (limited to 'lib/Target/AArch64/AArch64InstructionSelector.cpp')
| -rw-r--r-- | lib/Target/AArch64/AArch64InstructionSelector.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/AArch64/AArch64InstructionSelector.cpp b/lib/Target/AArch64/AArch64InstructionSelector.cpp index b85b4e082996..2bb9e381073a 100644 --- a/lib/Target/AArch64/AArch64InstructionSelector.cpp +++ b/lib/Target/AArch64/AArch64InstructionSelector.cpp @@ -929,6 +929,12 @@ bool AArch64InstructionSelector::select(MachineInstr &I, return false; } + // FIXME: PR36018: Volatile loads in some cases are incorrectly selected by + // folding with an extend. Until we have a G_SEXTLOAD solution bail out if + // we hit one. + if (Opcode == TargetOpcode::G_LOAD && MemOp.isVolatile()) + return false; + const unsigned PtrReg = I.getOperand(1).getReg(); #ifndef NDEBUG const RegisterBank &PtrRB = *RBI.getRegBank(PtrReg, MRI, TRI); |
