diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2018-07-28 10:51:19 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2018-07-28 10:51:19 +0000 |
| commit | eb11fae6d08f479c0799db45860a98af528fa6e7 (patch) | |
| tree | 44d492a50c8c1a7eb8e2d17ea3360ec4d066f042 /lib/Target/Mips/MipsMCInstLower.cpp | |
| parent | b8a2042aa938069e862750553db0e4d82d25822c (diff) | |
Notes
Diffstat (limited to 'lib/Target/Mips/MipsMCInstLower.cpp')
| -rw-r--r-- | lib/Target/Mips/MipsMCInstLower.cpp | 81 |
1 files changed, 63 insertions, 18 deletions
diff --git a/lib/Target/Mips/MipsMCInstLower.cpp b/lib/Target/Mips/MipsMCInstLower.cpp index a4ab7d3a5780..2b7f64099923 100644 --- a/lib/Target/Mips/MipsMCInstLower.cpp +++ b/lib/Target/Mips/MipsMCInstLower.cpp @@ -219,26 +219,77 @@ lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const { // Lower register operand. OutMI.addOperand(LowerOperand(MI->getOperand(0))); - // Create %hi($tgt-$baltgt). - OutMI.addOperand(createSub(MI->getOperand(1).getMBB(), - MI->getOperand(2).getMBB(), - MipsMCExpr::MEK_HI)); + MipsMCExpr::MipsExprKind Kind; + unsigned TargetFlags = MI->getOperand(1).getTargetFlags(); + switch (TargetFlags) { + case MipsII::MO_HIGHEST: + Kind = MipsMCExpr::MEK_HIGHEST; + break; + case MipsII::MO_HIGHER: + Kind = MipsMCExpr::MEK_HIGHER; + break; + case MipsII::MO_ABS_HI: + Kind = MipsMCExpr::MEK_HI; + break; + case MipsII::MO_ABS_LO: + Kind = MipsMCExpr::MEK_LO; + break; + default: + report_fatal_error("Unexpected flags for lowerLongBranchLUi"); + } + + if (MI->getNumOperands() == 2) { + const MCExpr *Expr = + MCSymbolRefExpr::create(MI->getOperand(1).getMBB()->getSymbol(), *Ctx); + const MipsMCExpr *MipsExpr = MipsMCExpr::create(Kind, Expr, *Ctx); + OutMI.addOperand(MCOperand::createExpr(MipsExpr)); + } else if (MI->getNumOperands() == 3) { + // Create %hi($tgt-$baltgt). + OutMI.addOperand(createSub(MI->getOperand(1).getMBB(), + MI->getOperand(2).getMBB(), Kind)); + } } -void MipsMCInstLower::lowerLongBranchADDiu( - const MachineInstr *MI, MCInst &OutMI, int Opcode, - MipsMCExpr::MipsExprKind Kind) const { +void MipsMCInstLower::lowerLongBranchADDiu(const MachineInstr *MI, + MCInst &OutMI, int Opcode) const { OutMI.setOpcode(Opcode); + MipsMCExpr::MipsExprKind Kind; + unsigned TargetFlags = MI->getOperand(2).getTargetFlags(); + switch (TargetFlags) { + case MipsII::MO_HIGHEST: + Kind = MipsMCExpr::MEK_HIGHEST; + break; + case MipsII::MO_HIGHER: + Kind = MipsMCExpr::MEK_HIGHER; + break; + case MipsII::MO_ABS_HI: + Kind = MipsMCExpr::MEK_HI; + break; + case MipsII::MO_ABS_LO: + Kind = MipsMCExpr::MEK_LO; + break; + default: + report_fatal_error("Unexpected flags for lowerLongBranchADDiu"); + } + // Lower two register operands. for (unsigned I = 0, E = 2; I != E; ++I) { const MachineOperand &MO = MI->getOperand(I); OutMI.addOperand(LowerOperand(MO)); } - // Create %lo($tgt-$baltgt) or %hi($tgt-$baltgt). - OutMI.addOperand(createSub(MI->getOperand(2).getMBB(), - MI->getOperand(3).getMBB(), Kind)); + if (MI->getNumOperands() == 3) { + // Lower register operand. + const MCExpr *Expr = + MCSymbolRefExpr::create(MI->getOperand(2).getMBB()->getSymbol(), *Ctx); + const MipsMCExpr *MipsExpr = MipsMCExpr::create(Kind, Expr, *Ctx); + OutMI.addOperand(MCOperand::createExpr(MipsExpr)); + } else if (MI->getNumOperands() == 4) { + // Create %lo($tgt-$baltgt) or %hi($tgt-$baltgt). + OutMI.addOperand(createSub(MI->getOperand(2).getMBB(), + MI->getOperand(3).getMBB(), Kind)); + } } bool MipsMCInstLower::lowerLongBranch(const MachineInstr *MI, @@ -250,16 +301,10 @@ bool MipsMCInstLower::lowerLongBranch(const MachineInstr *MI, lowerLongBranchLUi(MI, OutMI); return true; case Mips::LONG_BRANCH_ADDiu: - lowerLongBranchADDiu(MI, OutMI, Mips::ADDiu, MipsMCExpr::MEK_LO); + lowerLongBranchADDiu(MI, OutMI, Mips::ADDiu); return true; case Mips::LONG_BRANCH_DADDiu: - unsigned TargetFlags = MI->getOperand(2).getTargetFlags(); - if (TargetFlags == MipsII::MO_ABS_HI) - lowerLongBranchADDiu(MI, OutMI, Mips::DADDiu, MipsMCExpr::MEK_HI); - else if (TargetFlags == MipsII::MO_ABS_LO) - lowerLongBranchADDiu(MI, OutMI, Mips::DADDiu, MipsMCExpr::MEK_LO); - else - report_fatal_error("Unexpected flags for LONG_BRANCH_DADDiu"); + lowerLongBranchADDiu(MI, OutMI, Mips::DADDiu); return true; } } |
