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authorRoman Divacky <rdivacky@FreeBSD.org>2009-12-15 18:09:07 +0000
committerRoman Divacky <rdivacky@FreeBSD.org>2009-12-15 18:09:07 +0000
commit571945e6affd20b19264ec22495da418d0fbdbb4 (patch)
tree076117cdf3579003f07cad4cdf0593347ce58150 /lib/Target/Mips
parent06f9d4012fb8acea3e9861d5722b5965dbb724d9 (diff)
Notes
Diffstat (limited to 'lib/Target/Mips')
-rw-r--r--lib/Target/Mips/MipsInstrInfo.cpp16
-rw-r--r--lib/Target/Mips/MipsInstrInfo.h1
2 files changed, 0 insertions, 17 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.cpp b/lib/Target/Mips/MipsInstrInfo.cpp
index 6d8e160e7261..48b9bdfe3561 100644
--- a/lib/Target/Mips/MipsInstrInfo.cpp
+++ b/lib/Target/Mips/MipsInstrInfo.cpp
@@ -590,22 +590,6 @@ RemoveBranch(MachineBasicBlock &MBB) const
return 2;
}
-/// BlockHasNoFallThrough - Analyze if MachineBasicBlock does not
-/// fall-through into its successor block.
-bool MipsInstrInfo::
-BlockHasNoFallThrough(const MachineBasicBlock &MBB) const
-{
- if (MBB.empty()) return false;
-
- switch (MBB.back().getOpcode()) {
- case Mips::RET: // Return.
- case Mips::JR: // Indirect branch.
- case Mips::J: // Uncond branch.
- return true;
- default: return false;
- }
-}
-
/// ReverseBranchCondition - Return the inverse opcode of the
/// specified Branch instruction.
bool MipsInstrInfo::
diff --git a/lib/Target/Mips/MipsInstrInfo.h b/lib/Target/Mips/MipsInstrInfo.h
index 249d3de3b700..ab8dc593b8b7 100644
--- a/lib/Target/Mips/MipsInstrInfo.h
+++ b/lib/Target/Mips/MipsInstrInfo.h
@@ -232,7 +232,6 @@ public:
return 0;
}
- virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
virtual
bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;