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authorDimitry Andric <dim@FreeBSD.org>2019-01-19 10:01:25 +0000
committerDimitry Andric <dim@FreeBSD.org>2019-01-19 10:01:25 +0000
commitd8e91e46262bc44006913e6796843909f1ac7bcd (patch)
tree7d0c143d9b38190e0fa0180805389da22cd834c5 /lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp
parentb7eb8e35e481a74962664b63dfb09483b200209a (diff)
Notes
Diffstat (limited to 'lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp')
-rw-r--r--lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp123
1 files changed, 98 insertions, 25 deletions
diff --git a/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp b/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp
index 5fb97e38939a..c9a3527d3fbd 100644
--- a/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp
+++ b/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp
@@ -78,30 +78,102 @@ bool WebAssemblyLowerBrUnless::runOnMachineFunction(MachineFunction &MF) {
MachineInstr *Def = MRI.getVRegDef(Cond);
switch (Def->getOpcode()) {
using namespace WebAssembly;
- case EQ_I32: Def->setDesc(TII.get(NE_I32)); Inverted = true; break;
- case NE_I32: Def->setDesc(TII.get(EQ_I32)); Inverted = true; break;
- case GT_S_I32: Def->setDesc(TII.get(LE_S_I32)); Inverted = true; break;
- case GE_S_I32: Def->setDesc(TII.get(LT_S_I32)); Inverted = true; break;
- case LT_S_I32: Def->setDesc(TII.get(GE_S_I32)); Inverted = true; break;
- case LE_S_I32: Def->setDesc(TII.get(GT_S_I32)); Inverted = true; break;
- case GT_U_I32: Def->setDesc(TII.get(LE_U_I32)); Inverted = true; break;
- case GE_U_I32: Def->setDesc(TII.get(LT_U_I32)); Inverted = true; break;
- case LT_U_I32: Def->setDesc(TII.get(GE_U_I32)); Inverted = true; break;
- case LE_U_I32: Def->setDesc(TII.get(GT_U_I32)); Inverted = true; break;
- case EQ_I64: Def->setDesc(TII.get(NE_I64)); Inverted = true; break;
- case NE_I64: Def->setDesc(TII.get(EQ_I64)); Inverted = true; break;
- case GT_S_I64: Def->setDesc(TII.get(LE_S_I64)); Inverted = true; break;
- case GE_S_I64: Def->setDesc(TII.get(LT_S_I64)); Inverted = true; break;
- case LT_S_I64: Def->setDesc(TII.get(GE_S_I64)); Inverted = true; break;
- case LE_S_I64: Def->setDesc(TII.get(GT_S_I64)); Inverted = true; break;
- case GT_U_I64: Def->setDesc(TII.get(LE_U_I64)); Inverted = true; break;
- case GE_U_I64: Def->setDesc(TII.get(LT_U_I64)); Inverted = true; break;
- case LT_U_I64: Def->setDesc(TII.get(GE_U_I64)); Inverted = true; break;
- case LE_U_I64: Def->setDesc(TII.get(GT_U_I64)); Inverted = true; break;
- case EQ_F32: Def->setDesc(TII.get(NE_F32)); Inverted = true; break;
- case NE_F32: Def->setDesc(TII.get(EQ_F32)); Inverted = true; break;
- case EQ_F64: Def->setDesc(TII.get(NE_F64)); Inverted = true; break;
- case NE_F64: Def->setDesc(TII.get(EQ_F64)); Inverted = true; break;
+ case EQ_I32:
+ Def->setDesc(TII.get(NE_I32));
+ Inverted = true;
+ break;
+ case NE_I32:
+ Def->setDesc(TII.get(EQ_I32));
+ Inverted = true;
+ break;
+ case GT_S_I32:
+ Def->setDesc(TII.get(LE_S_I32));
+ Inverted = true;
+ break;
+ case GE_S_I32:
+ Def->setDesc(TII.get(LT_S_I32));
+ Inverted = true;
+ break;
+ case LT_S_I32:
+ Def->setDesc(TII.get(GE_S_I32));
+ Inverted = true;
+ break;
+ case LE_S_I32:
+ Def->setDesc(TII.get(GT_S_I32));
+ Inverted = true;
+ break;
+ case GT_U_I32:
+ Def->setDesc(TII.get(LE_U_I32));
+ Inverted = true;
+ break;
+ case GE_U_I32:
+ Def->setDesc(TII.get(LT_U_I32));
+ Inverted = true;
+ break;
+ case LT_U_I32:
+ Def->setDesc(TII.get(GE_U_I32));
+ Inverted = true;
+ break;
+ case LE_U_I32:
+ Def->setDesc(TII.get(GT_U_I32));
+ Inverted = true;
+ break;
+ case EQ_I64:
+ Def->setDesc(TII.get(NE_I64));
+ Inverted = true;
+ break;
+ case NE_I64:
+ Def->setDesc(TII.get(EQ_I64));
+ Inverted = true;
+ break;
+ case GT_S_I64:
+ Def->setDesc(TII.get(LE_S_I64));
+ Inverted = true;
+ break;
+ case GE_S_I64:
+ Def->setDesc(TII.get(LT_S_I64));
+ Inverted = true;
+ break;
+ case LT_S_I64:
+ Def->setDesc(TII.get(GE_S_I64));
+ Inverted = true;
+ break;
+ case LE_S_I64:
+ Def->setDesc(TII.get(GT_S_I64));
+ Inverted = true;
+ break;
+ case GT_U_I64:
+ Def->setDesc(TII.get(LE_U_I64));
+ Inverted = true;
+ break;
+ case GE_U_I64:
+ Def->setDesc(TII.get(LT_U_I64));
+ Inverted = true;
+ break;
+ case LT_U_I64:
+ Def->setDesc(TII.get(GE_U_I64));
+ Inverted = true;
+ break;
+ case LE_U_I64:
+ Def->setDesc(TII.get(GT_U_I64));
+ Inverted = true;
+ break;
+ case EQ_F32:
+ Def->setDesc(TII.get(NE_F32));
+ Inverted = true;
+ break;
+ case NE_F32:
+ Def->setDesc(TII.get(EQ_F32));
+ Inverted = true;
+ break;
+ case EQ_F64:
+ Def->setDesc(TII.get(NE_F64));
+ Inverted = true;
+ break;
+ case NE_F64:
+ Def->setDesc(TII.get(EQ_F64));
+ Inverted = true;
+ break;
case EQZ_I32: {
// Invert an eqz by replacing it with its operand.
Cond = Def->getOperand(1).getReg();
@@ -109,7 +181,8 @@ bool WebAssemblyLowerBrUnless::runOnMachineFunction(MachineFunction &MF) {
Inverted = true;
break;
}
- default: break;
+ default:
+ break;
}
}