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authorDimitry Andric <dim@FreeBSD.org>2016-01-13 19:58:01 +0000
committerDimitry Andric <dim@FreeBSD.org>2016-01-13 19:58:01 +0000
commit050e163ae8b4bb6eb252b59e2f8f36e68ae9239d (patch)
tree7376a0c71aad05d327e5b1dcbceb3311a10f9f29 /lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
parent8a6c1c25bce0267ee4072bd7b786b921e8a66a35 (diff)
Notes
Diffstat (limited to 'lib/Transforms/InstCombine/InstCombineMulDivRem.cpp')
-rw-r--r--lib/Transforms/InstCombine/InstCombineMulDivRem.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
index 7ad0efc42fb4..160792b0a000 100644
--- a/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ b/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -636,7 +636,7 @@ Instruction *InstCombiner::visitFMul(BinaryOperator &I) {
// if pattern detected emit alternate sequence
if (OpX && OpY) {
BuilderTy::FastMathFlagGuard Guard(*Builder);
- Builder->SetFastMathFlags(Log2->getFastMathFlags());
+ Builder->setFastMathFlags(Log2->getFastMathFlags());
Log2->setArgOperand(0, OpY);
Value *FMulVal = Builder->CreateFMul(OpX, Log2);
Value *FSub = Builder->CreateFSub(FMulVal, OpX);
@@ -652,7 +652,7 @@ Instruction *InstCombiner::visitFMul(BinaryOperator &I) {
bool IgnoreZeroSign = I.hasNoSignedZeros();
if (BinaryOperator::isFNeg(Opnd0, IgnoreZeroSign)) {
BuilderTy::FastMathFlagGuard Guard(*Builder);
- Builder->SetFastMathFlags(I.getFastMathFlags());
+ Builder->setFastMathFlags(I.getFastMathFlags());
Value *N0 = dyn_castFNegVal(Opnd0, IgnoreZeroSign);
Value *N1 = dyn_castFNegVal(Opnd1, IgnoreZeroSign);
@@ -693,7 +693,7 @@ Instruction *InstCombiner::visitFMul(BinaryOperator &I) {
if (Y) {
BuilderTy::FastMathFlagGuard Guard(*Builder);
- Builder->SetFastMathFlags(I.getFastMathFlags());
+ Builder->setFastMathFlags(I.getFastMathFlags());
Value *T = Builder->CreateFMul(Opnd1, Opnd1);
Value *R = Builder->CreateFMul(T, Y);