diff options
author | Ed Schouten <ed@FreeBSD.org> | 2009-06-06 08:20:29 +0000 |
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committer | Ed Schouten <ed@FreeBSD.org> | 2009-06-06 08:20:29 +0000 |
commit | f4fe016fa15f703fe9c1b932d1e81e2c718521db (patch) | |
tree | 8a1bbd1a5b838080d31e5c93a1817006b8c62318 /lib/VMCore/Instruction.cpp | |
parent | 68eb509bdc5c7007520d5231cd92de28106236df (diff) |
Notes
Diffstat (limited to 'lib/VMCore/Instruction.cpp')
-rw-r--r-- | lib/VMCore/Instruction.cpp | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/lib/VMCore/Instruction.cpp b/lib/VMCore/Instruction.cpp index 9e030b78e9e5..7556b8ebe760 100644 --- a/lib/VMCore/Instruction.cpp +++ b/lib/VMCore/Instruction.cpp @@ -101,8 +101,11 @@ const char *Instruction::getOpcodeName(unsigned OpCode) { // Standard binary operators... case Add: return "add"; + case FAdd: return "fadd"; case Sub: return "sub"; + case FSub: return "fsub"; case Mul: return "mul"; + case FMul: return "fmul"; case UDiv: return "udiv"; case SDiv: return "sdiv"; case FDiv: return "fdiv"; @@ -330,19 +333,13 @@ bool Instruction::mayThrow() const { /// isAssociative - Return true if the instruction is associative: /// -/// Associative operators satisfy: x op (y op z) === (x op y) op z) +/// Associative operators satisfy: x op (y op z) === (x op y) op z /// -/// In LLVM, the Add, Mul, And, Or, and Xor operators are associative, when not -/// applied to floating point types. +/// In LLVM, the Add, Mul, And, Or, and Xor operators are associative. /// bool Instruction::isAssociative(unsigned Opcode, const Type *Ty) { - if (Opcode == And || Opcode == Or || Opcode == Xor) - return true; - - // Add/Mul reassociate unless they are FP or FP vectors. - if (Opcode == Add || Opcode == Mul) - return !Ty->isFPOrFPVector(); - return 0; + return Opcode == And || Opcode == Or || Opcode == Xor || + Opcode == Add || Opcode == Mul; } /// isCommutative - Return true if the instruction is commutative: @@ -355,7 +352,9 @@ bool Instruction::isAssociative(unsigned Opcode, const Type *Ty) { bool Instruction::isCommutative(unsigned op) { switch (op) { case Add: + case FAdd: case Mul: + case FMul: case And: case Or: case Xor: |