diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2020-01-17 20:45:01 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2020-01-17 20:45:01 +0000 |
| commit | 706b4fc47bbc608932d3b491ae19a3b9cde9497b (patch) | |
| tree | 4adf86a776049cbf7f69a1929c4babcbbef925eb /llvm/lib/Target/AArch64/AArch64SchedPredExynos.td | |
| parent | 7cc9cf2bf09f069cb2dd947ead05d0b54301fb71 (diff) | |
Notes
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64SchedPredExynos.td')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64SchedPredExynos.td | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64SchedPredExynos.td b/llvm/lib/Target/AArch64/AArch64SchedPredExynos.td index 0c1d82d354c0..fcda2394bacf 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedPredExynos.td +++ b/llvm/lib/Target/AArch64/AArch64SchedPredExynos.td @@ -50,6 +50,9 @@ def ExynosArithFn : TIIPredicate< MCReturnStatement<ExynosCheckShift>>, MCOpcodeSwitchCase< IsArithUnshiftOp.ValidOpcodes, + MCReturnStatement<TruePred>>, + MCOpcodeSwitchCase< + IsArithImmOp.ValidOpcodes, MCReturnStatement<TruePred>>], MCReturnStatement<FalsePred>>>; def ExynosArithPred : MCSchedPredicate<ExynosArithFn>; @@ -63,6 +66,9 @@ def ExynosLogicFn : TIIPredicate< MCReturnStatement<ExynosCheckShift>>, MCOpcodeSwitchCase< IsLogicUnshiftOp.ValidOpcodes, + MCReturnStatement<TruePred>>, + MCOpcodeSwitchCase< + IsLogicImmOp.ValidOpcodes, MCReturnStatement<TruePred>>], MCReturnStatement<FalsePred>>>; def ExynosLogicPred : MCSchedPredicate<ExynosLogicFn>; @@ -81,6 +87,9 @@ def ExynosLogicExFn : TIIPredicate< CheckShiftBy8]>]>>>, MCOpcodeSwitchCase< IsLogicUnshiftOp.ValidOpcodes, + MCReturnStatement<TruePred>>, + MCOpcodeSwitchCase< + IsLogicImmOp.ValidOpcodes, MCReturnStatement<TruePred>>], MCReturnStatement<FalsePred>>>; def ExynosLogicExPred : MCSchedPredicate<ExynosLogicExFn>; @@ -100,7 +109,10 @@ def ExynosScaledIdxFn : TIIPredicate<"isExynosScaledAddr", def ExynosScaledIdxPred : MCSchedPredicate<ExynosScaledIdxFn>; // Identify FP instructions. -def ExynosFPPred : MCSchedPredicate<CheckAny<[CheckDForm, CheckQForm]>>; +def ExynosFPPred : MCSchedPredicate<CheckAny<[CheckHForm, + CheckSForm, + CheckDForm, + CheckQForm]>>; // Identify 128-bit NEON instructions. def ExynosQFormPred : MCSchedPredicate<CheckQForm>; |