diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2020-01-17 20:45:01 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2020-01-17 20:45:01 +0000 |
| commit | 706b4fc47bbc608932d3b491ae19a3b9cde9497b (patch) | |
| tree | 4adf86a776049cbf7f69a1929c4babcbbef925eb /llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | |
| parent | 7cc9cf2bf09f069cb2dd947ead05d0b54301fb71 (diff) | |
Notes
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp index 8afca2cdc325..3986ca6dfa81 100644 --- a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp +++ b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp @@ -603,8 +603,10 @@ bool SIShrinkInstructions::runOnMachineFunction(MachineFunction &MF) { // => // s_nop (N + M) if (MI.getOpcode() == AMDGPU::S_NOP && + MI.getNumOperands() == 1 && // Don't merge with implicit operands Next != MBB.end() && - (*Next).getOpcode() == AMDGPU::S_NOP) { + (*Next).getOpcode() == AMDGPU::S_NOP && + (*Next).getNumOperands() == 1) { MachineInstr &NextMI = *Next; // The instruction encodes the amount to wait with an offset of 1, |