diff options
author | Andrew Turner <andrew@FreeBSD.org> | 2016-07-27 10:33:45 +0000 |
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committer | Andrew Turner <andrew@FreeBSD.org> | 2016-07-27 10:33:45 +0000 |
commit | c7716441be3a4a48aa7b7cdf69a15625c1cd8ef5 (patch) | |
tree | 2a59dacd09463974e72f84b0e05f237b0ba3f57b /src/arm/omap34xx-omap36xx-clocks.dtsi | |
parent | 235ad806ee815395bce54dc1b0ce1c06cd29b44a (diff) | |
download | src-test2-c7716441be3a4a48aa7b7cdf69a15625c1cd8ef5.tar.gz src-test2-c7716441be3a4a48aa7b7cdf69a15625c1cd8ef5.zip |
Notes
Diffstat (limited to 'src/arm/omap34xx-omap36xx-clocks.dtsi')
-rw-r--r-- | src/arm/omap34xx-omap36xx-clocks.dtsi | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/src/arm/omap34xx-omap36xx-clocks.dtsi b/src/arm/omap34xx-omap36xx-clocks.dtsi index b02017b7630e..858aa0796ec8 100644 --- a/src/arm/omap34xx-omap36xx-clocks.dtsi +++ b/src/arm/omap34xx-omap36xx-clocks.dtsi @@ -16,7 +16,7 @@ clock-div = <1>; }; - aes1_ick: aes1_ick { + aes1_ick: aes1_ick@a14 { #clock-cells = <0>; compatible = "ti,omap3-interface-clock"; clocks = <&security_l4_ick2>; @@ -24,7 +24,7 @@ reg = <0x0a14>; }; - rng_ick: rng_ick { + rng_ick: rng_ick@a14 { #clock-cells = <0>; compatible = "ti,omap3-interface-clock"; clocks = <&security_l4_ick2>; @@ -32,7 +32,7 @@ ti,bit-shift = <2>; }; - sha11_ick: sha11_ick { + sha11_ick: sha11_ick@a14 { #clock-cells = <0>; compatible = "ti,omap3-interface-clock"; clocks = <&security_l4_ick2>; @@ -40,7 +40,7 @@ ti,bit-shift = <1>; }; - des1_ick: des1_ick { + des1_ick: des1_ick@a14 { #clock-cells = <0>; compatible = "ti,omap3-interface-clock"; clocks = <&security_l4_ick2>; @@ -48,7 +48,7 @@ ti,bit-shift = <0>; }; - cam_mclk: cam_mclk { + cam_mclk: cam_mclk@f00 { #clock-cells = <0>; compatible = "ti,gate-clock"; clocks = <&dpll4_m5x2_ck>; @@ -57,7 +57,7 @@ ti,set-rate-parent; }; - cam_ick: cam_ick { + cam_ick: cam_ick@f10 { #clock-cells = <0>; compatible = "ti,omap3-no-wait-interface-clock"; clocks = <&l4_ick>; @@ -65,7 +65,7 @@ ti,bit-shift = <0>; }; - csi2_96m_fck: csi2_96m_fck { + csi2_96m_fck: csi2_96m_fck@f00 { #clock-cells = <0>; compatible = "ti,gate-clock"; clocks = <&core_96m_fck>; @@ -81,7 +81,7 @@ clock-div = <1>; }; - pka_ick: pka_ick { + pka_ick: pka_ick@a14 { #clock-cells = <0>; compatible = "ti,omap3-interface-clock"; clocks = <&security_l3_ick>; @@ -89,7 +89,7 @@ ti,bit-shift = <4>; }; - icr_ick: icr_ick { + icr_ick: icr_ick@a10 { #clock-cells = <0>; compatible = "ti,omap3-interface-clock"; clocks = <&core_l4_ick>; @@ -97,7 +97,7 @@ ti,bit-shift = <29>; }; - des2_ick: des2_ick { + des2_ick: des2_ick@a10 { #clock-cells = <0>; compatible = "ti,omap3-interface-clock"; clocks = <&core_l4_ick>; @@ -105,7 +105,7 @@ ti,bit-shift = <26>; }; - mspro_ick: mspro_ick { + mspro_ick: mspro_ick@a10 { #clock-cells = <0>; compatible = "ti,omap3-interface-clock"; clocks = <&core_l4_ick>; @@ -113,7 +113,7 @@ ti,bit-shift = <23>; }; - mailboxes_ick: mailboxes_ick { + mailboxes_ick: mailboxes_ick@a10 { #clock-cells = <0>; compatible = "ti,omap3-interface-clock"; clocks = <&core_l4_ick>; @@ -129,7 +129,7 @@ clock-div = <1>; }; - sr1_fck: sr1_fck { + sr1_fck: sr1_fck@c00 { #clock-cells = <0>; compatible = "ti,wait-gate-clock"; clocks = <&sys_ck>; @@ -137,7 +137,7 @@ ti,bit-shift = <6>; }; - sr2_fck: sr2_fck { + sr2_fck: sr2_fck@c00 { #clock-cells = <0>; compatible = "ti,wait-gate-clock"; clocks = <&sys_ck>; @@ -153,7 +153,7 @@ clock-div = <1>; }; - dpll2_fck: dpll2_fck { + dpll2_fck: dpll2_fck@40 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&core_ck>; @@ -163,7 +163,7 @@ ti,index-starts-at-one; }; - dpll2_ck: dpll2_ck { + dpll2_ck: dpll2_ck@4 { #clock-cells = <0>; compatible = "ti,omap3-dpll-clock"; clocks = <&sys_ck>, <&dpll2_fck>; @@ -173,7 +173,7 @@ ti,low-power-bypass; }; - dpll2_m2_ck: dpll2_m2_ck { + dpll2_m2_ck: dpll2_m2_ck@44 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&dpll2_ck>; @@ -182,7 +182,7 @@ ti,index-starts-at-one; }; - iva2_ck: iva2_ck { + iva2_ck: iva2_ck@0 { #clock-cells = <0>; compatible = "ti,wait-gate-clock"; clocks = <&dpll2_m2_ck>; @@ -190,7 +190,7 @@ ti,bit-shift = <0>; }; - modem_fck: modem_fck { + modem_fck: modem_fck@a00 { #clock-cells = <0>; compatible = "ti,omap3-interface-clock"; clocks = <&sys_ck>; @@ -198,7 +198,7 @@ ti,bit-shift = <31>; }; - sad2d_ick: sad2d_ick { + sad2d_ick: sad2d_ick@a10 { #clock-cells = <0>; compatible = "ti,omap3-interface-clock"; clocks = <&l3_ick>; @@ -206,7 +206,7 @@ ti,bit-shift = <3>; }; - mad2d_ick: mad2d_ick { + mad2d_ick: mad2d_ick@a18 { #clock-cells = <0>; compatible = "ti,omap3-interface-clock"; clocks = <&l3_ick>; @@ -214,7 +214,7 @@ ti,bit-shift = <3>; }; - mspro_fck: mspro_fck { + mspro_fck: mspro_fck@a00 { #clock-cells = <0>; compatible = "ti,wait-gate-clock"; clocks = <&core_96m_fck>; |