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authorSteve Passe <fsmp@FreeBSD.org>1997-06-27 22:27:18 +0000
committerSteve Passe <fsmp@FreeBSD.org>1997-06-27 22:27:18 +0000
commit4ef5e4e12c97a6ae818eed76becbd607b9d92cc0 (patch)
treea0a19bfa32c246c010dab2af92a9d26aeff40158 /sys/kern/subr_smp.c
parent0eaccbadd993348b47ae2a4dfe18ab213d91f77b (diff)
Notes
Diffstat (limited to 'sys/kern/subr_smp.c')
-rw-r--r--sys/kern/subr_smp.c26
1 files changed, 24 insertions, 2 deletions
diff --git a/sys/kern/subr_smp.c b/sys/kern/subr_smp.c
index b81115dcd478..90cdd7962b5a 100644
--- a/sys/kern/subr_smp.c
+++ b/sys/kern/subr_smp.c
@@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $Id: mp_machdep.c,v 1.4 1997/06/25 20:44:00 smp Exp smp $
+ * $Id: mp_machdep.c,v 1.22 1997/06/25 21:01:52 fsmp Exp $
*/
#include "opt_smp.h"
@@ -381,10 +381,32 @@ configure_local_apic(void)
byte |= 0x01; /* mask external INTR */
outb(0x23, byte); /* disconnect 8259s/NMI */
}
- /* mask the LVT1 */
+
+ /* mask lint0 (the 8259 'virtual wire' connection) */
temp = lapic.lvt_lint0;
temp |= APIC_LVT_M;
lapic.lvt_lint0 = temp;
+
+ /* setup lint1 to handle NMI */
+#if 1
+ /** XXX FIXME:
+ * should we arrange for ALL CPUs to catch NMI???
+ * it would probably crash, so for now only the BSP
+ * will catch it
+ */
+ if (cpuid != 0)
+ return;
+#endif /* 0/1 */
+
+ temp = lapic.lvt_lint1;
+
+ /* clear fields of interest, preserve undefined fields */
+ temp &= ~(0x1f000 | APIC_LVT_DM | APIC_LVT_VECTOR);
+
+ /* setup for NMI, edge trigger, active hi */
+ temp |= (APIC_LVT_DM_NMI | APIC_LVT_IIPP_INTAHI);
+
+ lapic.lvt_lint1 = temp;
}
#endif /* APIC_IO */