diff options
author | Warner Losh <imp@FreeBSD.org> | 2001-10-11 05:37:32 +0000 |
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committer | Warner Losh <imp@FreeBSD.org> | 2001-10-11 05:37:32 +0000 |
commit | f3bfc7375792399970fc600955c94cb7898de044 (patch) | |
tree | 885df2166fd2240508c1138e6051abe8d93a21ed /sys/pccard/pcic_pci.h | |
parent | cbc89bfbfe8e7f75bd743851f4890a1f1c58f4be (diff) | |
download | src-test2-f3bfc7375792399970fc600955c94cb7898de044.tar.gz src-test2-f3bfc7375792399970fc600955c94cb7898de044.zip |
Notes
Diffstat (limited to 'sys/pccard/pcic_pci.h')
-rw-r--r-- | sys/pccard/pcic_pci.h | 49 |
1 files changed, 44 insertions, 5 deletions
diff --git a/sys/pccard/pcic_pci.h b/sys/pccard/pcic_pci.h index 1d49cea004f7..90d5c850f524 100644 --- a/sys/pccard/pcic_pci.h +++ b/sys/pccard/pcic_pci.h @@ -99,12 +99,51 @@ #define R5C47X_MCR2_CSC_TO_INTX_DISABLE 0x0010 /* Bit 7 */ /* - * ToPIC specific stuff. + * Special resister definition for Toshiba ToPIC95/97 + * These values are borrowed from pcmcia-cs/Linux. */ -#define TOPIC_INTERRUPT_CONTROL 0xa1 -#define TOPIC_ICR_INTA 0x1 - -/* sanpei */ +#define TOPIC_SOCKET_CTRL 0x90 +# define TOPIC_SOCKET_CTRL_SCR_IRQSEL 0x00000001 /* PCI intr */ + +#define TOPIC_SLOT_CTRL 0xa0 +# define TOPIC_SLOT_CTRL_SLOTON 0x00000080 +# define TOPIC_SLOT_CTRL_SLOTEN 0x00000040 +# define TOPIC_SLOT_CTRL_ID_LOCK 0x00000020 +# define TOPIC_SLOT_CTRL_ID_WP 0x00000010 +# define TOPIC_SLOT_CTRL_PORT_MASK 0x0000000c +# define TOPIC_SLOT_CTRL_PORT_SHIFT 2 +# define TOPIC_SLOT_CTRL_OSF_MASK 0x00000003 +# define TOPIC_SLOT_CTRL_OSF_SHIFT 0 + +# define TOPIC_SLOT_CTRL_INTB 0x00002000 +# define TOPIC_SLOT_CTRL_INTA 0x00001000 +# define TOPIC_SLOT_CTRL_INT_MASK 0x00003000 +# define TOPIC_SLOT_CTRL_CLOCK_MASK 0x00000c00 +# define TOPIC_SLOT_CTRL_CLOCK_2 0x00000800 /* PCI Clock/2 */ +# define TOPIC_SLOT_CTRL_CLOCK_1 0x00000400 /* PCI Clock */ +# define TOPIC_SLOT_CTRL_CLOCK_0 0x00000000 /* no clock */ +# define TOPIC97_SLOT_CTRL_STSIRQP 0x00000400 /* status change intr pulse */ +# define TOPIC97_SLOT_CTRL_IRQP 0x00000200 /* function intr pulse */ +# define TOPIC97_SLOT_CTRL_PCIINT 0x00000100 /* intr routing to PCI INT */ + +# define TOPIC_SLOT_CTRL_CARDBUS 0x80000000 +# define TOPIC_SLOT_CTRL_VS1 0x04000000 +# define TOPIC_SLOT_CTRL_VS2 0x02000000 +# define TOPIC_SLOT_CTRL_SWDETECT 0x01000000 + +#define TOPIC_REG_CTRL 0x00a4 +# define TOPIC_REG_CTRL_RESUME_RESET 0x80000000 +# define TOPIC_REG_CTRL_REMOVE_RESET 0x40000000 +# define TOPIC97_REG_CTRL_CLKRUN_ENA 0x20000000 +# define TOPIC97_REG_CTRL_TESTMODE 0x10000000 +# define TOPIC97_REG_CTRL_IOPLUP 0x08000000 +# define TOPIC_REG_CTRL_BUFOFF_PWROFF 0x02000000 +# define TOPIC_REG_CTRL_BUFOFF_SIGOFF 0x01000000 +# define TOPIC97_REG_CTRL_CB_DEV_MASK 0x0000f800 +# define TOPIC97_REG_CTRL_CB_DEV_SHIFT 11 +# define TOPIC97_REG_CTRL_RI_DISABLE 0x00000004 +# define TOPIC97_REG_CTRL_CAUDIO_OFF 0x00000002 +# define TOPIC_REG_CTRL_CAUDIO_INVERT 0x00000001 /* For Bridge Control register (CB_PCI_BRIDGE_CTRL) */ #define CB_BCR_MASTER_ABORT 0x0020 |