diff options
| author | Andrew Thompson <thompsa@FreeBSD.org> | 2009-10-29 23:10:11 +0000 |
|---|---|---|
| committer | Andrew Thompson <thompsa@FreeBSD.org> | 2009-10-29 23:10:11 +0000 |
| commit | 0627fc1870a8dd10fd7862c65ad96d3b9b201f74 (patch) | |
| tree | 445e66dda002be08ee7a1d0c08f7b517ed809c3a /sys | |
| parent | 9fd6caea707788cd68a0aa8c545eb45ebf150ec3 (diff) | |
Notes
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/dev/usb/net/if_aue.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/sys/dev/usb/net/if_aue.c b/sys/dev/usb/net/if_aue.c index 142780f56138..1a2ce70b5ae3 100644 --- a/sys/dev/usb/net/if_aue.c +++ b/sys/dev/usb/net/if_aue.c @@ -484,7 +484,7 @@ aue_miibus_writereg(device_t dev, int phy, int reg, int data) } if (i == AUE_TIMEOUT) - device_printf(sc->sc_ue.ue_dev, "MII read timed out\n"); + device_printf(sc->sc_ue.ue_dev, "MII write timed out\n"); if (!locked) AUE_UNLOCK(sc); @@ -603,11 +603,14 @@ aue_reset(struct aue_softc *sc) * to set the GPIO pins high so that the PHY(s) will * be enabled. * - * Note: We force all of the GPIO pins low first, *then* - * enable the ones we want. + * NOTE: We used to force all of the GPIO pins low first and then + * enable the ones we want. This has been changed to better + * match the ADMtek's reference design to avoid setting the + * power-down configuration line of the PHY at the same time + * it is reset. */ - aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_OUT0|AUE_GPIO_SEL0); - aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_OUT0|AUE_GPIO_SEL0|AUE_GPIO_SEL1); + aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1); + aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0); if (sc->sc_flags & AUE_FLAG_LSYS) { /* Grrr. LinkSys has to be different from everyone else. */ |