vendor/llvm/llvm-release_39-r276489

1 files changed, 15 insertions, 1 deletions

diff --git a/test/CodeGen/AArch64/arm64-inline-asm.ll b/test/CodeGen/AArch64/arm64-inline-asm.ll
index ac6e8a7731c6..4d4adb10d556 100644
--- a/test/CodeGen/AArch64/arm64-inline-asm.ll
+++ b/test/CodeGen/AArch64/arm64-inline-asm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple -no-integrated-as -disable-post-ra | FileCheck %s
+; RUN: llc < %s -mtriple=arm64-apple-ios -aarch64-neon-syntax=apple -no-integrated-as -disable-post-ra | FileCheck %s
 
 ; rdar://9167275
 
@@ -232,3 +232,17 @@ define void @test_zero_reg(i32* %addr) {
 
   ret void
 }
+
+define <2 x float> @test_vreg_64bit(<2 x float> %in) nounwind {
+  ; CHECK-LABEL: test_vreg_64bit:
+  %1 = tail call <2 x float> asm sideeffect "fadd ${0}.2s, ${1}.2s, ${1}.2s", "={v14},w"(<2 x float> %in) nounwind
+  ; CHECK fadd v14.2s, v0.2s, v0.2s:
+  ret <2 x float> %1
+}
+
+define <4 x float> @test_vreg_128bit(<4 x float> %in) nounwind {
+  ; CHECK-LABEL: test_vreg_128bit:
+  %1 = tail call <4 x float> asm sideeffect "fadd ${0}.4s, ${1}.4s, ${1}.4s", "={v14},w"(<4 x float> %in) nounwind
+  ; CHECK fadd v14.4s, v0.4s, v0.4s:
+  ret <4 x float> %1
+}