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| author | Dimitry Andric <dim@FreeBSD.org> | 2017-01-02 19:17:04 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2017-01-02 19:17:04 +0000 |
| commit | b915e9e0fc85ba6f398b3fab0db6a81a8913af94 (patch) | |
| tree | 98b8f811c7aff2547cab8642daf372d6c59502fb /test/CodeGen/AArch64/arm64-inline-asm.ll | |
| parent | 6421cca32f69ac849537a3cff78c352195e99f1b (diff) | |
Notes
Diffstat (limited to 'test/CodeGen/AArch64/arm64-inline-asm.ll')
| -rw-r--r-- | test/CodeGen/AArch64/arm64-inline-asm.ll | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/test/CodeGen/AArch64/arm64-inline-asm.ll b/test/CodeGen/AArch64/arm64-inline-asm.ll index 4d4adb10d556..f3f359380440 100644 --- a/test/CodeGen/AArch64/arm64-inline-asm.ll +++ b/test/CodeGen/AArch64/arm64-inline-asm.ll @@ -246,3 +246,11 @@ define <4 x float> @test_vreg_128bit(<4 x float> %in) nounwind { ; CHECK fadd v14.4s, v0.4s, v0.4s: ret <4 x float> %1 } + +define void @test_constraint_w(i32 %a) { + ; CHECK: fmov [[SREG:s[0-9]+]], {{w[0-9]+}} + ; CHECK: sqxtn h0, [[SREG]] + + tail call void asm sideeffect "sqxtn h0, ${0:s}\0A", "w"(i32 %a) + ret void +} |