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authorDimitry Andric <dim@FreeBSD.org>2015-06-21 13:59:01 +0000
committerDimitry Andric <dim@FreeBSD.org>2015-06-21 13:59:01 +0000
commit3a0822f094b578157263e04114075ad7df81db41 (patch)
treebc48361fe2cd1ca5f93ac01b38b183774468fc79 /test/CodeGen/AMDGPU/selectcc-icmp-select-float.ll
parent85d8b2bbe386bcfe669575d05b61482d7be07e5d (diff)
Diffstat (limited to 'test/CodeGen/AMDGPU/selectcc-icmp-select-float.ll')
-rw-r--r--test/CodeGen/AMDGPU/selectcc-icmp-select-float.ll16
1 files changed, 16 insertions, 0 deletions
diff --git a/test/CodeGen/AMDGPU/selectcc-icmp-select-float.ll b/test/CodeGen/AMDGPU/selectcc-icmp-select-float.ll
new file mode 100644
index 000000000000..e870ee891e66
--- /dev/null
+++ b/test/CodeGen/AMDGPU/selectcc-icmp-select-float.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
+
+; Note additional optimizations may cause this SGT to be replaced with a
+; CND* instruction.
+; CHECK: SETGT_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, literal.x,
+; CHECK-NEXT: -1
+; Test a selectcc with i32 LHS/RHS and float True/False
+
+define void @test(float addrspace(1)* %out, i32 addrspace(1)* %in) {
+entry:
+ %0 = load i32, i32 addrspace(1)* %in
+ %1 = icmp sge i32 %0, 0
+ %2 = select i1 %1, float 1.0, float 0.0
+ store float %2, float addrspace(1)* %out
+ ret void
+}