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author | Dimitry Andric <dim@FreeBSD.org> | 2018-08-02 17:32:43 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2018-08-02 17:32:43 +0000 |
commit | b7eb8e35e481a74962664b63dfb09483b200209a (patch) | |
tree | 1937fb4a348458ce2d02ade03ac3bb0aa18d2fcd /test/CodeGen/ARM/aggregate-padding.ll | |
parent | eb11fae6d08f479c0799db45860a98af528fa6e7 (diff) |
Diffstat (limited to 'test/CodeGen/ARM/aggregate-padding.ll')
-rw-r--r-- | test/CodeGen/ARM/aggregate-padding.ll | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/aggregate-padding.ll b/test/CodeGen/ARM/aggregate-padding.ll index bc46a9cdf913..ae7ab90fcd2f 100644 --- a/test/CodeGen/ARM/aggregate-padding.ll +++ b/test/CodeGen/ARM/aggregate-padding.ll @@ -99,3 +99,19 @@ define i16 @test_i16_forced_stack([8 x double], double, i32, i32, [3 x i16] %arg %sum = add i16 %val0, %val2 ret i16 %sum } + +; [2 x <4 x i32>] should be aligned only on a 64-bit boundary and contiguous. +; None of the two <4 x i32> elements should introduce any padding to 128 bits. +define i32 @test_4xi32_64bit_aligned_and_contiguous([8 x double], float, [2 x <4 x i32>] %arg) nounwind { +; CHECK-LABEL: test_4xi32_64bit_aligned_and_contiguous: +; CHECK-DAG: ldr [[VAL0_0:r[0-9]+]], [sp, #8] +; CHECK-DAG: ldr [[VAL1_0:r[0-9]+]], [sp, #24] +; CHECK: add r0, [[VAL0_0]], [[VAL1_0]] + + %val0 = extractvalue [2 x <4 x i32>] %arg, 0 + %val0_0 = extractelement <4 x i32> %val0, i32 0 + %val1 = extractvalue [2 x <4 x i32>] %arg, 1 + %val1_0 = extractelement <4 x i32> %val1, i32 0 + %sum = add i32 %val0_0, %val1_0 + ret i32 %sum +} |