vendor/llvm/llvm-r126547

6 files changed, 211 insertions, 15 deletions

diff --git a/test/CodeGen/ARM/2009-10-16-Scope.ll b/test/CodeGen/ARM/2009-10-16-Scope.ll
new file mode 100644
index 000000000000..ce440e986de0
--- /dev/null
+++ b/test/CodeGen/ARM/2009-10-16-Scope.ll
@@ -0,0 +1,32 @@
+; RUN: llc %s -O0 -o /dev/null -mtriple=arm-apple-darwin
+; PR 5197
+; There is not any llvm instruction assocated with !5. The code generator
+; should be able to handle this.
+
+define void @bar() nounwind ssp {
+entry:
+  %count_ = alloca i32, align 4                   ; <i32*> [#uses=2]
+  br label %do.body, !dbg !0
+
+do.body:                                          ; preds = %entry
+  call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4)
+  %conv = ptrtoint i32* %count_ to i32, !dbg !0   ; <i32> [#uses=1]
+  %call = call i32 @foo(i32 %conv) ssp, !dbg !0   ; <i32> [#uses=0]
+  br label %do.end, !dbg !0
+
+do.end:                                           ; preds = %do.body
+  ret void, !dbg !7
+}
+
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+
+declare i32 @foo(i32) ssp
+
+!0 = metadata !{i32 5, i32 2, metadata !1, null}
+!1 = metadata !{i32 458763, metadata !2}; [DW_TAG_lexical_block ]
+!2 = metadata !{i32 458798, i32 0, metadata !3, metadata !"bar", metadata !"bar", metadata !"bar", metadata !3, i32 4, null, i1 false, i1 true}; [DW_TAG_subprogram ]
+!3 = metadata !{i32 458769, i32 0, i32 12, metadata !"genmodes.i", metadata !"/Users/yash/Downloads", metadata !"clang 1.1", i1 true, i1 false, metadata !"", i32 0}; [DW_TAG_compile_unit ]
+!4 = metadata !{i32 459008, metadata !5, metadata !"count_", metadata !3, i32 5, metadata !6}; [ DW_TAG_auto_variable ]
+!5 = metadata !{i32 458763, metadata !1}; [DW_TAG_lexical_block ]
+!6 = metadata !{i32 458788, metadata !3, metadata !"int", metadata !3, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5}; [DW_TAG_base_type ]
+!7 = metadata !{i32 6, i32 1, metadata !2, null}
diff --git a/test/CodeGen/ARM/2010-08-04-StackVariable.ll b/test/CodeGen/ARM/2010-08-04-StackVariable.ll
new file mode 100644
index 000000000000..f077d04803bd
--- /dev/null
+++ b/test/CodeGen/ARM/2010-08-04-StackVariable.ll
@@ -0,0 +1,124 @@
+; RUN: llc -O0 -mtriple=arm-apple-darwin < %s | grep DW_OP_fbreg
+; Use DW_OP_fbreg in variable's location expression if the variable is in a stack slot.
+
+%struct.SVal = type { i8*, i32 }
+
+define i32 @_Z3fooi4SVal(i32 %i, %struct.SVal* noalias %location) nounwind ssp {
+entry:
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !23), !dbg !24
+  call void @llvm.dbg.value(metadata !{%struct.SVal* %location}, i64 0, metadata !25), !dbg !24
+  %0 = icmp ne i32 %i, 0, !dbg !27                ; <i1> [#uses=1]
+  br i1 %0, label %bb, label %bb1, !dbg !27
+
+bb:                                               ; preds = %entry
+  %1 = getelementptr inbounds %struct.SVal* %location, i32 0, i32 1, !dbg !29 ; <i32*> [#uses=1]
+  %2 = load i32* %1, align 8, !dbg !29            ; <i32> [#uses=1]
+  %3 = add i32 %2, %i, !dbg !29                   ; <i32> [#uses=1]
+  br label %bb2, !dbg !29
+
+bb1:                                              ; preds = %entry
+  %4 = getelementptr inbounds %struct.SVal* %location, i32 0, i32 1, !dbg !30 ; <i32*> [#uses=1]
+  %5 = load i32* %4, align 8, !dbg !30            ; <i32> [#uses=1]
+  %6 = sub i32 %5, 1, !dbg !30                    ; <i32> [#uses=1]
+  br label %bb2, !dbg !30
+
+bb2:                                              ; preds = %bb1, %bb
+  %.0 = phi i32 [ %3, %bb ], [ %6, %bb1 ]         ; <i32> [#uses=1]
+  br label %return, !dbg !29
+
+return:                                           ; preds = %bb2
+  ret i32 %.0, !dbg !29
+}
+
+define linkonce_odr void @_ZN4SValC1Ev(%struct.SVal* %this) nounwind ssp align 2 {
+entry:
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  call void @llvm.dbg.value(metadata !{%struct.SVal* %this}, i64 0, metadata !31), !dbg !34
+  %0 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 0, !dbg !34 ; <i8**> [#uses=1]
+  store i8* null, i8** %0, align 8, !dbg !34
+  %1 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 1, !dbg !34 ; <i32*> [#uses=1]
+  store i32 0, i32* %1, align 8, !dbg !34
+  br label %return, !dbg !34
+
+return:                                           ; preds = %entry
+  ret void, !dbg !35
+}
+
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+
+define i32 @main() nounwind ssp {
+entry:
+  %0 = alloca %struct.SVal                        ; <%struct.SVal*> [#uses=3]
+  %v = alloca %struct.SVal                        ; <%struct.SVal*> [#uses=4]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  call void @llvm.dbg.declare(metadata !{%struct.SVal* %v}, metadata !38), !dbg !41
+  call void @_ZN4SValC1Ev(%struct.SVal* %v) nounwind, !dbg !41
+  %1 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 1, !dbg !42 ; <i32*> [#uses=1]
+  store i32 1, i32* %1, align 8, !dbg !42
+  %2 = getelementptr inbounds %struct.SVal* %0, i32 0, i32 0, !dbg !43 ; <i8**> [#uses=1]
+  %3 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 0, !dbg !43 ; <i8**> [#uses=1]
+  %4 = load i8** %3, align 8, !dbg !43            ; <i8*> [#uses=1]
+  store i8* %4, i8** %2, align 8, !dbg !43
+  %5 = getelementptr inbounds %struct.SVal* %0, i32 0, i32 1, !dbg !43 ; <i32*> [#uses=1]
+  %6 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 1, !dbg !43 ; <i32*> [#uses=1]
+  %7 = load i32* %6, align 8, !dbg !43            ; <i32> [#uses=1]
+  store i32 %7, i32* %5, align 8, !dbg !43
+  %8 = call i32 @_Z3fooi4SVal(i32 2, %struct.SVal* noalias %0) nounwind, !dbg !43 ; <i32> [#uses=0]
+  call void @llvm.dbg.value(metadata !{i32 %8}, i64 0, metadata !44), !dbg !43
+  br label %return, !dbg !45
+
+return:                                           ; preds = %entry
+  ret i32 0, !dbg !45
+}
+
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+
+!llvm.dbg.sp = !{!0, !9, !16, !17, !20}
+
+!0 = metadata !{i32 524334, i32 0, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"", metadata !2, i32 11, metadata !14, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null} ; [ DW_TAG_subprogram ]
+!1 = metadata !{i32 524307, metadata !2, metadata !"SVal", metadata !2, i32 1, i64 128, i64 64, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_structure_type ]
+!2 = metadata !{i32 524329, metadata !"small.cc", metadata !"/Users/manav/R8248330", metadata !3} ; [ DW_TAG_file_type ]
+!3 = metadata !{i32 524305, i32 0, i32 4, metadata !"small.cc", metadata !"/Users/manav/R8248330", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ]
+!4 = metadata !{metadata !5, metadata !7, metadata !0, metadata !9}
+!5 = metadata !{i32 524301, metadata !1, metadata !"Data", metadata !2, i32 7, i64 64, i64 64, i64 0, i32 0, metadata !6} ; [ DW_TAG_member ]
+!6 = metadata !{i32 524303, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ]
+!7 = metadata !{i32 524301, metadata !1, metadata !"Kind", metadata !2, i32 8, i64 32, i64 32, i64 64, i32 0, metadata !8} ; [ DW_TAG_member ]
+!8 = metadata !{i32 524324, metadata !2, metadata !"unsigned int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ]
+!9 = metadata !{i32 524334, i32 0, metadata !1, metadata !"~SVal", metadata !"~SVal", metadata !"", metadata !2, i32 12, metadata !10, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null} ; [ DW_TAG_subprogram ]
+!10 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_subroutine_type ]
+!11 = metadata !{null, metadata !12, metadata !13}
+!12 = metadata !{i32 524303, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !1} ; [ DW_TAG_pointer_type ]
+!13 = metadata !{i32 524324, metadata !2, metadata !"int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
+!14 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !15, i32 0, null} ; [ DW_TAG_subroutine_type ]
+!15 = metadata !{null, metadata !12}
+!16 = metadata !{i32 524334, i32 0, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"_ZN4SValC1Ev", metadata !2, i32 11, metadata !14, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, void (%struct.SVal*)* @_ZN4SValC1Ev} ; [ DW_TAG_subprogram ]
+!17 = metadata !{i32 524334, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"_Z3fooi4SVal", metadata !2, i32 16, metadata !18, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 (i32, %struct.SVal*)* @_Z3fooi4SVal} ; [ DW_TAG_subprogram ]
+!18 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !19, i32 0, null} ; [ DW_TAG_subroutine_type ]
+!19 = metadata !{metadata !13, metadata !13, metadata !1}
+!20 = metadata !{i32 524334, i32 0, metadata !2, metadata !"main", metadata !"main", metadata !"main", metadata !2, i32 23, metadata !21, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ]
+!21 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !22, i32 0, null} ; [ DW_TAG_subroutine_type ]
+!22 = metadata !{metadata !13}
+!23 = metadata !{i32 524545, metadata !17, metadata !"i", metadata !2, i32 16, metadata !13} ; [ DW_TAG_arg_variable ]
+!24 = metadata !{i32 16, i32 0, metadata !17, null}
+!25 = metadata !{i32 524545, metadata !17, metadata !"location", metadata !2, i32 16, metadata !26} ; [ DW_TAG_arg_variable ]
+!26 = metadata !{i32 524304, metadata !2, metadata !"SVal", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !1} ; [ DW_TAG_reference_type ]
+!27 = metadata !{i32 17, i32 0, metadata !28, null}
+!28 = metadata !{i32 524299, metadata !17, i32 16, i32 0, metadata !2, i32 2} ; [ DW_TAG_lexical_block ]
+!29 = metadata !{i32 18, i32 0, metadata !28, null}
+!30 = metadata !{i32 20, i32 0, metadata !28, null}
+!31 = metadata !{i32 524545, metadata !16, metadata !"this", metadata !2, i32 11, metadata !32} ; [ DW_TAG_arg_variable ]
+!32 = metadata !{i32 524326, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !33} ; [ DW_TAG_const_type ]
+!33 = metadata !{i32 524303, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !1} ; [ DW_TAG_pointer_type ]
+!34 = metadata !{i32 11, i32 0, metadata !16, null}
+!35 = metadata !{i32 11, i32 0, metadata !36, null}
+!36 = metadata !{i32 524299, metadata !37, i32 11, i32 0, metadata !2, i32 1} ; [ DW_TAG_lexical_block ]
+!37 = metadata !{i32 524299, metadata !16, i32 11, i32 0, metadata !2, i32 0} ; [ DW_TAG_lexical_block ]
+!38 = metadata !{i32 524544, metadata !39, metadata !"v", metadata !2, i32 24, metadata !1} ; [ DW_TAG_auto_variable ]
+!39 = metadata !{i32 524299, metadata !40, i32 23, i32 0, metadata !2, i32 4} ; [ DW_TAG_lexical_block ]
+!40 = metadata !{i32 524299, metadata !20, i32 23, i32 0, metadata !2, i32 3} ; [ DW_TAG_lexical_block ]
+!41 = metadata !{i32 24, i32 0, metadata !39, null}
+!42 = metadata !{i32 25, i32 0, metadata !39, null}
+!43 = metadata !{i32 26, i32 0, metadata !39, null}
+!44 = metadata !{i32 524544, metadata !39, metadata !"k", metadata !2, i32 26, metadata !13} ; [ DW_TAG_auto_variable ]
+!45 = metadata !{i32 27, i32 0, metadata !39, null}
diff --git a/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll b/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll
index 99baad2d38d1..94842124fb08 100644
--- a/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll
+++ b/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll
@@ -17,13 +17,12 @@ target triple = "thumbv7-apple-darwin10"
 ; DW_OP_constu
 ; offset
 
-;CHECK:        .byte   7                       @ Abbrev [7] 0x1a5:0x13 DW_TAG_variable
-;CHECK-NEXT:        .ascii   "x2"                   @ DW_AT_name
+;CHECK:        .ascii   "x2"                   @ DW_AT_name
 ;CHECK-NEXT:        .byte   0
-;CHECK-NEXT:        .long   93                      @ DW_AT_type
-;CHECK-NEXT:        .byte   1                       @ DW_AT_decl_file
-;CHECK-NEXT:        .byte   6                       @ DW_AT_decl_line
-;CHECK-NEXT:        .byte   8                       @ DW_AT_location
+;CHECK-NEXT:        @ DW_AT_type
+;CHECK-NEXT:        @ DW_AT_decl_file
+;CHECK-NEXT:        @ DW_AT_decl_line
+;CHECK-NEXT:        @ DW_AT_location
 ;CHECK-NEXT:        .byte   3
 ;CHECK-NEXT:        .long   __MergedGlobals
 ;CHECK-NEXT:        .byte   16
diff --git a/test/CodeGen/ARM/available_externally.ll b/test/CodeGen/ARM/available_externally.ll
new file mode 100644
index 000000000000..0f646d582e71
--- /dev/null
+++ b/test/CodeGen/ARM/available_externally.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic | FileCheck %s
+; rdar://9027648
+
+@A = available_externally hidden constant i32 1
+@B = external hidden constant i32
+
+define i32 @t1() {
+  %tmp = load i32* @A
+  store i32 %tmp, i32* @B
+  ret i32 %tmp
+}
+
+; CHECK:      L_A$non_lazy_ptr:
+; CHECK-NEXT: .long _A
+; CHECK:      L_B$non_lazy_ptr:
+; CHECK-NEXT: .long _B
diff --git a/test/CodeGen/ARM/fcopysign.ll b/test/CodeGen/ARM/fcopysign.ll
index 1050cd265998..d30e3ebf50a5 100644
--- a/test/CodeGen/ARM/fcopysign.ll
+++ b/test/CodeGen/ARM/fcopysign.ll
@@ -9,9 +9,8 @@ entry:
 ; SOFT: bfi r0, r1, #31, #1
 
 ; HARD: test1:
-; HARD: vabs.f32 d0, d0
-; HARD: cmp r0, #0
-; HARD: vneglt.f32 s0, s0
+; HARD: vmov.i32 [[REG1:(d[0-9]+)]], #0x80000000
+; HARD: vbsl [[REG1]], d2, d0
   %0 = tail call float @copysignf(float %x, float %y) nounwind
   ret float %0
 }
@@ -23,9 +22,9 @@ entry:
 ; SOFT: bfi r1, r2, #31, #1
 
 ; HARD: test2:
-; HARD: vabs.f64 d0, d0
-; HARD: cmp r1, #0
-; HARD: vneglt.f64 d0, d0
+; HARD: vmov.i32 [[REG2:(d[0-9]+)]], #0x80000000
+; HARD: vshl.i64 [[REG2]], [[REG2]], #32
+; HARD: vbsl [[REG2]], d1, d0
   %0 = tail call double @copysign(double %x, double %y) nounwind
   ret double %0
 }
@@ -33,9 +32,9 @@ entry:
 define double @test3(double %x, double %y, double %z) nounwind {
 entry:
 ; SOFT: test3:
-; SOFT: vabs.f64
-; SOFT: cmp {{.*}}, #0
-; SOFT: vneglt.f64
+; SOFT: vmov.i32 [[REG3:(d[0-9]+)]], #0x80000000
+; SOFT: vshl.i64 [[REG3]], [[REG3]], #32
+; SOFT: vbsl [[REG3]],
   %0 = fmul double %x, %y
   %1 = tail call double @copysign(double %0, double %z) nounwind
   ret double %1
diff --git a/test/CodeGen/ARM/vstlane.ll b/test/CodeGen/ARM/vstlane.ll
index 6cc052bbeb1c..d1bc15ad576d 100644
--- a/test/CodeGen/ARM/vstlane.ll
+++ b/test/CodeGen/ARM/vstlane.ll
@@ -10,6 +10,19 @@ define void @vst1lanei8(i8* %A, <8 x i8>* %B) nounwind {
 	ret void
 }
 
+;Check for a post-increment updating store.
+define void @vst1lanei8_update(i8** %ptr, <8 x i8>* %B) nounwind {
+;CHECK: vst1lanei8_update:
+;CHECK: vst1.8 {d16[3]}, [r2]!
+	%A = load i8** %ptr
+	%tmp1 = load <8 x i8>* %B
+	%tmp2 = extractelement <8 x i8> %tmp1, i32 3
+	store i8 %tmp2, i8* %A, align 8
+	%tmp3 = getelementptr i8* %A, i32 1
+	store i8* %tmp3, i8** %ptr
+	ret void
+}
+
 define void @vst1lanei16(i16* %A, <4 x i16>* %B) nounwind {
 ;CHECK: vst1lanei16:
 ;Check the alignment value.  Max for this instruction is 16 bits:
@@ -66,6 +79,19 @@ define void @vst1laneQi32(i32* %A, <4 x i32>* %B) nounwind {
 	ret void
 }
 
+;Check for a post-increment updating store.
+define void @vst1laneQi32_update(i32** %ptr, <4 x i32>* %B) nounwind {
+;CHECK: vst1laneQi32_update:
+;CHECK: vst1.32 {d17[1]}, [r1, :32]!
+	%A = load i32** %ptr
+	%tmp1 = load <4 x i32>* %B
+	%tmp2 = extractelement <4 x i32> %tmp1, i32 3
+	store i32 %tmp2, i32* %A, align 8
+	%tmp3 = getelementptr i32* %A, i32 1
+	store i32* %tmp3, i32** %ptr
+	ret void
+}
+
 define void @vst1laneQf(float* %A, <4 x float>* %B) nounwind {
 ;CHECK: vst1laneQf:
 ;CHECK: vst1.32 {d17[1]}, [r0]