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author | Dimitry Andric <dim@FreeBSD.org> | 2013-04-08 18:41:23 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2013-04-08 18:41:23 +0000 |
commit | 4a16efa3e43e35f0cc9efe3a67f620f0017c3d36 (patch) | |
tree | 06099edc18d30894081a822b756f117cbe0b8207 /test/CodeGen/Hexagon/validate-offset.ll | |
parent | 482e7bddf617ae804dc47133cb07eb4aa81e45de (diff) |
Diffstat (limited to 'test/CodeGen/Hexagon/validate-offset.ll')
-rw-r--r-- | test/CodeGen/Hexagon/validate-offset.ll | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/test/CodeGen/Hexagon/validate-offset.ll b/test/CodeGen/Hexagon/validate-offset.ll new file mode 100644 index 000000000000..9e7d0aa07832 --- /dev/null +++ b/test/CodeGen/Hexagon/validate-offset.ll @@ -0,0 +1,36 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s -O0 + +; This is a regression test which makes sure that the offset check +; is available for STRiw_indexed instruction. This is required +; by 'Hexagon Expand Predicate Spill Code' pass. + +define i32 @f(i32 %a, i32 %b) nounwind { +entry: + %retval = alloca i32, align 4 + %a.addr = alloca i32, align 4 + %b.addr = alloca i32, align 4 + store i32 %a, i32* %a.addr, align 4 + store i32 %b, i32* %b.addr, align 4 + %0 = load i32* %a.addr, align 4 + %1 = load i32* %b.addr, align 4 + %cmp = icmp sgt i32 %0, %1 + br i1 %cmp, label %if.then, label %if.else + +if.then: + %2 = load i32* %a.addr, align 4 + %3 = load i32* %b.addr, align 4 + %add = add nsw i32 %2, %3 + store i32 %add, i32* %retval + br label %return + +if.else: + %4 = load i32* %a.addr, align 4 + %5 = load i32* %b.addr, align 4 + %sub = sub nsw i32 %4, %5 + store i32 %sub, i32* %retval + br label %return + +return: + %6 = load i32* %retval + ret i32 %6 +} |