diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2015-05-21 06:57:07 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2015-05-21 06:57:07 +0000 |
commit | f03b5bed27d0d2eafd68562ce14f8b5e3f1f0801 (patch) | |
tree | 311f96478e9fceea407d1f187f9c5cef712f796e /test/CodeGen/R600/llvm.AMDGPU.kill.ll | |
parent | b6bcb9a905dec7821221e8ceaf1504c1f329815e (diff) |
Diffstat (limited to 'test/CodeGen/R600/llvm.AMDGPU.kill.ll')
-rw-r--r-- | test/CodeGen/R600/llvm.AMDGPU.kill.ll | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/test/CodeGen/R600/llvm.AMDGPU.kill.ll b/test/CodeGen/R600/llvm.AMDGPU.kill.ll index 3995c9a742d6..30b0fc2bd73b 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.kill.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.kill.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s ; SI-LABEL: {{^}}kill_gs_const: ; SI-NOT: v_cmpx_le_f32 @@ -15,8 +16,24 @@ main_body: ret void } +; SI-LABEL: {{^}}kill_vcc_implicit_def: +; SI-NOT: v_cmp_gt_f32_e32 vcc, +; SI: v_cmpx_le_f32_e32 vcc, 0, v{{[0-9]+}} +; SI: v_cmp_lt_f32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], v{{[0-9]+}}, 0 +; SI: v_cndmask_b32_e64 v{{[0-9]+}}, 0, 1.0, [[CMP]] +define void @kill_vcc_implicit_def([6 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [17 x <4 x i32>] addrspace(2)* byval, [34 x <8 x i32>] addrspace(2)* byval, float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, i32, float, float) #1 { +entry: + %tmp0 = fcmp olt float %13, 0.0 + call void @llvm.AMDGPU.kill(float %14) + %tmp1 = select i1 %tmp0, float 1.0, float 0.0 + call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 1, i32 1, float %tmp1, float %tmp1, float %tmp1, float %tmp1) + ret void +} + declare void @llvm.AMDGPU.kill(float) +declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) attributes #0 = { "ShaderType"="2" } +attributes #1 = { "ShaderType"="0" } !0 = !{!"const", null, i32 1} |